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- Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order to

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reduce ABI disruptions when new cpu types and new PMC events are added
  in the future.
- Support alternate spellings for PMC events.  Derive the canonical
  spelling of an event name from its enumeration name in 'enum pmc_event'.
- Provide a way for users to disambiguate between identically named events
  supported by multiple classes of PMCs in a CPU.
- Change libpmc's machine-dependent event specifier parsing code to
  better support CPUs containing two or more classes of PMC resources.
This commit is contained in:
Joseph Koshy 2008-10-09 14:55:45 +00:00
parent 13014ca04a
commit 789140c0e7
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=183725
3 changed files with 689 additions and 568 deletions
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394
lib/libpmc/libpmc.c
View File

@ -59,6 +59,10 @@ static int p5_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
static int p6_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
struct pmc_op_pmcallocate *_pmc_config);
#endif
#if defined(__amd64__) || defined(__i386__)
static int tsc_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
struct pmc_op_pmcallocate *_pmc_config);
#endif
#define PMC_CALL(cmd, params) \
syscall(pmc_syscall, PMC_OP_##cmd, (params))
@ -77,23 +81,96 @@ struct pmc_event_alias {
static const struct pmc_event_alias *pmc_mdep_event_aliases;
/*
* The pmc_event_descr table maps symbolic names known to the user
* The pmc_event_descr structure maps symbolic names known to the user
* to integer codes used by the PMC KLD.
*/
struct pmc_event_descr {
const char *pm_ev_name;
enum pmc_event pm_ev_code;
enum pmc_class pm_ev_class;
};
static const struct pmc_event_descr
pmc_event_table[] =
{
#undef __PMC_EV
#define __PMC_EV(C,N,EV) { #EV, PMC_EV_ ## C ## _ ## N, PMC_CLASS_ ## C },
__PMC_EVENTS()
/*
* The pmc_class_descr structure maps class name prefixes for
* event names to event tables and other PMC class data.
*/
struct pmc_class_descr {
const char *pm_evc_name;
size_t pm_evc_name_size;
enum pmc_class pm_evc_class;
const struct pmc_event_descr *pm_evc_event_table;
size_t pm_evc_event_table_size;
int (*pm_evc_allocate_pmc)(enum pmc_event _pe,
char *_ctrspec, struct pmc_op_pmcallocate *_pa);
};
#define PMC_TABLE_SIZE(N) (sizeof(N)/sizeof(N[0]))
#define PMC_EVENT_TABLE_SIZE(N) PMC_TABLE_SIZE(N##_event_table)
#undef __PMC_EV
#define __PMC_EV(C,N) { #N, PMC_EV_ ## C ## _ ## N },
/*
* PMC_MDEP_TABLE(NAME, CLASS, ADDITIONAL_CLASSES...)
*
* Build an event descriptor table and a list of valid PMC classes.
*/
#define PMC_MDEP_TABLE(N,C,...) \
static const struct pmc_event_descr N##_event_table[] = \
{ \
__PMC_EV_##C() \
}; \
static const enum pmc_class N##_pmc_classes[] = { \
PMC_CLASS_##C, __VA_ARGS__ \
}
PMC_MDEP_TABLE(k7, K7, PMC_CLASS_TSC);
PMC_MDEP_TABLE(k8, K8, PMC_CLASS_TSC);
PMC_MDEP_TABLE(p4, P4, PMC_CLASS_TSC);
PMC_MDEP_TABLE(p5, P5, PMC_CLASS_TSC);
PMC_MDEP_TABLE(p6, P6, PMC_CLASS_TSC);
static const struct pmc_event_descr tsc_event_table[] =
{
__PMC_EV_TSC()
};
#undef PMC_CLASS_TABLE_DESC
#define PMC_CLASS_TABLE_DESC(N, C) { \
.pm_evc_name = #N "-", \
.pm_evc_name_size = sizeof(#N "-") - 1, \
.pm_evc_class = PMC_CLASS_##C , \
.pm_evc_event_table = N##_event_table , \
.pm_evc_event_table_size = \
PMC_EVENT_TABLE_SIZE(N), \
.pm_evc_allocate_pmc = N##_allocate_pmc \
}
static const struct pmc_class_descr pmc_class_table[] =
{
#if defined(__i386__)
PMC_CLASS_TABLE_DESC(k7, K7),
#endif
#if defined(__i386__) || defined(__amd64__)
PMC_CLASS_TABLE_DESC(k8, K8),
PMC_CLASS_TABLE_DESC(p4, P4),
#endif
#if defined(__i386__)
PMC_CLASS_TABLE_DESC(p5, P5),
PMC_CLASS_TABLE_DESC(p6, P6),
#endif
#if defined(__i386__) || defined(__amd64__)
PMC_CLASS_TABLE_DESC(tsc, TSC)
#endif
};
static size_t pmc_event_class_table_size =
PMC_TABLE_SIZE(pmc_class_table);
#undef PMC_CLASS_TABLE_DESC
static const enum pmc_class *pmc_mdep_class_list;
static size_t pmc_mdep_class_list_size;
/*
* Mapping tables, mapping enumeration values to human readable
* strings.
@ -111,9 +188,14 @@ static const char * pmc_class_names[] = {
__PMC_CLASSES()
};
static const char * pmc_cputype_names[] = {
struct pmc_cputype_map {
enum pmc_class pm_cputype;
const char *pm_name;
};
static const struct pmc_cputype_map pmc_cputype_names[] = {
#undef __PMC_CPU
#define __PMC_CPU(S, D) #S ,
#define __PMC_CPU(S, V, D) { .pm_cputype = PMC_CPU_##S, .pm_name = #S } ,
__PMC_CPUS()
};
@ -139,11 +221,6 @@ static int pmc_syscall = -1; /* filled in by pmc_init() */
static struct pmc_cpuinfo cpu_info; /* filled in by pmc_init() */
/* Architecture dependent event parsing */
static int (*pmc_mdep_allocate_pmc)(enum pmc_event _pe, char *_ctrspec,
struct pmc_op_pmcallocate *_pmc_config);
/* Event masks for events */
struct pmc_masks {
const char *pm_name;
@ -167,7 +244,8 @@ pmc_parse_mask(const struct pmc_masks *pmask, char *p, uint32_t *evmask)
return (-1);
c = 0; /* count of mask keywords seen */
while ((r = strsep(&q, "+")) != NULL) {
for (pm = pmask; pm->pm_name && strcmp(r, pm->pm_name); pm++)
for (pm = pmask; pm->pm_name && strcasecmp(r, pm->pm_name);
pm++)
;
if (pm->pm_name == NULL) /* not found */
return (-1);
@ -215,14 +293,7 @@ k7_allocate_pmc(enum pmc_event pe, char *ctrspec,
uint32_t count, unitmask;
pmc_config->pm_md.pm_amd.pm_amd_config = 0;
pmc_config->pm_caps |= PMC_CAP_READ;
if (pe == PMC_EV_TSC_TSC) {
/* TSC events must be unqualified. */
if (ctrspec && *ctrspec != '\0')
return (-1);
return (0);
}
pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
if (pe == PMC_EV_K7_DC_REFILLS_FROM_L2 ||
pe == PMC_EV_K7_DC_REFILLS_FROM_SYSTEM ||
@ -232,8 +303,6 @@ k7_allocate_pmc(enum pmc_event pe, char *ctrspec,
} else
unitmask = has_unitmask = 0;
pmc_config->pm_caps |= PMC_CAP_WRITE;
while ((p = strsep(&ctrspec, ",")) != NULL) {
if (KWPREFIXMATCH(p, K7_KW_COUNT "=")) {
q = strchr(p, '=');
@ -514,16 +583,9 @@ k8_allocate_pmc(enum pmc_event pe, char *ctrspec,
uint32_t count, evmask;
const struct pmc_masks *pm, *pmask;
pmc_config->pm_caps |= PMC_CAP_READ;
pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
pmc_config->pm_md.pm_amd.pm_amd_config = 0;
if (pe == PMC_EV_TSC_TSC) {
/* TSC events must be unqualified. */
if (ctrspec && *ctrspec != '\0')
return (-1);
return (0);
}
pmask = NULL;
evmask = 0;
@ -597,8 +659,6 @@ k8_allocate_pmc(enum pmc_event pe, char *ctrspec,
break; /* no options defined */
}
pmc_config->pm_caps |= PMC_CAP_WRITE;
while ((p = strsep(&ctrspec, ",")) != NULL) {
if (KWPREFIXMATCH(p, K8_KW_COUNT "=")) {
q = strchr(p, '=');
@ -1005,22 +1065,14 @@ p4_allocate_pmc(enum pmc_event pe, char *ctrspec,
uint32_t evmask, cccractivemask;
const struct pmc_masks *pm, *pmask;
pmc_config->pm_caps |= PMC_CAP_READ;
pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
pmc_config->pm_md.pm_p4.pm_p4_cccrconfig =
pmc_config->pm_md.pm_p4.pm_p4_escrconfig = 0;
if (pe == PMC_EV_TSC_TSC) {
/* TSC must not be further qualified */
if (ctrspec && *ctrspec != '\0')
return (-1);
return (0);
}
pmask = NULL;
evmask = 0;
cccractivemask = 0x3;
has_tag = has_busreqtype = 0;
pmc_config->pm_caps |= PMC_CAP_WRITE;
#define __P4SETMASK(M) do { \
pmask = p4_mask_##M; \
@ -1166,13 +1218,13 @@ p4_allocate_pmc(enum pmc_event pe, char *ctrspec,
if (*++q == '\0') /* skip '=' */
return (-1);
if (strcmp(q, P4_KW_ACTIVE_NONE) == 0)
if (strcasecmp(q, P4_KW_ACTIVE_NONE) == 0)
cccractivemask = 0x0;
else if (strcmp(q, P4_KW_ACTIVE_SINGLE) == 0)
else if (strcasecmp(q, P4_KW_ACTIVE_SINGLE) == 0)
cccractivemask = 0x1;
else if (strcmp(q, P4_KW_ACTIVE_BOTH) == 0)
else if (strcasecmp(q, P4_KW_ACTIVE_BOTH) == 0)
cccractivemask = 0x2;
else if (strcmp(q, P4_KW_ACTIVE_ANY) == 0)
else if (strcasecmp(q, P4_KW_ACTIVE_ANY) == 0)
cccractivemask = 0x3;
else
return (-1);
@ -1442,16 +1494,9 @@ p6_allocate_pmc(enum pmc_event pe, char *ctrspec,
int count, n;
const struct pmc_masks *pm, *pmask;
pmc_config->pm_caps |= PMC_CAP_READ;
pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
pmc_config->pm_md.pm_ppro.pm_ppro_config = 0;
if (pe == PMC_EV_TSC_TSC) {
if (ctrspec && *ctrspec != '\0')
return (-1);
return (0);
}
pmc_config->pm_caps |= PMC_CAP_WRITE;
evmask = 0;
#define P6MASKSET(M) pmask = p6_mask_ ## M
@ -1638,6 +1683,93 @@ p6_allocate_pmc(enum pmc_event pe, char *ctrspec,
#endif
#if defined(__i386__) || defined(__amd64__)
static int
tsc_allocate_pmc(enum pmc_event pe, char *ctrspec,
struct pmc_op_pmcallocate *pmc_config)
{
if (pe != PMC_EV_TSC_TSC)
return (-1);
/* TSC events must be unqualified. */
if (ctrspec && *ctrspec != '\0')
return (-1);
pmc_config->pm_md.pm_amd.pm_amd_config = 0;
pmc_config->pm_caps |= PMC_CAP_READ;
return (0);
}
#endif
/*
* Match an event name `name' with its canonical form.
*
* Matches are case insensitive and spaces, underscores and hyphen
* characters are considered to match each other.
*
* Returns 1 for a match, 0 otherwise.
*/
static int
pmc_match_event_name(const char *name, const char *canonicalname)
{
int cc, nc;
const unsigned char *c, *n;
c = (const unsigned char *) canonicalname;
n = (const unsigned char *) name;
for (; (nc = *n) && (cc = *c); n++, c++) {
if (toupper(nc) == cc)
continue;
if ((nc == ' ' || nc == '_' || nc == '-') &&
(cc == ' ' || cc == '_' || cc == '-'))
continue;
return (0);
}
if (*n == '\0' && *c == '\0')
return (1);
return (0);
}
/*
* Match an event name against all the event named supported by a
* PMC class.
*
* Returns an event descriptor pointer on match or NULL otherwise.
*/
static const struct pmc_event_descr *
pmc_match_event_class(const char *name,
const struct pmc_class_descr *pcd)
{
size_t n;
const struct pmc_event_descr *ev;
ev = pcd->pm_evc_event_table;
for (n = 0; n < pcd->pm_evc_event_table_size; n++, ev++)
if (pmc_match_event_name(name, ev->pm_ev_name))
return (ev);
return (NULL);
}
static int
pmc_mdep_is_compatible_class(enum pmc_class pc)
{
size_t n;
for (n = 0; n < pmc_mdep_class_list_size; n++)
if (pmc_mdep_class_list[n] == pc)
return (1);
return (0);
}
/*
* API entry points
*/
@ -1646,12 +1778,14 @@ int
pmc_allocate(const char *ctrspec, enum pmc_mode mode,
uint32_t flags, int cpu, pmc_id_t *pmcid)
{
size_t n;
int retval;
enum pmc_event pe;
char *r, *spec_copy;
const char *ctrname;
const struct pmc_event_alias *p;
const struct pmc_event_descr *ev;
const struct pmc_event_alias *alias;
struct pmc_op_pmcallocate pmc_config;
const struct pmc_class_descr *pcd;
spec_copy = NULL;
retval = -1;
@ -1664,9 +1798,9 @@ pmc_allocate(const char *ctrspec, enum pmc_mode mode,
/* replace an event alias with the canonical event specifier */
if (pmc_mdep_event_aliases)
for (p = pmc_mdep_event_aliases; p->pm_alias; p++)
if (!strcmp(ctrspec, p->pm_alias)) {
spec_copy = strdup(p->pm_spec);
for (alias = pmc_mdep_event_aliases; alias->pm_alias; alias++)
if (!strcasecmp(ctrspec, alias->pm_alias)) {
spec_copy = strdup(alias->pm_spec);
break;
}
@ -1676,19 +1810,43 @@ pmc_allocate(const char *ctrspec, enum pmc_mode mode,
r = spec_copy;
ctrname = strsep(&r, ",");
/* look for the given counter name */
for (pe = PMC_EVENT_FIRST; pe < (PMC_EVENT_LAST+1); pe++)
if (!strcmp(ctrname, pmc_event_table[pe].pm_ev_name))
/*
* If a explicit class prefix was given by the user, restrict the
* search for the event to the specified PMC class.
*/
ev = NULL;
for (n = 0; n < pmc_event_class_table_size; n++) {
pcd = &pmc_class_table[n];
if (pmc_mdep_is_compatible_class(pcd->pm_evc_class) &&
strncasecmp(ctrname, pcd->pm_evc_name,
pcd->pm_evc_name_size) == 0) {
if ((ev = pmc_match_event_class(ctrname +
pcd->pm_evc_name_size, pcd)) == NULL) {
errno = EINVAL;
goto out;
}
break;
}
}
if (pe > PMC_EVENT_LAST) {
/*
* Otherwise, search for this event in all compatible PMC
* classes.
*/
for (n = 0; ev == NULL && n < pmc_event_class_table_size; n++) {
pcd = &pmc_class_table[n];
if (pmc_mdep_is_compatible_class(pcd->pm_evc_class))
ev = pmc_match_event_class(ctrname, pcd);
}
if (ev == NULL) {
errno = EINVAL;
goto out;
}
bzero(&pmc_config, sizeof(pmc_config));
pmc_config.pm_ev = pmc_event_table[pe].pm_ev_code;
pmc_config.pm_class = pmc_event_table[pe].pm_ev_class;
pmc_config.pm_ev = ev->pm_ev_code;
pmc_config.pm_class = pcd->pm_evc_class;
pmc_config.pm_cpu = cpu;
pmc_config.pm_mode = mode;
pmc_config.pm_flags = flags;
@ -1696,7 +1854,7 @@ pmc_allocate(const char *ctrspec, enum pmc_mode mode,
if (PMC_IS_SAMPLING_MODE(mode))
pmc_config.pm_caps |= PMC_CAP_INTERRUPT;
if (pmc_mdep_allocate_pmc(pe, r, &pmc_config) < 0) {
if (pcd->pm_evc_allocate_pmc(ev->pm_ev_code, r, &pmc_config) < 0) {
errno = EINVAL;
goto out;
}
@ -1817,28 +1975,28 @@ pmc_event_names_of_class(enum pmc_class cl, const char ***eventnames,
switch (cl)
{
case PMC_CLASS_TSC:
ev = &pmc_event_table[PMC_EV_TSC_TSC];
count = 1;
ev = tsc_event_table;
count = PMC_EVENT_TABLE_SIZE(tsc);
break;
case PMC_CLASS_K7:
ev = &pmc_event_table[PMC_EV_K7_FIRST];
count = PMC_EV_K7_LAST - PMC_EV_K7_FIRST + 1;
ev = k7_event_table;
count = PMC_EVENT_TABLE_SIZE(k7);
break;
case PMC_CLASS_K8:
ev = &pmc_event_table[PMC_EV_K8_FIRST];
count = PMC_EV_K8_LAST - PMC_EV_K8_FIRST + 1;
break;
case PMC_CLASS_P5:
ev = &pmc_event_table[PMC_EV_P5_FIRST];
count = PMC_EV_P5_LAST - PMC_EV_P5_FIRST + 1;
break;
case PMC_CLASS_P6:
ev = &pmc_event_table[PMC_EV_P6_FIRST];
count = PMC_EV_P6_LAST - PMC_EV_P6_FIRST + 1;
ev = k8_event_table;
count = PMC_EVENT_TABLE_SIZE(k8);
break;
case PMC_CLASS_P4:
ev = &pmc_event_table[PMC_EV_P4_FIRST];
count = PMC_EV_P4_LAST - PMC_EV_P4_FIRST + 1;
ev = p4_event_table;
count = PMC_EVENT_TABLE_SIZE(p4);
break;
case PMC_CLASS_P5:
ev = p5_event_table;
count = PMC_EVENT_TABLE_SIZE(p5);
break;
case PMC_CLASS_P6:
ev = p6_event_table;
count = PMC_EVENT_TABLE_SIZE(p6);
break;
default:
errno = EINVAL;
@ -1937,33 +2095,35 @@ pmc_init(void)
for (n = 0; n < cpu_info.pm_nclass; n++)
cpu_info.pm_classes[n] = op_cpu_info.pm_classes[n];
/* set parser pointer */
#define PMC_MDEP_INIT(C) do { \
pmc_mdep_event_aliases = C##_aliases; \
pmc_mdep_class_list = C##_pmc_classes; \
pmc_mdep_class_list_size = \
PMC_TABLE_SIZE(C##_pmc_classes); \
} while (0)
/* Configure the event name parser. */
switch (cpu_info.pm_cputype) {
#if defined(__i386__)
case PMC_CPU_AMD_K7:
pmc_mdep_event_aliases = k7_aliases;
pmc_mdep_allocate_pmc = k7_allocate_pmc;
PMC_MDEP_INIT(k7);
break;
case PMC_CPU_INTEL_P5:
pmc_mdep_event_aliases = p5_aliases;
pmc_mdep_allocate_pmc = p5_allocate_pmc;
PMC_MDEP_INIT(p5);
break;
case PMC_CPU_INTEL_P6: /* P6 ... Pentium M CPUs have */
case PMC_CPU_INTEL_PII: /* similar PMCs. */
case PMC_CPU_INTEL_PIII:
case PMC_CPU_INTEL_PM:
pmc_mdep_event_aliases = p6_aliases;
pmc_mdep_allocate_pmc = p6_allocate_pmc;
PMC_MDEP_INIT(p6);
break;
#endif
#if defined(__amd64__) || defined(__i386__)
case PMC_CPU_INTEL_PIV:
pmc_mdep_event_aliases = p4_aliases;
pmc_mdep_allocate_pmc = p4_allocate_pmc;
break;
case PMC_CPU_AMD_K8:
pmc_mdep_event_aliases = k8_aliases;
pmc_mdep_allocate_pmc = k8_allocate_pmc;
PMC_MDEP_INIT(k8);
break;
case PMC_CPU_INTEL_PIV:
PMC_MDEP_INIT(p4);
break;
#endif
@ -2013,9 +2173,12 @@ pmc_name_of_class(enum pmc_class pc)
const char *
pmc_name_of_cputype(enum pmc_cputype cp)
{
if ((int) cp >= PMC_CPU_FIRST &&
cp <= PMC_CPU_LAST)
return (pmc_cputype_names[cp]);
size_t n;
for (n = 0; n < PMC_TABLE_SIZE(pmc_cputype_names); n++)
if (cp == pmc_cputype_names[n].pm_cputype)
return (pmc_cputype_names[n].pm_name);
errno = EINVAL;
return (NULL);
}
@ -2034,9 +2197,32 @@ pmc_name_of_disposition(enum pmc_disp pd)
const char *
pmc_name_of_event(enum pmc_event pe)
{
if ((int) pe >= PMC_EVENT_FIRST &&
pe <= PMC_EVENT_LAST)
return (pmc_event_table[pe].pm_ev_name);
const struct pmc_event_descr *ev, *evfence;
ev = evfence = NULL;
if (pe >= PMC_EV_K7_FIRST && pe <= PMC_EV_K7_LAST) {
ev = k7_event_table;
evfence = k7_event_table + PMC_EVENT_TABLE_SIZE(k7);
} else if (pe >= PMC_EV_K8_FIRST && pe <= PMC_EV_K8_LAST) {
ev = k8_event_table;
evfence = k8_event_table + PMC_EVENT_TABLE_SIZE(k8);
} else if (pe >= PMC_EV_P4_FIRST && pe <= PMC_EV_P4_LAST) {
ev = p4_event_table;
evfence = p4_event_table + PMC_EVENT_TABLE_SIZE(p4);
} else if (pe >= PMC_EV_P5_FIRST && pe <= PMC_EV_P5_LAST) {
ev = p5_event_table;
evfence = p5_event_table + PMC_EVENT_TABLE_SIZE(p5);
} else if (pe >= PMC_EV_P6_FIRST && pe <= PMC_EV_P6_LAST) {
ev = p6_event_table;
evfence = p6_event_table + PMC_EVENT_TABLE_SIZE(p6);
} else if (pe == PMC_EV_TSC_TSC) {
ev = tsc_event_table;
evfence = tsc_event_table + PMC_EVENT_TABLE_SIZE(tsc);
}
for (; ev != evfence; ev++)
if (pe == ev->pm_ev_code)
return (ev->pm_ev_name);
errno = EINVAL;
return (NULL);

816
sys/dev/hwpmc/pmc_events.h
View File

@ -41,35 +41,30 @@
* Optimization Guide" [Doc#22007K, Feb 2002]
*/
#define __PMC_EV_K7() \
__PMC_EV(K7, DC_ACCESSES, k7-dc-accesses) \
__PMC_EV(K7, DC_MISSES, k7-dc-misses) \
__PMC_EV(K7, DC_REFILLS_FROM_L2, k7-dc-refills-from-l2) \
__PMC_EV(K7, DC_REFILLS_FROM_SYSTEM, k7-dc-refills-from-system) \
__PMC_EV(K7, DC_WRITEBACKS, k7-dc-writebacks) \
__PMC_EV(K7, L1_DTLB_MISS_AND_L2_DTLB_HITS, \
k7-l1-dtlb-miss-and-l2-dtlb-hits) \
__PMC_EV(K7, L1_AND_L2_DTLB_MISSES, k7-l1-and-l2-dtlb-misses) \
__PMC_EV(K7, MISALIGNED_REFERENCES, k7-misaligned-references) \
__PMC_EV(K7, IC_FETCHES, k7-ic-fetches) \
__PMC_EV(K7, IC_MISSES, k7-ic-misses) \
__PMC_EV(K7, L1_ITLB_MISSES, k7-l1-itlb-misses) \
__PMC_EV(K7, L1_L2_ITLB_MISSES, k7-l1-l2-itlb-misses) \
__PMC_EV(K7, RETIRED_INSTRUCTIONS, k7-retired-instructions) \
__PMC_EV(K7, RETIRED_OPS, k7-retired-ops) \
__PMC_EV(K7, RETIRED_BRANCHES, k7-retired-branches) \
__PMC_EV(K7, RETIRED_BRANCHES_MISPREDICTED, \
k7-retired-branches-mispredicted) \
__PMC_EV(K7, RETIRED_TAKEN_BRANCHES, k7-retired-taken-branches) \
__PMC_EV(K7, RETIRED_TAKEN_BRANCHES_MISPREDICTED, \
k7-retired-taken-branches-mispredicted) \
__PMC_EV(K7, RETIRED_FAR_CONTROL_TRANSFERS, \
k7-retired-far-control-transfers) \
__PMC_EV(K7, RETIRED_RESYNC_BRANCHES, k7-retired-resync-branches) \
__PMC_EV(K7, INTERRUPTS_MASKED_CYCLES, k7-interrupts-masked-cycles) \
__PMC_EV(K7, INTERRUPTS_MASKED_WHILE_PENDING_CYCLES, \
k7-interrupts-masked-while-pending-cycles) \
__PMC_EV(K7, HARDWARE_INTERRUPTS, k7-hardware-interrupts)
#define __PMC_EV_K7() \
__PMC_EV(K7, DC_ACCESSES) \
__PMC_EV(K7, DC_MISSES) \
__PMC_EV(K7, DC_REFILLS_FROM_L2) \
__PMC_EV(K7, DC_REFILLS_FROM_SYSTEM) \
__PMC_EV(K7, DC_WRITEBACKS) \
__PMC_EV(K7, L1_DTLB_MISS_AND_L2_DTLB_HITS) \
__PMC_EV(K7, L1_AND_L2_DTLB_MISSES) \
__PMC_EV(K7, MISALIGNED_REFERENCES) \
__PMC_EV(K7, IC_FETCHES) \
__PMC_EV(K7, IC_MISSES) \
__PMC_EV(K7, L1_ITLB_MISSES) \
__PMC_EV(K7, L1_L2_ITLB_MISSES) \
__PMC_EV(K7, RETIRED_INSTRUCTIONS) \
__PMC_EV(K7, RETIRED_OPS) \
__PMC_EV(K7, RETIRED_BRANCHES) \
__PMC_EV(K7, RETIRED_BRANCHES_MISPREDICTED) \
__PMC_EV(K7, RETIRED_TAKEN_BRANCHES) \
__PMC_EV(K7, RETIRED_TAKEN_BRANCHES_MISPREDICTED) \
__PMC_EV(K7, RETIRED_FAR_CONTROL_TRANSFERS) \
__PMC_EV(K7, RETIRED_RESYNC_BRANCHES) \
__PMC_EV(K7, INTERRUPTS_MASKED_CYCLES) \
__PMC_EV(K7, INTERRUPTS_MASKED_WHILE_PENDING_CYCLES) \
__PMC_EV(K7, HARDWARE_INTERRUPTS)
#define PMC_EV_K7_FIRST PMC_EV_K7_DC_ACCESSES
#define PMC_EV_K7_LAST PMC_EV_K7_HARDWARE_INTERRUPTS
@ -79,169 +74,165 @@ __PMC_EV(K7, HARDWARE_INTERRUPTS, k7-hardware-interrupts)
* Developer's Manual, Volume 3: System Programming Guide" [245472-012]
*/
#define __PMC_EV_P4() \
__PMC_EV(P4, TC_DELIVER_MODE, p4-tc-deliver-mode) \
__PMC_EV(P4, BPU_FETCH_REQUEST, p4-bpu-fetch-request) \
__PMC_EV(P4, ITLB_REFERENCE, p4-itlb-reference) \
__PMC_EV(P4, MEMORY_CANCEL, p4-memory-cancel) \
__PMC_EV(P4, MEMORY_COMPLETE, p4-memory-complete) \
__PMC_EV(P4, LOAD_PORT_REPLAY, p4-load-port-replay) \
__PMC_EV(P4, STORE_PORT_REPLAY, p4-store-port-replay) \
__PMC_EV(P4, MOB_LOAD_REPLAY, p4-mob-load-replay) \
__PMC_EV(P4, PAGE_WALK_TYPE, p4-page-walk-type) \
__PMC_EV(P4, BSQ_CACHE_REFERENCE, p4-bsq-cache-reference) \
__PMC_EV(P4, IOQ_ALLOCATION, p4-ioq-allocation) \
__PMC_EV(P4, IOQ_ACTIVE_ENTRIES, p4-ioq-active-entries) \
__PMC_EV(P4, FSB_DATA_ACTIVITY, p4-fsb-data-activity) \
__PMC_EV(P4, BSQ_ALLOCATION, p4-bsq-allocation) \
__PMC_EV(P4, BSQ_ACTIVE_ENTRIES, p4-bsq-active-entries) \
__PMC_EV(P4, SSE_INPUT_ASSIST, p4-sse-input-assist) \
__PMC_EV(P4, PACKED_SP_UOP, p4-packed-sp-uop) \
__PMC_EV(P4, PACKED_DP_UOP, p4-packed-dp-uop) \
__PMC_EV(P4, SCALAR_SP_UOP, p4-scalar-sp-uop) \
__PMC_EV(P4, SCALAR_DP_UOP, p4-scalar-dp-uop) \
__PMC_EV(P4, 64BIT_MMX_UOP, p4-64bit-mmx-uop) \
__PMC_EV(P4, 128BIT_MMX_UOP, p4-128bit-mmx-uop) \
__PMC_EV(P4, X87_FP_UOP, p4-x87-fp-uop) \
__PMC_EV(P4, X87_SIMD_MOVES_UOP, p4-x87-simd-moves-uop) \
__PMC_EV(P4, GLOBAL_POWER_EVENTS, p4-global-power-events) \
__PMC_EV(P4, TC_MS_XFER, p4-tc-ms-xfer) \
__PMC_EV(P4, UOP_QUEUE_WRITES, p4-uop-queue-writes) \
__PMC_EV(P4, RETIRED_MISPRED_BRANCH_TYPE, \
p4-retired-mispred-branch-type) \
__PMC_EV(P4, RETIRED_BRANCH_TYPE, p4-retired-branch-type) \
__PMC_EV(P4, RESOURCE_STALL, p4-resource-stall) \
__PMC_EV(P4, WC_BUFFER, p4-wc-buffer) \
__PMC_EV(P4, B2B_CYCLES, p4-b2b-cycles) \
__PMC_EV(P4, BNR, p4-bnr) \
__PMC_EV(P4, SNOOP, p4-snoop) \
__PMC_EV(P4, RESPONSE, p4-response) \
__PMC_EV(P4, FRONT_END_EVENT, p4-front-end-event) \
__PMC_EV(P4, EXECUTION_EVENT, p4-execution-event) \
__PMC_EV(P4, REPLAY_EVENT, p4-replay-event) \
__PMC_EV(P4, INSTR_RETIRED, p4-instr-retired) \
__PMC_EV(P4, UOPS_RETIRED, p4-uops-retired) \
__PMC_EV(P4, UOP_TYPE, p4-uop-type) \
__PMC_EV(P4, BRANCH_RETIRED, p4-branch-retired) \
__PMC_EV(P4, MISPRED_BRANCH_RETIRED, p4-mispred-branch-retired) \
__PMC_EV(P4, X87_ASSIST, p4-x87-assist) \
__PMC_EV(P4, MACHINE_CLEAR, p4-machine-clear)
#define __PMC_EV_P4() \
__PMC_EV(P4, TC_DELIVER_MODE) \
__PMC_EV(P4, BPU_FETCH_REQUEST) \
__PMC_EV(P4, ITLB_REFERENCE) \
__PMC_EV(P4, MEMORY_CANCEL) \
__PMC_EV(P4, MEMORY_COMPLETE) \
__PMC_EV(P4, LOAD_PORT_REPLAY) \
__PMC_EV(P4, STORE_PORT_REPLAY) \
__PMC_EV(P4, MOB_LOAD_REPLAY) \
__PMC_EV(P4, PAGE_WALK_TYPE) \
__PMC_EV(P4, BSQ_CACHE_REFERENCE) \
__PMC_EV(P4, IOQ_ALLOCATION) \
__PMC_EV(P4, IOQ_ACTIVE_ENTRIES) \
__PMC_EV(P4, FSB_DATA_ACTIVITY) \
__PMC_EV(P4, BSQ_ALLOCATION) \
__PMC_EV(P4, BSQ_ACTIVE_ENTRIES) \
__PMC_EV(P4, SSE_INPUT_ASSIST) \
__PMC_EV(P4, PACKED_SP_UOP) \
__PMC_EV(P4, PACKED_DP_UOP) \
__PMC_EV(P4, SCALAR_SP_UOP) \
__PMC_EV(P4, SCALAR_DP_UOP) \
__PMC_EV(P4, 64BIT_MMX_UOP) \
__PMC_EV(P4, 128BIT_MMX_UOP) \
__PMC_EV(P4, X87_FP_UOP) \
__PMC_EV(P4, X87_SIMD_MOVES_UOP) \
__PMC_EV(P4, GLOBAL_POWER_EVENTS) \
__PMC_EV(P4, TC_MS_XFER) \
__PMC_EV(P4, UOP_QUEUE_WRITES) \
__PMC_EV(P4, RETIRED_MISPRED_BRANCH_TYPE) \
__PMC_EV(P4, RETIRED_BRANCH_TYPE) \
__PMC_EV(P4, RESOURCE_STALL) \
__PMC_EV(P4, WC_BUFFER) \
__PMC_EV(P4, B2B_CYCLES) \
__PMC_EV(P4, BNR) \
__PMC_EV(P4, SNOOP) \
__PMC_EV(P4, RESPONSE) \
__PMC_EV(P4, FRONT_END_EVENT) \
__PMC_EV(P4, EXECUTION_EVENT) \
__PMC_EV(P4, REPLAY_EVENT) \
__PMC_EV(P4, INSTR_RETIRED) \
__PMC_EV(P4, UOPS_RETIRED) \
__PMC_EV(P4, UOP_TYPE) \
__PMC_EV(P4, BRANCH_RETIRED) \
__PMC_EV(P4, MISPRED_BRANCH_RETIRED) \
__PMC_EV(P4, X87_ASSIST) \
__PMC_EV(P4, MACHINE_CLEAR)
#define PMC_EV_P4_FIRST PMC_EV_P4_TC_DELIVER_MODE
#define PMC_EV_P4_LAST PMC_EV_P4_MACHINE_CLEAR
/* Intel Pentium Pro, P-II, P-III and Pentium-M style events */
#define __PMC_EV_P6() \
__PMC_EV(P6, DATA_MEM_REFS, p6-data-mem-refs) \
__PMC_EV(P6, DCU_LINES_IN, p6-dcu-lines-in) \
__PMC_EV(P6, DCU_M_LINES_IN, p6-dcu-m-lines-in) \
__PMC_EV(P6, DCU_M_LINES_OUT, p6-dcu-m-lines-out) \
__PMC_EV(P6, DCU_MISS_OUTSTANDING, p6-dcu-miss-outstanding) \
__PMC_EV(P6, IFU_FETCH, p6-ifu-ifetch) \
__PMC_EV(P6, IFU_FETCH_MISS, p6-ifu-ifetch-miss) \
__PMC_EV(P6, ITLB_MISS, p6-itlb-miss) \
__PMC_EV(P6, IFU_MEM_STALL, p6-ifu-mem-stall) \
__PMC_EV(P6, ILD_STALL, p6-ild-stall) \
__PMC_EV(P6, L2_IFETCH, p6-l2-ifetch) \
__PMC_EV(P6, L2_LD, p6-l2-ld) \
__PMC_EV(P6, L2_ST, p6-l2-st) \
__PMC_EV(P6, L2_LINES_IN, p6-l2-lines-in) \
__PMC_EV(P6, L2_LINES_OUT, p6-l2-lines-out) \
__PMC_EV(P6, L2_M_LINES_INM, p6-l2-m-lines-inm) \
__PMC_EV(P6, L2_M_LINES_OUTM, p6-l2-m-lines-outm) \
__PMC_EV(P6, L2_RQSTS, p6-l2-rqsts) \
__PMC_EV(P6, L2_ADS, p6-l2-ads) \
__PMC_EV(P6, L2_DBUS_BUSY, p6-l2-dbus-busy) \
__PMC_EV(P6, L2_DBUS_BUSY_RD, p6-l2-dbus-busy-rd) \
__PMC_EV(P6, BUS_DRDY_CLOCKS, p6-bus-drdy-clocks) \
__PMC_EV(P6, BUS_LOCK_CLOCKS, p6-bus-lock-clocks) \
__PMC_EV(P6, BUS_REQ_OUTSTANDING, p6-bus-req-outstanding) \
__PMC_EV(P6, BUS_TRAN_BRD, p6-bus-tran-brd) \
__PMC_EV(P6, BUS_TRAN_RFO, p6-bus-tran-rfo) \
__PMC_EV(P6, BUS_TRANS_WB, p6-bus-trans-wb) \
__PMC_EV(P6, BUS_TRAN_IFETCH, p6-bus-tran-ifetch) \
__PMC_EV(P6, BUS_TRAN_INVAL, p6-bus-tran-inval) \
__PMC_EV(P6, BUS_TRAN_PWR, p6-bus-tran-pwr) \
__PMC_EV(P6, BUS_TRANS_P, p6-bus-trans-p) \
__PMC_EV(P6, BUS_TRANS_IO, p6-bus-trans-io) \
__PMC_EV(P6, BUS_TRAN_DEF, p6-bus-tran-def) \
__PMC_EV(P6, BUS_TRAN_BURST, p6-bus-tran-burst) \
__PMC_EV(P6, BUS_TRAN_ANY, p6-bus-tran-any) \
__PMC_EV(P6, BUS_TRAN_MEM, p6-bus-tran-mem) \
__PMC_EV(P6, BUS_DATA_RCV, p6-bus-data-rcv) \
__PMC_EV(P6, BUS_BNR_DRV, p6-bus-bnr-drv) \
__PMC_EV(P6, BUS_HIT_DRV, p6-bus-hit-drv) \
__PMC_EV(P6, BUS_HITM_DRV, p6-bus-hitm-drv) \
__PMC_EV(P6, BUS_SNOOP_STALL, p6-bus-snoop-stall) \
__PMC_EV(P6, FLOPS, p6-flops) \
__PMC_EV(P6, FP_COMPS_OPS_EXE, p6-fp-comps-ops-exe) \
__PMC_EV(P6, FP_ASSIST, p6-fp-assist) \
__PMC_EV(P6, MUL, p6-mul) \
__PMC_EV(P6, DIV, p6-div) \
__PMC_EV(P6, CYCLES_DIV_BUSY, p6-cycles-div-busy) \
__PMC_EV(P6, LD_BLOCKS, p6-ld-blocks) \
__PMC_EV(P6, SB_DRAINS, p6-sb-drains) \
__PMC_EV(P6, MISALIGN_MEM_REF, p6-misalign-mem-ref) \
__PMC_EV(P6, EMON_KNI_PREF_DISPATCHED, p6-emon-kni-pref-dispatched) \
__PMC_EV(P6, EMON_KNI_PREF_MISS, p6-emon-kni-pref-miss) \
__PMC_EV(P6, INST_RETIRED, p6-inst-retired) \
__PMC_EV(P6, UOPS_RETIRED, p6-uops-retired) \
__PMC_EV(P6, INST_DECODED, p6-inst-decoded) \
__PMC_EV(P6, EMON_KNI_INST_RETIRED, p6-emon-kni-inst-retired) \
__PMC_EV(P6, EMON_KNI_COMP_INST_RET, p6-emon-kni-comp-inst-ret) \
__PMC_EV(P6, HW_INT_RX, p6-hw-int-rx) \
__PMC_EV(P6, CYCLES_INT_MASKED, p6-cycles-int-masked) \
__PMC_EV(P6, CYCLES_INT_PENDING_AND_MASKED, \
p6-cycles-int-pending-and-masked) \
__PMC_EV(P6, BR_INST_RETIRED, p6-br-inst-retired) \
__PMC_EV(P6, BR_MISS_PRED_RETIRED, p6-br-miss-pred-retired) \
__PMC_EV(P6, BR_TAKEN_RETIRED, p6-br-taken-retired) \
__PMC_EV(P6, BR_MISS_PRED_TAKEN_RET, p6-br-miss-pred-taken-ret) \
__PMC_EV(P6, BR_INST_DECODED, p6-br-inst-decoded) \
__PMC_EV(P6, BTB_MISSES, p6-btb-misses) \
__PMC_EV(P6, BR_BOGUS, p6-br-bogus) \
__PMC_EV(P6, BACLEARS, p6-baclears) \
__PMC_EV(P6, RESOURCE_STALLS, p6-resource-stalls) \
__PMC_EV(P6, PARTIAL_RAT_STALLS, p6-partial-rat-stalls) \
__PMC_EV(P6, SEGMENT_REG_LOADS, p6-segment-reg-loads) \
__PMC_EV(P6, CPU_CLK_UNHALTED, p6-cpu-clk-unhalted) \
__PMC_EV(P6, MMX_INSTR_EXEC, p6-mmx-instr-exec) \
__PMC_EV(P6, MMX_SAT_INSTR_EXEC, p6-mmx-sat-instr-exec) \
__PMC_EV(P6, MMX_UOPS_EXEC, p6-mmx-uops-exec) \
__PMC_EV(P6, MMX_INSTR_TYPE_EXEC, p6-mmx-instr-type-exec) \
__PMC_EV(P6, FP_MMX_TRANS, p6-fp-mmx-trans) \
__PMC_EV(P6, MMX_ASSIST, p6-mmx-assist) \
__PMC_EV(P6, MMX_INSTR_RET, p6-mmx-instr-ret) \
__PMC_EV(P6, SEG_RENAME_STALLS, p6-seg-rename-stalls) \
__PMC_EV(P6, SEG_REG_RENAMES, p6-seg-reg-renames) \
__PMC_EV(P6, RET_SEG_RENAMES, p6-ret-seg-renames) \
__PMC_EV(P6, EMON_EST_TRANS, p6-emon-est-trans) \
__PMC_EV(P6, EMON_THERMAL_TRIP, p6-emon-thermal-trip) \
__PMC_EV(P6, BR_INST_EXEC, p6-br-inst-exec) \
__PMC_EV(P6, BR_MISSP_EXEC, p6-br-missp-exec) \
__PMC_EV(P6, BR_BAC_MISSP_EXEC, p6-br-bac-missp-exec) \
__PMC_EV(P6, BR_CND_EXEC, p6-br-cnd-exec) \
__PMC_EV(P6, BR_CND_MISSP_EXEC, p6-br-cnd-missp-exec) \
__PMC_EV(P6, BR_IND_EXEC, p6-br-ind-exec) \
__PMC_EV(P6, BR_IND_MISSP_EXEC, p6-br-ind-missp-exec) \
__PMC_EV(P6, BR_RET_EXEC, p6-br-ret-exec) \
__PMC_EV(P6, BR_RET_MISSP_EXEC, p6-br-ret-missp-exec) \
__PMC_EV(P6, BR_RET_BAC_MISSP_EXEC, p6-br-ret-bac-missp-exec) \
__PMC_EV(P6, BR_CALL_EXEC, p6-br-call-exec) \
__PMC_EV(P6, BR_CALL_MISSP_EXEC, p6-br-call-missp-exec) \
__PMC_EV(P6, BR_IND_CALL_EXEC, p6-br-ind-call-exec) \
__PMC_EV(P6, EMON_SIMD_INSTR_RETIRED, p6-emon-simd-instr-retired) \
__PMC_EV(P6, EMON_SYNCH_UOPS, p6-emon-synch-uops) \
__PMC_EV(P6, EMON_ESP_UOPS, p6-emon-esp-uops) \
__PMC_EV(P6, EMON_FUSED_UOPS_RET, p6-emon-fused-uops-ret) \
__PMC_EV(P6, EMON_UNFUSION, p6-emon-unfusion) \
__PMC_EV(P6, EMON_PREF_RQSTS_UP, p6-emon-pref-rqsts-up) \
__PMC_EV(P6, EMON_PREF_RQSTS_DN, p6-emon-pref-rqsts-dn) \
__PMC_EV(P6, EMON_SSE_SSE2_INST_RETIRED, \
p6-emon-sse-sse2-inst-retired) \
__PMC_EV(P6, EMON_SSE_SSE2_COMP_INST_RETIRED, \
p6-emon-sse-sse2-comp-inst-retired)
#define __PMC_EV_P6() \
__PMC_EV(P6, DATA_MEM_REFS) \
__PMC_EV(P6, DCU_LINES_IN) \
__PMC_EV(P6, DCU_M_LINES_IN) \
__PMC_EV(P6, DCU_M_LINES_OUT) \
__PMC_EV(P6, DCU_MISS_OUTSTANDING) \
__PMC_EV(P6, IFU_FETCH) \
__PMC_EV(P6, IFU_FETCH_MISS) \
__PMC_EV(P6, ITLB_MISS) \
__PMC_EV(P6, IFU_MEM_STALL) \
__PMC_EV(P6, ILD_STALL) \
__PMC_EV(P6, L2_IFETCH) \
__PMC_EV(P6, L2_LD) \
__PMC_EV(P6, L2_ST) \
__PMC_EV(P6, L2_LINES_IN) \
__PMC_EV(P6, L2_LINES_OUT) \
__PMC_EV(P6, L2_M_LINES_INM) \
__PMC_EV(P6, L2_M_LINES_OUTM) \
__PMC_EV(P6, L2_RQSTS) \
__PMC_EV(P6, L2_ADS) \
__PMC_EV(P6, L2_DBUS_BUSY) \
__PMC_EV(P6, L2_DBUS_BUSY_RD) \
__PMC_EV(P6, BUS_DRDY_CLOCKS) \
__PMC_EV(P6, BUS_LOCK_CLOCKS) \
__PMC_EV(P6, BUS_REQ_OUTSTANDING) \
__PMC_EV(P6, BUS_TRAN_BRD) \
__PMC_EV(P6, BUS_TRAN_RFO) \
__PMC_EV(P6, BUS_TRANS_WB) \
__PMC_EV(P6, BUS_TRAN_IFETCH) \
__PMC_EV(P6, BUS_TRAN_INVAL) \
__PMC_EV(P6, BUS_TRAN_PWR) \
__PMC_EV(P6, BUS_TRANS_P) \
__PMC_EV(P6, BUS_TRANS_IO) \
__PMC_EV(P6, BUS_TRAN_DEF) \
__PMC_EV(P6, BUS_TRAN_BURST) \
__PMC_EV(P6, BUS_TRAN_ANY) \
__PMC_EV(P6, BUS_TRAN_MEM) \
__PMC_EV(P6, BUS_DATA_RCV) \
__PMC_EV(P6, BUS_BNR_DRV) \
__PMC_EV(P6, BUS_HIT_DRV) \
__PMC_EV(P6, BUS_HITM_DRV) \
__PMC_EV(P6, BUS_SNOOP_STALL) \
__PMC_EV(P6, FLOPS) \
__PMC_EV(P6, FP_COMPS_OPS_EXE) \
__PMC_EV(P6, FP_ASSIST) \
__PMC_EV(P6, MUL) \
__PMC_EV(P6, DIV) \
__PMC_EV(P6, CYCLES_DIV_BUSY) \
__PMC_EV(P6, LD_BLOCKS) \
__PMC_EV(P6, SB_DRAINS) \
__PMC_EV(P6, MISALIGN_MEM_REF) \
__PMC_EV(P6, EMON_KNI_PREF_DISPATCHED) \
__PMC_EV(P6, EMON_KNI_PREF_MISS) \
__PMC_EV(P6, INST_RETIRED) \
__PMC_EV(P6, UOPS_RETIRED) \
__PMC_EV(P6, INST_DECODED) \
__PMC_EV(P6, EMON_KNI_INST_RETIRED) \
__PMC_EV(P6, EMON_KNI_COMP_INST_RET) \
__PMC_EV(P6, HW_INT_RX) \
__PMC_EV(P6, CYCLES_INT_MASKED) \
__PMC_EV(P6, CYCLES_INT_PENDING_AND_MASKED) \
__PMC_EV(P6, BR_INST_RETIRED) \
__PMC_EV(P6, BR_MISS_PRED_RETIRED) \
__PMC_EV(P6, BR_TAKEN_RETIRED) \
__PMC_EV(P6, BR_MISS_PRED_TAKEN_RET) \
__PMC_EV(P6, BR_INST_DECODED) \
__PMC_EV(P6, BTB_MISSES) \
__PMC_EV(P6, BR_BOGUS) \
__PMC_EV(P6, BACLEARS) \
__PMC_EV(P6, RESOURCE_STALLS) \
__PMC_EV(P6, PARTIAL_RAT_STALLS) \
__PMC_EV(P6, SEGMENT_REG_LOADS) \
__PMC_EV(P6, CPU_CLK_UNHALTED) \
__PMC_EV(P6, MMX_INSTR_EXEC) \
__PMC_EV(P6, MMX_SAT_INSTR_EXEC) \
__PMC_EV(P6, MMX_UOPS_EXEC) \
__PMC_EV(P6, MMX_INSTR_TYPE_EXEC) \
__PMC_EV(P6, FP_MMX_TRANS) \
__PMC_EV(P6, MMX_ASSIST) \
__PMC_EV(P6, MMX_INSTR_RET) \
__PMC_EV(P6, SEG_RENAME_STALLS) \
__PMC_EV(P6, SEG_REG_RENAMES) \
__PMC_EV(P6, RET_SEG_RENAMES) \
__PMC_EV(P6, EMON_EST_TRANS) \
__PMC_EV(P6, EMON_THERMAL_TRIP) \
__PMC_EV(P6, BR_INST_EXEC) \
__PMC_EV(P6, BR_MISSP_EXEC) \
__PMC_EV(P6, BR_BAC_MISSP_EXEC) \
__PMC_EV(P6, BR_CND_EXEC) \
__PMC_EV(P6, BR_CND_MISSP_EXEC) \
__PMC_EV(P6, BR_IND_EXEC) \
__PMC_EV(P6, BR_IND_MISSP_EXEC) \
__PMC_EV(P6, BR_RET_EXEC) \
__PMC_EV(P6, BR_RET_MISSP_EXEC) \
__PMC_EV(P6, BR_RET_BAC_MISSP_EXEC) \
__PMC_EV(P6, BR_CALL_EXEC) \
__PMC_EV(P6, BR_CALL_MISSP_EXEC) \
__PMC_EV(P6, BR_IND_CALL_EXEC) \
__PMC_EV(P6, EMON_SIMD_INSTR_RETIRED) \
__PMC_EV(P6, EMON_SYNCH_UOPS) \
__PMC_EV(P6, EMON_ESP_UOPS) \
__PMC_EV(P6, EMON_FUSED_UOPS_RET) \
__PMC_EV(P6, EMON_UNFUSION) \
__PMC_EV(P6, EMON_PREF_RQSTS_UP) \
__PMC_EV(P6, EMON_PREF_RQSTS_DN) \
__PMC_EV(P6, EMON_SSE_SSE2_INST_RETIRED) \
__PMC_EV(P6, EMON_SSE_SSE2_COMP_INST_RETIRED)
#define PMC_EV_P6_FIRST PMC_EV_P6_DATA_MEM_REFS
@ -250,137 +241,86 @@ __PMC_EV(P6, EMON_SSE_SSE2_COMP_INST_RETIRED, \
/* AMD K8 PMCs */
#define __PMC_EV_K8() \
__PMC_EV(K8, FP_DISPATCHED_FPU_OPS, k8-fp-dispatched-fpu-ops) \
__PMC_EV(K8, FP_CYCLES_WITH_NO_FPU_OPS_RETIRED, \
k8-fp-cycles-with-no-fpu-ops-retired) \
__PMC_EV(K8, FP_DISPATCHED_FPU_FAST_FLAG_OPS, \
k8-fp-dispatched-fpu-fast-flag-ops) \
__PMC_EV(K8, LS_SEGMENT_REGISTER_LOAD, k8-ls-segment-register-load) \
__PMC_EV(K8, LS_MICROARCHITECTURAL_RESYNC_BY_SELF_MODIFYING_CODE, \
k8-ls-microarchitectural-resync-by-self-modifying-code) \
__PMC_EV(K8, LS_MICROARCHITECTURAL_RESYNC_BY_SNOOP, \
k8-ls-microarchitectural-resync-by-snoop) \
__PMC_EV(K8, LS_BUFFER2_FULL, k8-ls-buffer2-full) \
__PMC_EV(K8, LS_LOCKED_OPERATION, k8-ls-locked-operation) \
__PMC_EV(K8, LS_MICROARCHITECTURAL_LATE_CANCEL, \
k8-ls-microarchitectural-late-cancel) \
__PMC_EV(K8, LS_RETIRED_CFLUSH_INSTRUCTIONS, \
k8-ls-retired-cflush-instructions) \
__PMC_EV(K8, LS_RETIRED_CPUID_INSTRUCTIONS, \
k8-ls-retired-cpuid-instructions) \
__PMC_EV(K8, DC_ACCESS, k8-dc-access) \
__PMC_EV(K8, DC_MISS, k8-dc-miss) \
__PMC_EV(K8, DC_REFILL_FROM_L2, k8-dc-refill-from-l2) \
__PMC_EV(K8, DC_REFILL_FROM_SYSTEM, k8-dc-refill-from-system) \
__PMC_EV(K8, DC_COPYBACK, k8-dc-copyback) \
__PMC_EV(K8, DC_L1_DTLB_MISS_AND_L2_DTLB_HIT, \
k8-dc-l1-dtlb-miss-and-l2-dtlb-hit) \
__PMC_EV(K8, DC_L1_DTLB_MISS_AND_L2_DTLB_MISS, \
k8-dc-l1-dtlb-miss-and-l2-dtlb-miss) \
__PMC_EV(K8, DC_MISALIGNED_DATA_REFERENCE, \
k8-dc-misaligned-data-reference) \
__PMC_EV(K8, DC_MICROARCHITECTURAL_LATE_CANCEL, \
k8-dc-microarchitectural-late-cancel-of-an-access) \
__PMC_EV(K8, DC_MICROARCHITECTURAL_EARLY_CANCEL, \
k8-dc-microarchitectural-early-cancel-of-an-access) \
__PMC_EV(K8, DC_ONE_BIT_ECC_ERROR, k8-dc-one-bit-ecc-error) \
__PMC_EV(K8, DC_DISPATCHED_PREFETCH_INSTRUCTIONS, \
k8-dc-dispatched-prefetch-instructions) \
__PMC_EV(K8, DC_DCACHE_ACCESSES_BY_LOCKS, \
k8-dc-dcache-accesses-by-locks) \
__PMC_EV(K8, BU_CPU_CLK_UNHALTED, k8-bu-cpu-clk-unhalted) \
__PMC_EV(K8, BU_INTERNAL_L2_REQUEST, k8-bu-internal-l2-request) \
__PMC_EV(K8, BU_FILL_REQUEST_L2_MISS, k8-bu-fill-request-l2-miss) \
__PMC_EV(K8, BU_FILL_INTO_L2, k8-bu-fill-into-l2) \
__PMC_EV(K8, IC_FETCH, k8-ic-fetch) \
__PMC_EV(K8, IC_MISS, k8-ic-miss) \
__PMC_EV(K8, IC_REFILL_FROM_L2, k8-ic-refill-from-l2) \
__PMC_EV(K8, IC_REFILL_FROM_SYSTEM, k8-ic-refill-from-system) \
__PMC_EV(K8, IC_L1_ITLB_MISS_AND_L2_ITLB_HIT, \
k8-ic-l1-itlb-miss-and-l2-itlb-hit) \
__PMC_EV(K8, IC_L1_ITLB_MISS_AND_L2_ITLB_MISS, \
k8-ic-l1-itlb-miss-and-l2-itlb-miss) \
__PMC_EV(K8, IC_MICROARCHITECTURAL_RESYNC_BY_SNOOP, \
k8-ic-microarchitectural-resync-by-snoop) \
__PMC_EV(K8, IC_INSTRUCTION_FETCH_STALL, \
k8-ic-instruction-fetch-stall) \
__PMC_EV(K8, IC_RETURN_STACK_HIT, k8-ic-return-stack-hit) \
__PMC_EV(K8, IC_RETURN_STACK_OVERFLOW, k8-ic-return-stack-overflow) \
__PMC_EV(K8, FR_RETIRED_X86_INSTRUCTIONS, \
k8-fr-retired-x86-instructions) \
__PMC_EV(K8, FR_RETIRED_UOPS, k8-fr-retired-uops) \
__PMC_EV(K8, FR_RETIRED_BRANCHES, k8-fr-retired-branches) \
__PMC_EV(K8, FR_RETIRED_BRANCHES_MISPREDICTED, \
k8-fr-retired-branches-mispredicted) \
__PMC_EV(K8, FR_RETIRED_TAKEN_BRANCHES, \
k8-fr-retired-taken-branches) \
__PMC_EV(K8, FR_RETIRED_TAKEN_BRANCHES_MISPREDICTED, \
k8-fr-retired-taken-branches-mispredicted) \
__PMC_EV(K8, FR_RETIRED_FAR_CONTROL_TRANSFERS, \
k8-fr-retired-far-control-transfers) \
__PMC_EV(K8, FR_RETIRED_RESYNCS, k8-fr-retired-resyncs) \
__PMC_EV(K8, FR_RETIRED_NEAR_RETURNS, k8-fr-retired-near-returns) \
__PMC_EV(K8, FR_RETIRED_NEAR_RETURNS_MISPREDICTED, \
k8-fr-retired-near-returns-mispredicted) \
__PMC_EV(K8, \
FR_RETIRED_TAKEN_BRANCHES_MISPREDICTED_BY_ADDR_MISCOMPARE, \
k8-fr-retired-taken-branches-mispredicted-by-addr-miscompare) \
__PMC_EV(K8, FR_RETIRED_FPU_INSTRUCTIONS, \
k8-fr-retired-fpu-instructions) \
__PMC_EV(K8, FR_RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS, \
k8-fr-retired-fastpath-double-op-instructions) \
__PMC_EV(K8, FR_INTERRUPTS_MASKED_CYCLES, \
k8-fr-interrupts-masked-cycles) \
__PMC_EV(K8, FR_INTERRUPTS_MASKED_WHILE_PENDING_CYCLES, \
k8-fr-interrupts-masked-while-pending-cycles) \
__PMC_EV(K8, FR_TAKEN_HARDWARE_INTERRUPTS, \
k8-fr-taken-hardware-interrupts) \
__PMC_EV(K8, FR_DECODER_EMPTY, k8-fr-decoder-empty) \
__PMC_EV(K8, FR_DISPATCH_STALLS, k8-fr-dispatch-stalls) \
__PMC_EV(K8, FR_DISPATCH_STALL_FROM_BRANCH_ABORT_TO_RETIRE, \
k8-fr-dispatch-stall-from-branch-abort-to-retire) \
__PMC_EV(K8, FR_DISPATCH_STALL_FOR_SERIALIZATION, \
k8-fr-dispatch-stall-for-serialization) \
__PMC_EV(K8, FR_DISPATCH_STALL_FOR_SEGMENT_LOAD, \
k8-fr-dispatch-stall-for-segment-load) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_REORDER_BUFFER_IS_FULL, \
k8-fr-dispatch-stall-when-reorder-buffer-is-full) \
__PMC_EV(K8, \
FR_DISPATCH_STALL_WHEN_RESERVATION_STATIONS_ARE_FULL, \
k8-fr-dispatch-stall-when-reservation-stations-are-full) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_FPU_IS_FULL, \
k8-fr-dispatch-stall-when-fpu-is-full) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_LS_IS_FULL, \
k8-fr-dispatch-stall-when-ls-is-full) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_WAITING_FOR_ALL_TO_BE_QUIET, \
k8-fr-dispatch-stall-when-waiting-for-all-to-be-quiet) \
__PMC_EV(K8, \
FR_DISPATCH_STALL_WHEN_FAR_XFER_OR_RESYNC_BRANCH_PENDING, \
k8-fr-dispatch-stall-when-far-xfer-or-resync-branch-pending) \
__PMC_EV(K8, FR_FPU_EXCEPTIONS, k8-fr-fpu-exceptions) \
__PMC_EV(K8, FR_NUMBER_OF_BREAKPOINTS_FOR_DR0, \
k8-fr-number-of-breakpoints-for-dr0) \
__PMC_EV(K8, FR_NUMBER_OF_BREAKPOINTS_FOR_DR1, \
k8-fr-number-of-breakpoints-for-dr1) \
__PMC_EV(K8, FR_NUMBER_OF_BREAKPOINTS_FOR_DR2, \
k8-fr-number-of-breakpoints-for-dr2) \
__PMC_EV(K8, FR_NUMBER_OF_BREAKPOINTS_FOR_DR3, \
k8-fr-number-of-breakpoints-for-dr3) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_PAGE_ACCESS_EVENT, \
k8-nb-memory-controller-page-access-event) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_PAGE_TABLE_OVERFLOW, \
k8-nb-memory-controller-page-table-overflow) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_DRAM_COMMAND_SLOTS_MISSED, \
k8-nb-memory-controller-dram-slots-missed) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_TURNAROUND, \
k8-nb-memory-controller-turnaround) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_BYPASS_SATURATION, \
k8-nb-memory-controller-bypass-saturation) \
__PMC_EV(K8, NB_SIZED_COMMANDS, k8-nb-sized-commands) \
__PMC_EV(K8, NB_PROBE_RESULT, k8-nb-probe-result) \
__PMC_EV(K8, NB_HT_BUS0_BANDWIDTH, k8-nb-ht-bus0-bandwidth) \
__PMC_EV(K8, NB_HT_BUS1_BANDWIDTH, k8-nb-ht-bus1-bandwidth) \
__PMC_EV(K8, NB_HT_BUS2_BANDWIDTH, k8-nb-ht-bus2-bandwidth)
__PMC_EV(K8, FP_DISPATCHED_FPU_OPS) \
__PMC_EV(K8, FP_CYCLES_WITH_NO_FPU_OPS_RETIRED) \
__PMC_EV(K8, FP_DISPATCHED_FPU_FAST_FLAG_OPS) \
__PMC_EV(K8, LS_SEGMENT_REGISTER_LOAD) \
__PMC_EV(K8, LS_MICROARCHITECTURAL_RESYNC_BY_SELF_MODIFYING_CODE) \
__PMC_EV(K8, LS_MICROARCHITECTURAL_RESYNC_BY_SNOOP) \
__PMC_EV(K8, LS_BUFFER2_FULL) \
__PMC_EV(K8, LS_LOCKED_OPERATION) \
__PMC_EV(K8, LS_MICROARCHITECTURAL_LATE_CANCEL) \
__PMC_EV(K8, LS_RETIRED_CFLUSH_INSTRUCTIONS) \
__PMC_EV(K8, LS_RETIRED_CPUID_INSTRUCTIONS) \
__PMC_EV(K8, DC_ACCESS) \
__PMC_EV(K8, DC_MISS) \
__PMC_EV(K8, DC_REFILL_FROM_L2) \
__PMC_EV(K8, DC_REFILL_FROM_SYSTEM) \
__PMC_EV(K8, DC_COPYBACK) \
__PMC_EV(K8, DC_L1_DTLB_MISS_AND_L2_DTLB_HIT) \
__PMC_EV(K8, DC_L1_DTLB_MISS_AND_L2_DTLB_MISS) \
__PMC_EV(K8, DC_MISALIGNED_DATA_REFERENCE) \
__PMC_EV(K8, DC_MICROARCHITECTURAL_LATE_CANCEL) \
__PMC_EV(K8, DC_MICROARCHITECTURAL_EARLY_CANCEL) \
__PMC_EV(K8, DC_ONE_BIT_ECC_ERROR) \
__PMC_EV(K8, DC_DISPATCHED_PREFETCH_INSTRUCTIONS) \
__PMC_EV(K8, DC_DCACHE_ACCESSES_BY_LOCKS) \
__PMC_EV(K8, BU_CPU_CLK_UNHALTED) \
__PMC_EV(K8, BU_INTERNAL_L2_REQUEST) \
__PMC_EV(K8, BU_FILL_REQUEST_L2_MISS) \
__PMC_EV(K8, BU_FILL_INTO_L2) \
__PMC_EV(K8, IC_FETCH) \
__PMC_EV(K8, IC_MISS) \
__PMC_EV(K8, IC_REFILL_FROM_L2) \
__PMC_EV(K8, IC_REFILL_FROM_SYSTEM) \
__PMC_EV(K8, IC_L1_ITLB_MISS_AND_L2_ITLB_HIT) \
__PMC_EV(K8, IC_L1_ITLB_MISS_AND_L2_ITLB_MISS) \
__PMC_EV(K8, IC_MICROARCHITECTURAL_RESYNC_BY_SNOOP) \
__PMC_EV(K8, IC_INSTRUCTION_FETCH_STALL) \
__PMC_EV(K8, IC_RETURN_STACK_HIT) \
__PMC_EV(K8, IC_RETURN_STACK_OVERFLOW) \
__PMC_EV(K8, FR_RETIRED_X86_INSTRUCTIONS) \
__PMC_EV(K8, FR_RETIRED_UOPS) \
__PMC_EV(K8, FR_RETIRED_BRANCHES) \
__PMC_EV(K8, FR_RETIRED_BRANCHES_MISPREDICTED) \
__PMC_EV(K8, FR_RETIRED_TAKEN_BRANCHES) \
__PMC_EV(K8, FR_RETIRED_TAKEN_BRANCHES_MISPREDICTED) \
__PMC_EV(K8, FR_RETIRED_FAR_CONTROL_TRANSFERS) \
__PMC_EV(K8, FR_RETIRED_RESYNCS) \
__PMC_EV(K8, FR_RETIRED_NEAR_RETURNS) \
__PMC_EV(K8, FR_RETIRED_NEAR_RETURNS_MISPREDICTED) \
__PMC_EV(K8, FR_RETIRED_TAKEN_BRANCHES_MISPREDICTED_BY_ADDR_MISCOMPARE) \
__PMC_EV(K8, FR_RETIRED_FPU_INSTRUCTIONS) \
__PMC_EV(K8, FR_RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS) \
__PMC_EV(K8, FR_INTERRUPTS_MASKED_CYCLES) \
__PMC_EV(K8, FR_INTERRUPTS_MASKED_WHILE_PENDING_CYCLES) \
__PMC_EV(K8, FR_TAKEN_HARDWARE_INTERRUPTS) \
__PMC_EV(K8, FR_DECODER_EMPTY) \
__PMC_EV(K8, FR_DISPATCH_STALLS) \
__PMC_EV(K8, FR_DISPATCH_STALL_FROM_BRANCH_ABORT_TO_RETIRE) \
__PMC_EV(K8, FR_DISPATCH_STALL_FOR_SERIALIZATION) \
__PMC_EV(K8, FR_DISPATCH_STALL_FOR_SEGMENT_LOAD) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_REORDER_BUFFER_IS_FULL) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_RESERVATION_STATIONS_ARE_FULL) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_FPU_IS_FULL) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_LS_IS_FULL) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_WAITING_FOR_ALL_TO_BE_QUIET) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_FAR_XFER_OR_RESYNC_BRANCH_PENDING) \
__PMC_EV(K8, FR_FPU_EXCEPTIONS) \
__PMC_EV(K8, FR_NUMBER_OF_BREAKPOINTS_FOR_DR0) \
__PMC_EV(K8, FR_NUMBER_OF_BREAKPOINTS_FOR_DR1) \
__PMC_EV(K8, FR_NUMBER_OF_BREAKPOINTS_FOR_DR2) \
__PMC_EV(K8, FR_NUMBER_OF_BREAKPOINTS_FOR_DR3) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_PAGE_ACCESS_EVENT) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_PAGE_TABLE_OVERFLOW) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_DRAM_COMMAND_SLOTS_MISSED) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_TURNAROUND) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_BYPASS_SATURATION) \
__PMC_EV(K8, NB_SIZED_COMMANDS) \
__PMC_EV(K8, NB_PROBE_RESULT) \
__PMC_EV(K8, NB_HT_BUS0_BANDWIDTH) \
__PMC_EV(K8, NB_HT_BUS1_BANDWIDTH) \
__PMC_EV(K8, NB_HT_BUS2_BANDWIDTH)
#define PMC_EV_K8_FIRST PMC_EV_K8_FP_DISPATCHED_FPU_OPS
#define PMC_EV_K8_LAST PMC_EV_K8_NB_HT_BUS2_BANDWIDTH
@ -392,143 +332,133 @@ __PMC_EV(K8, NB_HT_BUS2_BANDWIDTH, k8-nb-ht-bus2-bandwidth)
* System Programming Guide, Part 2, August 2007".
*/
#define __PMC_EV_P5() \
__PMC_EV(P5, DATA_READ, p5-data-read) \
__PMC_EV(P5, DATA_WRITE, p5-data-write) \
__PMC_EV(P5, DATA_TLB_MISS, p5-data-tlb-miss) \
__PMC_EV(P5, DATA_READ_MISS, p5-data-read-miss) \
__PMC_EV(P5, DATA_WRITE_MISS, p5-data-write-miss) \
__PMC_EV(P5, WRITE_HIT_TO_M_OR_E_STATE_LINES, \
p5-write-hit-to-m-or-e-state-lines) \
__PMC_EV(P5, DATA_CACHE_LINES_WRITTEN_BACK, \
p5-data-cache-lines-written-back) \
__PMC_EV(P5, EXTERNAL_SNOOPS, p5-external-snoops) \
__PMC_EV(P5, EXTERNAL_DATA_CACHE_SNOOP_HITS, \
p5-external-data-cache-snoop-hits) \
__PMC_EV(P5, MEMORY_ACCESSES_IN_BOTH_PIPES, \
p5-memory-accesses-in-both-pipes) \
__PMC_EV(P5, BANK_CONFLICTS, p5-bank-conflicts) \
__PMC_EV(P5, MISALIGNED_DATA_OR_IO_REFERENCES, \
p5-misaligned-data-or-io-references) \
__PMC_EV(P5, CODE_READ, p5-code-read) \
__PMC_EV(P5, CODE_TLB_MISS, p5-code-tlb-miss) \
__PMC_EV(P5, CODE_CACHE_MISS, p5-code-cache-miss) \
__PMC_EV(P5, ANY_SEGMENT_REGISTER_LOADED, \
p5-any-segment-register-loaded) \
__PMC_EV(P5, BRANCHES, p5-branches) \
__PMC_EV(P5, BTB_HITS, p5-btb-hits) \
__PMC_EV(P5, TAKEN_BRANCH_OR_BTB_HIT, \
p5-taken-branch-or-btb-hit) \
__PMC_EV(P5, PIPELINE_FLUSHES, p5-pipeline-flushes) \
__PMC_EV(P5, INSTRUCTIONS_EXECUTED, p5-instructions-executed) \
__PMC_EV(P5, INSTRUCTIONS_EXECUTED_V_PIPE, \
p5-instructions-executed-v-pipe) \
__PMC_EV(P5, BUS_CYCLE_DURATION, p5-bus-cycle-duration) \
__PMC_EV(P5, WRITE_BUFFER_FULL_STALL_DURATION, \
p5-write-buffer-full-stall-duration) \
__PMC_EV(P5, WAITING_FOR_DATA_MEMORY_READ_STALL_DURATION, \
p5-waiting-for-data-memory-read-stall-duration) \
__PMC_EV(P5, STALL_ON_WRITE_TO_AN_E_OR_M_STATE_LINE, \
p5-stall-on-write-to-an-e-or-m-state-line) \
__PMC_EV(P5, LOCKED_BUS_CYCLE, p5-locked-bus-cycle) \
__PMC_EV(P5, IO_READ_OR_WRITE_CYCLE, p5-io-read-or-write-cycle) \
__PMC_EV(P5, NONCACHEABLE_MEMORY_READS, \
p5-noncacheable-memory-reads) \
__PMC_EV(P5, PIPELINE_AGI_STALLS, p5-pipeline-agi-stalls) \
__PMC_EV(P5, FLOPS, p5-flops) \
__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR0_REGISTER, \
p5-breakpoint-match-on-dr0-register) \
__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR1_REGISTER, \
p5-breakpoint-match-on-dr1-register) \
__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR2_REGISTER, \
p5-breakpoint-match-on-dr2-register) \
__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR3_REGISTER, \
p5-breakpoint-match-on-dr3-register) \
__PMC_EV(P5, HARDWARE_INTERRUPTS, p5-hardware-interrupts) \
__PMC_EV(P5, DATA_READ_OR_WRITE, p5-data-read-or-write) \
__PMC_EV(P5, DATA_READ_MISS_OR_WRITE_MISS, \
p5-data-read-miss-or-write-miss) \
__PMC_EV(P5, BUS_OWNERSHIP_LATENCY, p5-bus-ownership-latency) \
__PMC_EV(P5, BUS_OWNERSHIP_TRANSFERS, p5-bus-ownership-transfers) \
__PMC_EV(P5, MMX_INSTRUCTIONS_EXECUTED_U_PIPE, \
p5-mmx-instructions-executed-u-pipe) \
__PMC_EV(P5, MMX_INSTRUCTIONS_EXECUTED_V_PIPE, \
p5-mmx-instructions-executed-v-pipe) \
__PMC_EV(P5, CACHE_M_LINE_SHARING, p5-cache-m-line-sharing) \
__PMC_EV(P5, CACHE_LINE_SHARING, p5-cache-line-sharing) \
__PMC_EV(P5, EMMS_INSTRUCTIONS_EXECUTED, \
p5-emms-instructions-executed) \
__PMC_EV(P5, TRANSITIONS_BETWEEN_MMX_AND_FP_INSTRUCTIONS, \
p5-transitions-between-mmx-and-fp-instructions) \
__PMC_EV(P5, BUS_UTILIZATION_DUE_TO_PROCESSOR_ACTIVITY, \
p5-bus-utilization-due-to-processor-activity) \
__PMC_EV(P5, WRITES_TO_NONCACHEABLE_MEMORY, \
p5-writes-to-noncacheable-memory) \
__PMC_EV(P5, SATURATING_MMX_INSTRUCTIONS_EXECUTED, \
p5-saturating-mmx-instructions-executed) \
__PMC_EV(P5, SATURATIONS_PERFORMED, p5-saturations-performed) \
__PMC_EV(P5, NUMBER_OF_CYCLES_NOT_IN_HALT_STATE, \
p5-number-of-cycles-not-in-halt-state) \
__PMC_EV(P5, DATA_CACHE_TLB_MISS_STALL_DURATION, \
p5-data-cache-tlb-miss-stall-duration) \
__PMC_EV(P5, MMX_INSTRUCTION_DATA_READS, \
p5-mmx-instruction-data-reads) \
__PMC_EV(P5, MMX_INSTRUCTION_DATA_READ_MISSES, \
p5-mmx-instruction-data-read-misses) \
__PMC_EV(P5, FLOATING_POINT_STALLS_DURATION, \
p5-floating-point-stalls-duration) \
__PMC_EV(P5, TAKEN_BRANCHES, p5-taken-branches) \
__PMC_EV(P5, D1_STARVATION_AND_FIFO_IS_EMPTY, \
p5-d1-starvation-and-fifo-is-empty) \
__PMC_EV(P5, D1_STARVATION_AND_ONLY_ONE_INSTRUCTION_IN_FIFO, \
p5-d1-starvation-and-only-instruction-in-fifo) \
__PMC_EV(P5, MMX_INSTRUCTION_DATA_WRITES, \
p5-mmx-instruction-data-writes) \
__PMC_EV(P5, MMX_INSTRUCTION_DATA_WRITE_MISSES, \
p5-mmx-instruction-data-write-misses) \
__PMC_EV(P5, PIPELINE_FLUSHES_DUE_TO_WRONG_BRANCH_PREDICTIONS, \
p5-pipeline-flushes-due-to-wrong-branch-predictions) \
__PMC_EV(P5, DATA_READ) \
__PMC_EV(P5, DATA_WRITE) \
__PMC_EV(P5, DATA_TLB_MISS) \
__PMC_EV(P5, DATA_READ_MISS) \
__PMC_EV(P5, DATA_WRITE_MISS) \
__PMC_EV(P5, WRITE_HIT_TO_M_OR_E_STATE_LINES) \
__PMC_EV(P5, DATA_CACHE_LINES_WRITTEN_BACK) \
__PMC_EV(P5, EXTERNAL_SNOOPS) \
__PMC_EV(P5, EXTERNAL_DATA_CACHE_SNOOP_HITS) \
__PMC_EV(P5, MEMORY_ACCESSES_IN_BOTH_PIPES) \
__PMC_EV(P5, BANK_CONFLICTS) \
__PMC_EV(P5, MISALIGNED_DATA_OR_IO_REFERENCES) \
__PMC_EV(P5, CODE_READ) \
__PMC_EV(P5, CODE_TLB_MISS) \
__PMC_EV(P5, CODE_CACHE_MISS) \
__PMC_EV(P5, ANY_SEGMENT_REGISTER_LOADED) \
__PMC_EV(P5, BRANCHES) \
__PMC_EV(P5, BTB_HITS) \
__PMC_EV(P5, TAKEN_BRANCH_OR_BTB_HIT) \
__PMC_EV(P5, PIPELINE_FLUSHES) \
__PMC_EV(P5, INSTRUCTIONS_EXECUTED) \
__PMC_EV(P5, INSTRUCTIONS_EXECUTED_V_PIPE) \
__PMC_EV(P5, BUS_CYCLE_DURATION) \
__PMC_EV(P5, WRITE_BUFFER_FULL_STALL_DURATION) \
__PMC_EV(P5, WAITING_FOR_DATA_MEMORY_READ_STALL_DURATION) \
__PMC_EV(P5, STALL_ON_WRITE_TO_AN_E_OR_M_STATE_LINE) \
__PMC_EV(P5, LOCKED_BUS_CYCLE) \
__PMC_EV(P5, IO_READ_OR_WRITE_CYCLE) \
__PMC_EV(P5, NONCACHEABLE_MEMORY_READS) \
__PMC_EV(P5, PIPELINE_AGI_STALLS) \
__PMC_EV(P5, FLOPS) \
__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR0_REGISTER) \
__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR1_REGISTER) \
__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR2_REGISTER) \
__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR3_REGISTER) \
__PMC_EV(P5, HARDWARE_INTERRUPTS) \
__PMC_EV(P5, DATA_READ_OR_WRITE) \
__PMC_EV(P5, DATA_READ_MISS_OR_WRITE_MISS) \
__PMC_EV(P5, BUS_OWNERSHIP_LATENCY) \
__PMC_EV(P5, BUS_OWNERSHIP_TRANSFERS) \
__PMC_EV(P5, MMX_INSTRUCTIONS_EXECUTED_U_PIPE) \
__PMC_EV(P5, MMX_INSTRUCTIONS_EXECUTED_V_PIPE) \
__PMC_EV(P5, CACHE_M_LINE_SHARING) \
__PMC_EV(P5, CACHE_LINE_SHARING) \
__PMC_EV(P5, EMMS_INSTRUCTIONS_EXECUTED) \
__PMC_EV(P5, TRANSITIONS_BETWEEN_MMX_AND_FP_INSTRUCTIONS) \
__PMC_EV(P5, BUS_UTILIZATION_DUE_TO_PROCESSOR_ACTIVITY) \
__PMC_EV(P5, WRITES_TO_NONCACHEABLE_MEMORY) \
__PMC_EV(P5, SATURATING_MMX_INSTRUCTIONS_EXECUTED) \
__PMC_EV(P5, SATURATIONS_PERFORMED) \
__PMC_EV(P5, NUMBER_OF_CYCLES_NOT_IN_HALT_STATE) \
__PMC_EV(P5, DATA_CACHE_TLB_MISS_STALL_DURATION) \
__PMC_EV(P5, MMX_INSTRUCTION_DATA_READS) \
__PMC_EV(P5, MMX_INSTRUCTION_DATA_READ_MISSES) \
__PMC_EV(P5, FLOATING_POINT_STALLS_DURATION) \
__PMC_EV(P5, TAKEN_BRANCHES) \
__PMC_EV(P5, D1_STARVATION_AND_FIFO_IS_EMPTY) \
__PMC_EV(P5, D1_STARVATION_AND_ONLY_ONE_INSTRUCTION_IN_FIFO) \
__PMC_EV(P5, MMX_INSTRUCTION_DATA_WRITES) \
__PMC_EV(P5, MMX_INSTRUCTION_DATA_WRITE_MISSES) \
__PMC_EV(P5, PIPELINE_FLUSHES_DUE_TO_WRONG_BRANCH_PREDICTIONS) \
__PMC_EV(P5, \
PIPELINE_FLUSHES_DUE_TO_WRONG_BRANCH_PREDICTIONS_RESOLVED_IN_WB_STAGE, \
p5-pipeline-flushes-due-to-wrong-branch-predictions-resolved-in-wb-stage) \
__PMC_EV(P5, MISALIGNED_DATA_MEMORY_REFERENCE_ON_MMX_INSTRUCTIONS, \
p5-misaligned-data-memory-reference-on-mmx-instructions) \
__PMC_EV(P5, PIPELINE_STALL_FOR_MMX_INSTRUCTION_DATA_MEMORY_READS, \
p5-pipeline-stall-for-mmx-instruction-data-memory-reads) \
__PMC_EV(P5, MISPREDICTED_OR_UNPREDICTED_RETURNS, \
p5-mispredicted-or-unpredicted-returns) \
__PMC_EV(P5, PREDICTED_RETURNS, p5-predicted-returns) \
__PMC_EV(P5, MMX_MULTIPLY_UNIT_INTERLOCK, \
p5-mmx-multiply-unit-interlock) \
__PMC_EV(P5, MOVD_MOVQ_STORE_STALL_DUE_TO_PREVIOUS_MMX_OPERATION, \
p5-movd-movq-store-stall-due-to-previous-mmx-operation) \
__PMC_EV(P5, RETURNS, p5-returns) \
__PMC_EV(P5, BTB_FALSE_ENTRIES, p5-btb-false-entries) \
__PMC_EV(P5, BTB_MISS_PREDICTION_ON_NOT_TAKEN_BRANCH, \
p5-btb-miss-prediction-on-not-taken-branch) \
PIPELINE_FLUSHES_DUE_TO_WRONG_BRANCH_PREDICTIONS_RESOLVED_IN_WB_STAGE) \
__PMC_EV(P5, MISALIGNED_DATA_MEMORY_REFERENCE_ON_MMX_INSTRUCTIONS) \
__PMC_EV(P5, PIPELINE_STALL_FOR_MMX_INSTRUCTION_DATA_MEMORY_READS) \
__PMC_EV(P5, MISPREDICTED_OR_UNPREDICTED_RETURNS) \
__PMC_EV(P5, PREDICTED_RETURNS) \
__PMC_EV(P5, MMX_MULTIPLY_UNIT_INTERLOCK) \
__PMC_EV(P5, MOVD_MOVQ_STORE_STALL_DUE_TO_PREVIOUS_MMX_OPERATION) \
__PMC_EV(P5, RETURNS) \
__PMC_EV(P5, BTB_FALSE_ENTRIES) \
__PMC_EV(P5, BTB_MISS_PREDICTION_ON_NOT_TAKEN_BRANCH) \
__PMC_EV(P5, \
FULL_WRITE_BUFFER_STALL_DURATION_WHILE_EXECUTING_MMX_INSTRUCTIONS, \
p5-full-write-buffer-stall-duration-while-executing-mmx-instructions) \
__PMC_EV(P5, STALL_ON_MMX_INSTRUCTION_WRITE_TO_E_OR_M_STATE_LINE, \
p5-stall-on-mmx-instruction-write-to-e-or-m-state-line)
FULL_WRITE_BUFFER_STALL_DURATION_WHILE_EXECUTING_MMX_INSTRUCTIONS) \
__PMC_EV(P5, STALL_ON_MMX_INSTRUCTION_WRITE_TO_E_OR_M_STATE_LINE)
#define PMC_EV_P5_FIRST PMC_EV_P5_DATA_READ
#define PMC_EV_P5_LAST \
PMC_EV_P5_STALL_ON_MMX_INSTRUCTION_WRITE_TO_E_OR_M_STATE_LINE
#define __PMC_EV_IAF() /* Intel architectural fixed function */
#define __PMC_EV_IAP() /* Intel architectural programmable */
/* timestamp counters. */
#define __PMC_EV_TSC() \
__PMC_EV(TSC, TSC, tsc)
__PMC_EV(TSC, TSC)
/* All known PMC events */
#define __PMC_EVENTS() \
__PMC_EV_TSC() \
__PMC_EV_K7() \
__PMC_EV_P6() \
__PMC_EV_P4() \
__PMC_EV_K8() \
__PMC_EV_P5() \
#define PMC_EV_TSC_FIRST PMC_EV_TSC_TSC
#define PMC_EV_TSC_LAST PMC_EV_TSC_TSC
/*
* All known PMC events.
*
* PMC event numbers are allocated sparsely to allow new PMC events to
* be added to a PMC class without breaking ABI compatibility. The
* current allocation scheme is:
*
* START #EVENTS DESCRIPTION
* 0 0x1000 Reserved
* 0x1000 0x0001 TSC
* 0x2000 0x0080 AMD K7 events
* 0x2080 0x0100 AMD K8 events
* 0x10000 0x0080 INTEL architectural fixed-function events
* 0x10080 0x0F80 INTEL architectural programmable events
* 0x11000 0x0080 INTEL Pentium 4 events
* 0x11080 0x0080 INTEL Pentium MMX events
* 0x11100 0x0100 INTEL Pentium Pro/P-II/P-III/Pentium-M events
*/
#define __PMC_EVENTS() \
__PMC_EV_BLOCK(TSC, 0x01000) \
__PMC_EV_TSC() \
__PMC_EV_BLOCK(K7, 0x2000) \
__PMC_EV_K7() \
__PMC_EV_BLOCK(K8, 0x2080) \
__PMC_EV_K8() \
__PMC_EV_BLOCK(IAF, 0x10000) \
__PMC_EV_IAF() \
__PMC_EV_BLOCK(IAP, 0x10080) \
__PMC_EV_IAP() \
__PMC_EV_BLOCK(P4, 0x11000) \
__PMC_EV_P4() \
__PMC_EV_BLOCK(P5, 0x11080) \
__PMC_EV_P5() \
__PMC_EV_BLOCK(P6, 0x11100) \
__PMC_EV_P6()
#define PMC_EVENT_FIRST PMC_EV_TSC_TSC
#define PMC_EVENT_LAST PMC_EV_P5_LAST
#define PMC_EVENT_LAST PMC_EV_P6_LAST
#endif /* _DEV_HWPMC_PMC_EVENTS_H_ */

47
sys/sys/pmc.h
View File

@ -62,31 +62,36 @@
PMC_VERSION_MINOR << 16 | PMC_VERSION_PATCH)
/*
* Kinds of CPUs known
* Kinds of CPUs known.
*
* We keep track of CPU variants that need to be distinguished in
* some way for PMC operations. CPU names are grouped by manufacturer
* and numbered sparsely in order to minimize changes to the ABI involved
* when new CPUs are added.
*/
#define __PMC_CPUS() \
__PMC_CPU(AMD_K7, "AMD K7") \
__PMC_CPU(AMD_K8, "AMD K8") \
__PMC_CPU(INTEL_P5, "Intel Pentium") \
__PMC_CPU(INTEL_P6, "Intel Pentium Pro") \
__PMC_CPU(INTEL_CL, "Intel Celeron") \
__PMC_CPU(INTEL_PII, "Intel Pentium II") \
__PMC_CPU(INTEL_PIII, "Intel Pentium III") \
__PMC_CPU(INTEL_PM, "Intel Pentium M") \
__PMC_CPU(INTEL_PIV, "Intel Pentium IV") \
__PMC_CPU(INTEL_CORE, "Intel Core Solo/Duo") \
__PMC_CPU(INTEL_CORE2,"Intel Core2") \
__PMC_CPU(INTEL_ATOM, "Intel Atom")
#define __PMC_CPUS() \
__PMC_CPU(AMD_K7, 0x00, "AMD K7") \
__PMC_CPU(AMD_K8, 0x01, "AMD K8") \
__PMC_CPU(INTEL_P5, 0x80, "Intel Pentium") \
__PMC_CPU(INTEL_P6, 0x81, "Intel Pentium Pro") \
__PMC_CPU(INTEL_CL, 0x82, "Intel Celeron") \
__PMC_CPU(INTEL_PII, 0x83, "Intel Pentium II") \
__PMC_CPU(INTEL_PIII, 0x84, "Intel Pentium III") \
__PMC_CPU(INTEL_PM, 0x85, "Intel Pentium M") \
__PMC_CPU(INTEL_PIV, 0x86, "Intel Pentium IV") \
__PMC_CPU(INTEL_CORE, 0x87, "Intel Core Solo/Duo") \
__PMC_CPU(INTEL_CORE2, 0x88, "Intel Core2") \
__PMC_CPU(INTEL_ATOM, 0x8A, "Intel Atom")
enum pmc_cputype {
#undef __PMC_CPU
#define __PMC_CPU(S,D) PMC_CPU_##S ,
#define __PMC_CPU(S,V,D) PMC_CPU_##S = V,
__PMC_CPUS()
};
#define PMC_CPU_FIRST PMC_CPU_AMD_K7
#define PMC_CPU_LAST PMC_CPU_INTEL_PIV
#define PMC_CPU_LAST PMC_CPU_INTEL_ATOM
/*
* Classes of PMCs
@ -109,7 +114,7 @@ enum pmc_class {
};
#define PMC_CLASS_FIRST PMC_CLASS_TSC
#define PMC_CLASS_LAST PMC_CLASS_P4
#define PMC_CLASS_LAST PMC_CLASS_IAP
/*
* A PMC can be in the following states:
@ -257,13 +262,12 @@ enum pmc_caps
enum pmc_event {
#undef __PMC_EV
#define __PMC_EV(C,N,D) PMC_EV_ ## C ## _ ## N ,
#undef __PMC_EV_BLOCK
#define __PMC_EV_BLOCK(C,V) PMC_EV_ ## C ## __BLOCK_START = (V) - 1 ,
#define __PMC_EV(C,N) PMC_EV_ ## C ## _ ## N ,
__PMC_EVENTS()
};
#define PMC_EVENT_FIRST PMC_EV_TSC_TSC
#define PMC_EVENT_LAST PMC_EV_P5_LAST
/*
* PMC SYSCALL INTERFACE
*/
@ -291,6 +295,7 @@ enum pmc_event {
__PMC_OP(PMCSTOP, "Start a PMC") \
__PMC_OP(WRITELOG, "Write a cookie to the log file")
enum pmc_ops {
#undef __PMC_OP
#define __PMC_OP(N, D) PMC_OP_##N,