Add a tunable "machdep.disable_tsc" to turn off TSC. Specifically, it turns
off boot-time CPU frequency calibration, DELAY(9) with TSC, and using TSC as a CPU ticker. Note tsc_present does not change by this tunable.
This commit is contained in:
parent
9a7836dce1
commit
79422085d4
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=219473
@ -80,6 +80,9 @@ __FBSDID("$FreeBSD$");
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#include <sys/reboot.h>
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#include <sys/sched.h>
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#include <sys/signalvar.h>
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#ifdef SMP
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#include <sys/smp.h>
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#endif
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#include <sys/syscallsubr.h>
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#include <sys/sysctl.h>
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#include <sys/sysent.h>
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@ -544,20 +547,22 @@ cpu_est_clockrate(int cpu_id, uint64_t *rate)
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return (EINVAL);
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/* If TSC is P-state invariant, DELAY(9) based logic fails. */
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if (tsc_is_invariant)
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if (tsc_is_invariant && tsc_freq != 0)
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return (EOPNOTSUPP);
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/* If we're booting, trust the rate calibrated moments ago. */
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if (cold) {
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if (cold && tsc_freq != 0) {
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*rate = tsc_freq;
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return (0);
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}
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#ifdef SMP
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/* Schedule ourselves on the indicated cpu. */
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thread_lock(curthread);
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sched_bind(curthread, cpu_id);
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thread_unlock(curthread);
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if (smp_cpus > 1) {
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/* Schedule ourselves on the indicated cpu. */
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thread_lock(curthread);
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sched_bind(curthread, cpu_id);
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thread_unlock(curthread);
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}
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#endif
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/* Calibrate by measuring a short delay. */
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@ -568,12 +573,24 @@ cpu_est_clockrate(int cpu_id, uint64_t *rate)
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intr_restore(reg);
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#ifdef SMP
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thread_lock(curthread);
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sched_unbind(curthread);
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thread_unlock(curthread);
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if (smp_cpus > 1) {
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thread_lock(curthread);
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sched_unbind(curthread);
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thread_unlock(curthread);
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}
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#endif
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*rate = (tsc2 - tsc1) * 1000;
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tsc2 -= tsc1;
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if (tsc_freq != 0) {
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*rate = tsc2 * 1000;
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return (0);
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}
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/*
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* Subtract 0.5% of the total. Empirical testing has shown that
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* overhead in DELAY() works out to approximately this value.
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*/
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*rate = tsc2 * 1000 - tsc2 * 5;
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return (0);
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}
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@ -78,10 +78,10 @@
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#include <machine/clock.h>
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#endif
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#if defined(__amd64__) || defined(__i386__)
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#include <machine/cpu.h> /* for cpu_feature or tsc_present */
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#include <machine/cpufunc.h> /* for pentium tsc */
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#if defined(__NetBSD__) || defined(__OpenBSD__)
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#include <machine/specialreg.h> /* for CPUID_TSC */
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#include <machine/cpu.h> /* for cpu_feature */
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#endif
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#endif /* __amd64 || __i386__ */
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@ -927,7 +927,7 @@ init_machclk_setup(void)
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#if defined(__amd64__) || defined(__i386__)
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/* check if TSC is available */
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#ifdef __FreeBSD__
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if (tsc_freq == 0)
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if (!tsc_present || tsc_freq == 0)
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#else
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if ((cpu_feature & CPUID_TSC) == 0)
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#endif
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@ -79,6 +79,9 @@ __FBSDID("$FreeBSD$");
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#include <sys/reboot.h>
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#include <sys/sched.h>
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#include <sys/signalvar.h>
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#ifdef SMP
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#include <sys/smp.h>
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#endif
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#include <sys/syscallsubr.h>
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#include <sys/sysctl.h>
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#include <sys/sysent.h>
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@ -1142,20 +1145,22 @@ cpu_est_clockrate(int cpu_id, uint64_t *rate)
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return (EOPNOTSUPP);
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/* If TSC is P-state invariant, DELAY(9) based logic fails. */
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if (tsc_is_invariant)
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if (tsc_is_invariant && tsc_freq != 0)
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return (EOPNOTSUPP);
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/* If we're booting, trust the rate calibrated moments ago. */
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if (cold) {
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if (cold && tsc_freq != 0) {
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*rate = tsc_freq;
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return (0);
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}
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#ifdef SMP
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/* Schedule ourselves on the indicated cpu. */
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thread_lock(curthread);
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sched_bind(curthread, cpu_id);
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thread_unlock(curthread);
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if (smp_cpus > 1) {
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/* Schedule ourselves on the indicated cpu. */
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thread_lock(curthread);
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sched_bind(curthread, cpu_id);
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thread_unlock(curthread);
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}
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#endif
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/* Calibrate by measuring a short delay. */
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@ -1166,9 +1171,11 @@ cpu_est_clockrate(int cpu_id, uint64_t *rate)
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intr_restore(reg);
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#ifdef SMP
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thread_lock(curthread);
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sched_unbind(curthread);
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thread_unlock(curthread);
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if (smp_cpus > 1) {
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thread_lock(curthread);
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sched_unbind(curthread);
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thread_unlock(curthread);
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}
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#endif
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tsc2 -= tsc1;
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@ -77,6 +77,9 @@ __FBSDID("$FreeBSD$");
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#include <sys/reboot.h>
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#include <sys/sched.h>
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#include <sys/signalvar.h>
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#ifdef SMP
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#include <sys/smp.h>
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#endif
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#include <sys/syscallsubr.h>
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#include <sys/sysctl.h>
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#include <sys/sysent.h>
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@ -1077,16 +1080,18 @@ cpu_est_clockrate(int cpu_id, uint64_t *rate)
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return (EOPNOTSUPP);
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/* If we're booting, trust the rate calibrated moments ago. */
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if (cold) {
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if (cold && tsc_freq != 0) {
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*rate = tsc_freq;
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return (0);
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}
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#ifdef SMP
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/* Schedule ourselves on the indicated cpu. */
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thread_lock(curthread);
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sched_bind(curthread, cpu_id);
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thread_unlock(curthread);
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if (smp_cpus > 1) {
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/* Schedule ourselves on the indicated cpu. */
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thread_lock(curthread);
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sched_bind(curthread, cpu_id);
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thread_unlock(curthread);
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}
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#endif
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/* Calibrate by measuring a short delay. */
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@ -1097,9 +1102,11 @@ cpu_est_clockrate(int cpu_id, uint64_t *rate)
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intr_restore(reg);
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#ifdef SMP
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thread_lock(curthread);
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sched_unbind(curthread);
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thread_unlock(curthread);
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if (smp_cpus > 1) {
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thread_lock(curthread);
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sched_unbind(curthread);
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thread_unlock(curthread);
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}
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#endif
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tsc2 -= tsc1;
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@ -63,6 +63,11 @@ SYSCTL_INT(_kern_timecounter, OID_AUTO, smp_tsc, CTLFLAG_RDTUN, &smp_tsc, 0,
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TUNABLE_INT("kern.timecounter.smp_tsc", &smp_tsc);
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#endif
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static int tsc_disabled;
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SYSCTL_INT(_machdep, OID_AUTO, disable_tsc, CTLFLAG_RDTUN, &tsc_disabled, 0,
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"Disable x86 Time Stamp Counter");
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TUNABLE_INT("machdep.disable_tsc", &tsc_disabled);
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static void tsc_freq_changed(void *arg, const struct cf_level *level,
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int status);
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static void tsc_freq_changing(void *arg, const struct cf_level *level,
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@ -84,12 +89,11 @@ init_TSC(void)
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{
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u_int64_t tscval[2];
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if (cpu_feature & CPUID_TSC)
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tsc_present = 1;
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else
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tsc_present = 0;
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if ((cpu_feature & CPUID_TSC) == 0)
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return;
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tsc_present = 1;
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if (!tsc_present)
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if (tsc_disabled)
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return;
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if (bootverbose)
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@ -151,7 +155,7 @@ void
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init_TSC_tc(void)
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{
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if (!tsc_present)
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if (!tsc_present || tsc_disabled)
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return;
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/*
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@ -248,7 +252,7 @@ tsc_freq_changed(void *arg, const struct cf_level *level, int status)
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{
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/* If there was an error during the transition, don't do anything. */
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if (status != 0)
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if (tsc_disabled || status != 0)
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return;
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/* Total setting for this level gives the new frequency in MHz. */
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