Further updates to the Marvell support code.
Should be reliable enough for actual use by now.
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=153789
@ -2261,12 +2261,20 @@ ata_marvell_allocate(device_t dev)
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return 0;
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}
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struct ata_marvell_response {
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u_int16_t tag;
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u_int8_t edma_status;
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u_int8_t dev_status;
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u_int32_t timestamp;
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};
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static void
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ata_marvell_intr(void *data)
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{
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struct ata_pci_controller *ctlr = data;
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struct ata_channel *ch;
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struct ata_request *request;
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struct ata_marvell_response *response;
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u_int32_t cause, icr0 = 0, icr1 = 0;
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int unit;
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@ -2318,16 +2326,22 @@ ata_marvell_intr(void *data)
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slot = (((rsp_in & ~0xffffff00) >> 3)) & 0x1f;
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rsp_out &= 0xffffff00;
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rsp_out += (slot << 3);
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response = (struct ata_marvell_response *)
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(u_int8_t *)(ch->dma->work) + 1024 + (slot << 3);
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/* XXX SOS get status and error into request */
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request->status = 0; /* XXX SOS */
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request->error = 0; /* XXX SOS */
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if (!(request->flags & ATA_R_TIMEOUT))
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request->donecount = request->bytecount;
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/* record status for this request */
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request->status = response->dev_status;
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request->error = 0;
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/* ack response */
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ATA_OUTL(ctlr->r_res1, 0x02024 + ATA_MV_EDMA_BASE(ch), rsp_out);
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/* update progress */
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if (!(request->status & ATA_S_ERROR) &&
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!(request->flags & ATA_R_TIMEOUT))
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request->donecount = request->bytecount;
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/* finish up this request */
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ch->running = NULL;
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if (ch->state == ATA_ACTIVE)
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ch->state = ATA_IDLE;
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@ -2412,7 +2426,7 @@ ata_marvell_command(struct ata_request *request)
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{
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struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev));
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struct ata_channel *ch = device_get_softc(device_get_parent(request->dev));
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u_int32_t req_in, req_out;
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u_int32_t req_in;
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u_int8_t *bytep;
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u_int16_t *wordp;
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u_int32_t *quadp;
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@ -2420,7 +2434,6 @@ ata_marvell_command(struct ata_request *request)
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int slot;
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/* only DMA R/W goes through the EMDA machine */
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/* XXX SOS add ATAPI commands support later */
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if (request->u.ata.command != ATA_READ_DMA &&
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request->u.ata.command != ATA_READ_DMA48 &&
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request->u.ata.command != ATA_WRITE_DMA &&
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@ -2432,17 +2445,15 @@ ata_marvell_command(struct ata_request *request)
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return ata_generic_command(request);
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}
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req_out = ATA_INL(ctlr->r_res1, 0x02018 + ATA_MV_EDMA_BASE(ch));
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/* get next free request queue slot */
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req_in = ATA_INL(ctlr->r_res1, 0x02014 + ATA_MV_EDMA_BASE(ch));
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slot = (((req_in & ~0xfffffc00) >> 5) + 0) & 0x1f;
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bytep = (u_int8_t *)(ch->dma->work);
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bytep += (slot << 5);
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wordp = (u_int16_t *)bytep;
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quadp = (u_int32_t *)bytep;
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/* fill in this request */
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quadp[0] = (long)ch->dma->sg_bus & 0xffffffff;
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quadp[1] = (ch->dma->sg_bus & 0xffffffff00000000) >> 32;
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wordp[4] = (request->flags & ATA_R_READ ? 0x01 : 0x00) | (tag<<1);
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@ -2481,11 +2492,10 @@ ata_marvell_command(struct ata_request *request)
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DELAY(10);
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}
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/* tell EDMA it has a new request */
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slot = (((req_in & ~0xfffffc00) >> 5) + 1) & 0x1f;
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req_in &= 0xfffffc00;
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req_in += (slot << 5);
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/* tell EDMA it has a new request */
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ATA_OUTL(ctlr->r_res1, 0x02014 + ATA_MV_EDMA_BASE(ch), req_in);
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return 0;
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@ -2499,7 +2509,8 @@ ata_marvell_reset(device_t dev)
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/* disable the EDMA machinery */
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ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000002);
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DELAY(100000); /* SOS should poll for disabled */
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while ((ATA_INL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch)) & 0x00000001))
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DELAY(10);
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/* clear SATA error register */
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ATA_IDX_OUTL(ch, ATA_SERROR, ATA_IDX_INL(ch, ATA_SERROR));
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