ixgbe: Use C99 bool types
Approved by: imp MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D31621
This commit is contained in:
parent
b622bdb4eb
commit
79b36ec91d
@ -332,7 +332,7 @@ SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0,
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* of unsupported SFP+ modules, note that
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* doing so you are on your own :)
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*/
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static int allow_unsupported_sfp = FALSE;
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static int allow_unsupported_sfp = false;
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SYSCTL_INT(_hw_ix, OID_AUTO, unsupported_sfp, CTLFLAG_RDTUN,
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&allow_unsupported_sfp, 0,
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"Allow unsupported SFP modules...use at your own risk");
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@ -356,7 +356,7 @@ SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 0,
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* is varied over time based on the
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* traffic for that interrupt vector
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*/
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static int ixgbe_enable_aim = FALSE;
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static int ixgbe_enable_aim = false;
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SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RWTUN, &ixgbe_enable_aim, 0,
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"Enable adaptive interrupt moderation");
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@ -943,7 +943,7 @@ ixgbe_if_attach_pre(if_ctx_t ctx)
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/* Verify adapter fan is still functional (if applicable) */
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if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
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u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
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ixgbe_check_fan_failure(adapter, esdp, FALSE);
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ixgbe_check_fan_failure(adapter, esdp, false);
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}
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/* Ensure SW/FW semaphore is free */
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@ -952,16 +952,16 @@ ixgbe_if_attach_pre(if_ctx_t ctx)
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/* Set an initial default flow control value */
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hw->fc.requested_mode = ixgbe_flow_control;
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hw->phy.reset_if_overtemp = TRUE;
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hw->phy.reset_if_overtemp = true;
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error = ixgbe_reset_hw(hw);
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hw->phy.reset_if_overtemp = FALSE;
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hw->phy.reset_if_overtemp = false;
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if (error == IXGBE_ERR_SFP_NOT_PRESENT) {
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/*
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* No optics in this port, set up
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* so the timer routine will probe
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* for later insertion.
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*/
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adapter->sfp_probe = TRUE;
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adapter->sfp_probe = true;
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error = 0;
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} else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) {
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device_printf(dev, "Unsupported SFP+ module detected!\n");
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@ -1097,7 +1097,7 @@ ixgbe_if_attach_post(if_ctx_t ctx)
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ixgbe_enable_tx_laser(hw);
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/* Enable power to the phy. */
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ixgbe_set_phy_power(hw, TRUE);
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ixgbe_set_phy_power(hw, true);
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ixgbe_initialize_iov(adapter);
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@ -1366,23 +1366,23 @@ ixgbe_is_sfp(struct ixgbe_hw *hw)
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switch (hw->mac.type) {
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case ixgbe_mac_82598EB:
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if (hw->phy.type == ixgbe_phy_nl)
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return (TRUE);
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return (FALSE);
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return (true);
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return (false);
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case ixgbe_mac_82599EB:
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switch (hw->mac.ops.get_media_type(hw)) {
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case ixgbe_media_type_fiber:
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case ixgbe_media_type_fiber_qsfp:
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return (TRUE);
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return (true);
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default:
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return (FALSE);
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return (false);
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}
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case ixgbe_mac_X550EM_x:
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case ixgbe_mac_X550EM_a:
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if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber)
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return (TRUE);
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return (FALSE);
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return (true);
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return (false);
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default:
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return (FALSE);
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return (false);
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}
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} /* ixgbe_is_sfp */
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@ -1405,7 +1405,7 @@ ixgbe_config_link(if_ctx_t ctx)
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} else {
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if (hw->mac.ops.check_link)
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err = ixgbe_check_link(hw, &adapter->link_speed,
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&adapter->link_up, FALSE);
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&adapter->link_up, false);
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if (err)
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return;
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autoneg = hw->phy.autoneg_advertised;
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@ -1911,7 +1911,7 @@ ixgbe_setup_vlan_hw_support(if_ctx_t ctx)
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ctrl |= IXGBE_RXDCTL_VME;
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IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl);
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}
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rxr->vtag_strip = TRUE;
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rxr->vtag_strip = true;
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}
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}
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@ -1948,7 +1948,7 @@ ixgbe_get_slot_info(struct adapter *adapter)
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{
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device_t dev = iflib_get_dev(adapter->ctx);
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struct ixgbe_hw *hw = &adapter->hw;
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int bus_info_valid = TRUE;
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int bus_info_valid = true;
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u32 offset;
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u16 link;
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@ -1997,7 +1997,7 @@ ixgbe_get_slot_info(struct adapter *adapter)
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* Hmm...can't get PCI-Express capabilities.
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* Falling back to default method.
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*/
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bus_info_valid = FALSE;
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bus_info_valid = false;
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ixgbe_get_bus_info(hw);
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goto display;
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}
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@ -2423,8 +2423,8 @@ ixgbe_if_media_change(if_ctx_t ctx)
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goto invalid;
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}
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hw->mac.autotry_restart = TRUE;
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hw->mac.ops.setup_link(hw, speed, TRUE);
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hw->mac.autotry_restart = true;
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hw->mac.ops.setup_link(hw, speed, true);
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adapter->advertise =
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((speed & IXGBE_LINK_SPEED_10GB_FULL) ? 4 : 0) |
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((speed & IXGBE_LINK_SPEED_1GB_FULL) ? 2 : 0) |
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@ -2578,7 +2578,7 @@ ixgbe_msix_link(void *arg)
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/* Check for fan failure */
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if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
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ixgbe_check_fan_failure(adapter, eicr, TRUE);
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ixgbe_check_fan_failure(adapter, eicr, true);
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IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
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}
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@ -2795,7 +2795,7 @@ ixgbe_setup_low_power_mode(if_ctx_t ctx)
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s32 error = 0;
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if (!hw->wol_enabled)
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ixgbe_set_phy_power(hw, FALSE);
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ixgbe_set_phy_power(hw, false);
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/* Limit power management flow to X550EM baseT */
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if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T &&
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@ -2821,12 +2821,12 @@ ixgbe_setup_low_power_mode(if_ctx_t ctx)
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IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN);
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/* X550EM baseT adapters need a special LPLU flow */
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hw->phy.reset_disable = TRUE;
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hw->phy.reset_disable = true;
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ixgbe_if_stop(ctx);
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error = hw->phy.ops.enter_lplu(hw);
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if (error)
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device_printf(dev, "Error entering LPLU: %d\n", error);
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hw->phy.reset_disable = FALSE;
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hw->phy.reset_disable = false;
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} else {
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/* Just stop for other adapters */
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ixgbe_if_stop(ctx);
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@ -3127,7 +3127,7 @@ ixgbe_if_init(if_ctx_t ctx)
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IXGBE_WRITE_REG(hw, IXGBE_EITR(adapter->vector), IXGBE_LINK_ITR);
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/* Enable power to the phy. */
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ixgbe_set_phy_power(hw, TRUE);
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ixgbe_set_phy_power(hw, true);
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/* Config/Enable Link */
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ixgbe_config_link(ctx);
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@ -3336,7 +3336,7 @@ ixgbe_config_delay_values(struct adapter *adapter)
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hw->fc.low_water[0] = IXGBE_BT2KB(tmp);
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hw->fc.pause_time = IXGBE_FC_PAUSE;
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hw->fc.send_xon = TRUE;
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hw->fc.send_xon = true;
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} /* ixgbe_config_delay_values */
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/************************************************************************
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@ -3392,7 +3392,7 @@ ixgbe_if_multi_set(if_ctx_t ctx)
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if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) {
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update_ptr = (u8 *)mta;
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ixgbe_update_mc_addr_list(&adapter->hw, update_ptr, mcnt,
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ixgbe_mc_array_itr, TRUE);
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ixgbe_mc_array_itr, true);
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}
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} /* ixgbe_if_multi_set */
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@ -3455,7 +3455,7 @@ ixgbe_sfp_probe(if_ctx_t ctx)
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struct adapter *adapter = iflib_get_softc(ctx);
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struct ixgbe_hw *hw = &adapter->hw;
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device_t dev = iflib_get_dev(ctx);
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bool result = FALSE;
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bool result = false;
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if ((hw->phy.type == ixgbe_phy_nl) &&
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(hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
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@ -3463,7 +3463,7 @@ ixgbe_sfp_probe(if_ctx_t ctx)
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if (ret)
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goto out;
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ret = hw->phy.ops.reset(hw);
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adapter->sfp_probe = FALSE;
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adapter->sfp_probe = false;
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if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
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device_printf(dev, "Unsupported SFP+ module detected!");
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device_printf(dev,
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@ -3472,7 +3472,7 @@ ixgbe_sfp_probe(if_ctx_t ctx)
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} else
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device_printf(dev, "SFP+ module detected!\n");
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/* We now have supported optics */
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result = TRUE;
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result = true;
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}
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out:
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@ -3554,7 +3554,7 @@ ixgbe_handle_msf(void *context)
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if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
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hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate);
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if (hw->mac.ops.setup_link)
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hw->mac.ops.setup_link(hw, autoneg, TRUE);
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hw->mac.ops.setup_link(hw, autoneg, true);
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/* Adjust media types shown in ifconfig */
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ifmedia_removeall(adapter->media);
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@ -3596,7 +3596,7 @@ ixgbe_if_stop(if_ctx_t ctx)
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INIT_DEBUGOUT("ixgbe_if_stop: begin\n");
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ixgbe_reset_hw(hw);
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hw->adapter_stopped = FALSE;
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hw->adapter_stopped = false;
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ixgbe_stop_adapter(hw);
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if (hw->mac.type == ixgbe_mac_82599EB)
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ixgbe_stop_mac_link_on_d3_82599(hw);
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@ -3604,7 +3604,7 @@ ixgbe_if_stop(if_ctx_t ctx)
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ixgbe_disable_tx_laser(hw);
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/* Update the stack */
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adapter->link_up = FALSE;
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adapter->link_up = false;
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ixgbe_if_update_admin_status(ctx);
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/* reprogram the RAR[0] in case user changed it. */
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@ -3627,12 +3627,12 @@ ixgbe_if_update_admin_status(if_ctx_t ctx)
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device_t dev = iflib_get_dev(ctx);
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if (adapter->link_up) {
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if (adapter->link_active == FALSE) {
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if (adapter->link_active == false) {
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if (bootverbose)
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device_printf(dev, "Link is up %d Gbps %s \n",
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((adapter->link_speed == 128) ? 10 : 1),
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"Full Duplex");
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adapter->link_active = TRUE;
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adapter->link_active = true;
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/* Update any Flow Control changes */
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ixgbe_fc_enable(&adapter->hw);
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/* Update DMA coalescing config */
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@ -3644,11 +3644,11 @@ ixgbe_if_update_admin_status(if_ctx_t ctx)
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ixgbe_ping_all_vfs(adapter);
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}
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} else { /* Link down */
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if (adapter->link_active == TRUE) {
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if (adapter->link_active == true) {
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if (bootverbose)
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device_printf(dev, "Link is Down\n");
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iflib_link_state_change(ctx, LINK_STATE_DOWN, 0);
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adapter->link_active = FALSE;
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adapter->link_active = false;
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if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
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ixgbe_ping_all_vfs(adapter);
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}
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@ -3685,7 +3685,7 @@ ixgbe_config_dmac(struct adapter *adapter)
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if (dcfg->watchdog_timer ^ adapter->dmac ||
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dcfg->link_speed ^ adapter->link_speed) {
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dcfg->watchdog_timer = adapter->dmac;
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dcfg->fcoe_en = FALSE;
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dcfg->fcoe_en = false;
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dcfg->link_speed = adapter->link_speed;
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dcfg->num_tcs = 1;
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@ -4016,7 +4016,7 @@ ixgbe_set_flowcntl(struct adapter *adapter, int fc)
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}
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/* Don't autoneg if forcing a value */
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adapter->hw.fc.disable_fc_autoneg = TRUE;
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adapter->hw.fc.disable_fc_autoneg = true;
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ixgbe_fc_enable(&adapter->hw);
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return (0);
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@ -4115,7 +4115,7 @@ ixgbe_set_advertise(struct adapter *adapter, int advertise)
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ixgbe_link_speed speed = 0;
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ixgbe_link_speed link_caps = 0;
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s32 err = IXGBE_NOT_IMPLEMENTED;
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bool negotiate = FALSE;
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bool negotiate = false;
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/* Checks to validate new value */
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if (adapter->advertise == advertise) /* no change */
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@ -4177,8 +4177,8 @@ ixgbe_set_advertise(struct adapter *adapter, int advertise)
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speed |= IXGBE_LINK_SPEED_10_FULL;
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}
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hw->mac.autotry_restart = TRUE;
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hw->mac.ops.setup_link(hw, speed, TRUE);
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hw->mac.autotry_restart = true;
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hw->mac.ops.setup_link(hw, speed, true);
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adapter->advertise = advertise;
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return (0);
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@ -4201,7 +4201,7 @@ ixgbe_get_advertise(struct adapter *adapter)
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int speed;
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ixgbe_link_speed link_caps = 0;
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s32 err;
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bool negotiate = FALSE;
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bool negotiate = false;
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/*
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* Advertised speed means nothing unless it's copper or
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@ -195,7 +195,7 @@ TUNABLE_INT("hw.ixv.flow_control", &ixv_flow_control);
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* it can be a performance win in some workloads, but
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* in others it actually hurts, its off by default.
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*/
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static int ixv_header_split = FALSE;
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static int ixv_header_split = false;
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TUNABLE_INT("hw.ixv.hdr_split", &ixv_header_split);
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/*
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@ -602,7 +602,7 @@ ixv_if_init(if_ctx_t ctx)
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int error = 0;
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INIT_DEBUGOUT("ixv_if_init: begin");
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hw->adapter_stopped = FALSE;
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hw->adapter_stopped = false;
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hw->mac.ops.stop_adapter(hw);
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/* reprogram the RAR[0] in case user changed it. */
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@ -649,7 +649,7 @@ ixv_if_init(if_ctx_t ctx)
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/* Config/Enable Link */
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hw->mac.ops.check_link(hw, &adapter->link_speed, &adapter->link_up,
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FALSE);
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false);
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/* And now turn on interrupts */
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ixv_if_enable_intr(ctx);
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@ -849,7 +849,7 @@ ixv_if_multi_set(if_ctx_t ctx)
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update_ptr = mta;
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adapter->hw.mac.ops.update_mc_addr_list(&adapter->hw, update_ptr, mcnt,
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ixv_mc_array_itr, TRUE);
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ixv_mc_array_itr, true);
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} /* ixv_if_multi_set */
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/************************************************************************
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@ -903,33 +903,33 @@ ixv_if_update_admin_status(if_ctx_t ctx)
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device_t dev = iflib_get_dev(ctx);
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s32 status;
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adapter->hw.mac.get_link_status = TRUE;
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adapter->hw.mac.get_link_status = true;
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status = ixgbe_check_link(&adapter->hw, &adapter->link_speed,
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&adapter->link_up, FALSE);
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&adapter->link_up, false);
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if (status != IXGBE_SUCCESS && adapter->hw.adapter_stopped == FALSE) {
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if (status != IXGBE_SUCCESS && adapter->hw.adapter_stopped == false) {
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/* Mailbox's Clear To Send status is lost or timeout occurred.
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* We need reinitialization. */
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iflib_get_ifp(ctx)->if_init(ctx);
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}
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if (adapter->link_up) {
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if (adapter->link_active == FALSE) {
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if (adapter->link_active == false) {
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if (bootverbose)
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device_printf(dev, "Link is up %d Gbps %s \n",
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((adapter->link_speed == 128) ? 10 : 1),
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"Full Duplex");
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adapter->link_active = TRUE;
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adapter->link_active = true;
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iflib_link_state_change(ctx, LINK_STATE_UP,
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IF_Gbps(10));
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}
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} else { /* Link down */
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if (adapter->link_active == TRUE) {
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if (adapter->link_active == true) {
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if (bootverbose)
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device_printf(dev, "Link is Down\n");
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iflib_link_state_change(ctx, LINK_STATE_DOWN, 0);
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adapter->link_active = FALSE;
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adapter->link_active = false;
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}
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}
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@ -955,11 +955,11 @@ ixv_if_stop(if_ctx_t ctx)
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ixv_if_disable_intr(ctx);
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hw->mac.ops.reset_hw(hw);
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adapter->hw.adapter_stopped = FALSE;
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adapter->hw.adapter_stopped = false;
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hw->mac.ops.stop_adapter(hw);
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/* Update the stack */
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||||
adapter->link_up = FALSE;
|
||||
adapter->link_up = false;
|
||||
ixv_if_update_admin_status(ctx);
|
||||
|
||||
/* reprogram the RAR[0] in case user changed it. */
|
||||
@ -1510,7 +1510,7 @@ ixv_setup_vlan_support(if_ctx_t ctx)
|
||||
* Let Rx path know that it needs to store VLAN tag
|
||||
* as part of extra mbuf info.
|
||||
*/
|
||||
adapter->rx_queues[i].rxr.vtag_strip = TRUE;
|
||||
adapter->rx_queues[i].rxr.vtag_strip = true;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1540,7 +1540,7 @@ ixv_setup_vlan_support(if_ctx_t ctx)
|
||||
continue;
|
||||
vid = (i * 32) + j;
|
||||
/* Call the shared code mailbox routine */
|
||||
while (hw->mac.ops.set_vfta(hw, vid, 0, TRUE, FALSE)) {
|
||||
while (hw->mac.ops.set_vfta(hw, vid, 0, true, false)) {
|
||||
if (++retry > 5)
|
||||
break;
|
||||
}
|
||||
|
@ -62,11 +62,11 @@ ixgbe_define_iov_schemas(device_t dev, int *error)
|
||||
vf_schema = pci_iov_schema_alloc_node();
|
||||
pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL);
|
||||
pci_iov_schema_add_bool(vf_schema, "mac-anti-spoof",
|
||||
IOV_SCHEMA_HASDEFAULT, TRUE);
|
||||
IOV_SCHEMA_HASDEFAULT, true);
|
||||
pci_iov_schema_add_bool(vf_schema, "allow-set-mac",
|
||||
IOV_SCHEMA_HASDEFAULT, FALSE);
|
||||
IOV_SCHEMA_HASDEFAULT, false);
|
||||
pci_iov_schema_add_bool(vf_schema, "allow-promisc",
|
||||
IOV_SCHEMA_HASDEFAULT, FALSE);
|
||||
IOV_SCHEMA_HASDEFAULT, false);
|
||||
*error = pci_iov_attach(dev, pf_schema, vf_schema);
|
||||
if (*error != 0) {
|
||||
device_printf(dev,
|
||||
@ -266,7 +266,7 @@ ixgbe_vf_frame_size_compatible(struct adapter *adapter, struct ixgbe_vf *vf)
|
||||
* frames on PFs and VFs.
|
||||
*/
|
||||
if (adapter->hw.mac.type != ixgbe_mac_82599EB)
|
||||
return (TRUE);
|
||||
return (true);
|
||||
|
||||
switch (vf->api_ver) {
|
||||
case IXGBE_API_VER_1_0:
|
||||
@ -277,9 +277,9 @@ ixgbe_vf_frame_size_compatible(struct adapter *adapter, struct ixgbe_vf *vf)
|
||||
*/
|
||||
if (adapter->max_frame_size > ETHER_MAX_LEN ||
|
||||
vf->maximum_frame_size > ETHER_MAX_LEN)
|
||||
return (FALSE);
|
||||
return (false);
|
||||
|
||||
return (TRUE);
|
||||
return (true);
|
||||
|
||||
break;
|
||||
case IXGBE_API_VER_1_1:
|
||||
@ -289,16 +289,16 @@ ixgbe_vf_frame_size_compatible(struct adapter *adapter, struct ixgbe_vf *vf)
|
||||
* jumbo frames.
|
||||
*/
|
||||
if (vf->maximum_frame_size <= ETHER_MAX_LEN)
|
||||
return (TRUE);
|
||||
return (true);
|
||||
|
||||
/*
|
||||
* Jumbo frames only work with VFs if the PF is also using jumbo
|
||||
* frames.
|
||||
*/
|
||||
if (adapter->max_frame_size <= ETHER_MAX_LEN)
|
||||
return (TRUE);
|
||||
return (true);
|
||||
|
||||
return (FALSE);
|
||||
return (false);
|
||||
}
|
||||
} /* ixgbe_vf_frame_size_compatible */
|
||||
|
||||
@ -362,7 +362,7 @@ ixgbe_vf_reset_msg(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg)
|
||||
|
||||
if (ixgbe_validate_mac_addr(vf->ether_addr) == 0) {
|
||||
ixgbe_set_rar(&adapter->hw, vf->rar_index, vf->ether_addr,
|
||||
vf->pool, TRUE);
|
||||
vf->pool, true);
|
||||
ack = IXGBE_VT_MSGTYPE_ACK;
|
||||
} else
|
||||
ack = IXGBE_VT_MSGTYPE_NACK;
|
||||
@ -400,7 +400,7 @@ ixgbe_vf_set_mac(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg)
|
||||
bcopy(mac, vf->ether_addr, ETHER_ADDR_LEN);
|
||||
|
||||
ixgbe_set_rar(&adapter->hw, vf->rar_index, vf->ether_addr, vf->pool,
|
||||
TRUE);
|
||||
true);
|
||||
|
||||
ixgbe_send_vf_ack(adapter, vf, msg[0]);
|
||||
} /* ixgbe_vf_set_mac */
|
||||
@ -764,7 +764,7 @@ ixgbe_init_vf(struct adapter *adapter, struct ixgbe_vf *vf)
|
||||
|
||||
if (ixgbe_validate_mac_addr(vf->ether_addr) == 0) {
|
||||
ixgbe_set_rar(&adapter->hw, vf->rar_index,
|
||||
vf->ether_addr, vf->pool, TRUE);
|
||||
vf->ether_addr, vf->pool, true);
|
||||
}
|
||||
|
||||
ixgbe_vf_enable_transmit(adapter, vf);
|
||||
|
@ -88,7 +88,7 @@ ixgbe_tx_ctx_setup(struct ixgbe_adv_tx_context_desc *TXD, if_pkt_info_t pi)
|
||||
uint32_t olinfo_status, mss_l4len_idx, pktlen, offload;
|
||||
u8 ehdrlen;
|
||||
|
||||
offload = TRUE;
|
||||
offload = true;
|
||||
olinfo_status = mss_l4len_idx = vlan_macip_lens = type_tucmd_mlhl = 0;
|
||||
/* VLAN MACLEN IPLEN */
|
||||
vlan_macip_lens |= (htole16(pi->ipi_vtag) << IXGBE_ADVTXD_VLAN_SHIFT);
|
||||
@ -126,7 +126,7 @@ ixgbe_tx_ctx_setup(struct ixgbe_adv_tx_context_desc *TXD, if_pkt_info_t pi)
|
||||
} else if (pi->ipi_flags & IPI_TX_IPV6)
|
||||
type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV6;
|
||||
else
|
||||
offload = FALSE;
|
||||
offload = false;
|
||||
|
||||
vlan_macip_lens |= pi->ipi_ip_hlen;
|
||||
|
||||
@ -135,22 +135,22 @@ ixgbe_tx_ctx_setup(struct ixgbe_adv_tx_context_desc *TXD, if_pkt_info_t pi)
|
||||
if (pi->ipi_csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP | CSUM_TSO))
|
||||
type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
|
||||
else
|
||||
offload = FALSE;
|
||||
offload = false;
|
||||
break;
|
||||
case IPPROTO_UDP:
|
||||
if (pi->ipi_csum_flags & (CSUM_IP_UDP | CSUM_IP6_UDP))
|
||||
type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_UDP;
|
||||
else
|
||||
offload = FALSE;
|
||||
offload = false;
|
||||
break;
|
||||
case IPPROTO_SCTP:
|
||||
if (pi->ipi_csum_flags & (CSUM_IP_SCTP | CSUM_IP6_SCTP))
|
||||
type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
|
||||
else
|
||||
offload = FALSE;
|
||||
offload = false;
|
||||
break;
|
||||
default:
|
||||
offload = FALSE;
|
||||
offload = false;
|
||||
break;
|
||||
}
|
||||
/* Insert L4 checksum into data descriptors */
|
||||
|
@ -569,11 +569,11 @@ drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
|
||||
static inline bool
|
||||
ixv_check_ether_addr(u8 *addr)
|
||||
{
|
||||
bool status = TRUE;
|
||||
bool status = true;
|
||||
|
||||
if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 &&
|
||||
addr[3] == 0 && addr[4]== 0 && addr[5] == 0))
|
||||
status = FALSE;
|
||||
status = false;
|
||||
|
||||
return (status);
|
||||
}
|
||||
|
@ -316,17 +316,17 @@ static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,
|
||||
switch (autoc & IXGBE_AUTOC_LMS_MASK) {
|
||||
case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
|
||||
*speed = IXGBE_LINK_SPEED_1GB_FULL;
|
||||
*autoneg = FALSE;
|
||||
*autoneg = false;
|
||||
break;
|
||||
|
||||
case IXGBE_AUTOC_LMS_10G_LINK_NO_AN:
|
||||
*speed = IXGBE_LINK_SPEED_10GB_FULL;
|
||||
*autoneg = FALSE;
|
||||
*autoneg = false;
|
||||
break;
|
||||
|
||||
case IXGBE_AUTOC_LMS_1G_AN:
|
||||
*speed = IXGBE_LINK_SPEED_1GB_FULL;
|
||||
*autoneg = TRUE;
|
||||
*autoneg = true;
|
||||
break;
|
||||
|
||||
case IXGBE_AUTOC_LMS_KX4_AN:
|
||||
@ -336,7 +336,7 @@ static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,
|
||||
*speed |= IXGBE_LINK_SPEED_10GB_FULL;
|
||||
if (autoc & IXGBE_AUTOC_KX_SUPP)
|
||||
*speed |= IXGBE_LINK_SPEED_1GB_FULL;
|
||||
*autoneg = TRUE;
|
||||
*autoneg = true;
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -443,7 +443,7 @@ s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw)
|
||||
* so if it's on turn it off once we know link_speed. For
|
||||
* more details see 82598 Specification update.
|
||||
*/
|
||||
hw->mac.ops.check_link(hw, &link_speed, &link_up, FALSE);
|
||||
hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
|
||||
if (link_up && link_speed == IXGBE_LINK_SPEED_1GB_FULL) {
|
||||
switch (hw->fc.requested_mode) {
|
||||
case ixgbe_fc_full:
|
||||
@ -550,7 +550,7 @@ s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw)
|
||||
/**
|
||||
* ixgbe_start_mac_link_82598 - Configures MAC link settings
|
||||
* @hw: pointer to hardware structure
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
*
|
||||
* Configures link settings based on values in the ixgbe_hw struct.
|
||||
* Restarts the link. Performs autonegotiation if needed.
|
||||
@ -635,7 +635,7 @@ static s32 ixgbe_validate_link_ready(struct ixgbe_hw *hw)
|
||||
* ixgbe_check_mac_link_82598 - Get link/speed status
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: pointer to link speed
|
||||
* @link_up: TRUE is link is up, FALSE otherwise
|
||||
* @link_up: true is link is up, false otherwise
|
||||
* @link_up_wait_to_complete: bool used to wait for link up or not
|
||||
*
|
||||
* Reads the links register to determine if link is up and the current speed
|
||||
@ -665,10 +665,10 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
|
||||
for (i = 0; i < hw->mac.max_link_up_time; i++) {
|
||||
if ((link_reg & 1) &&
|
||||
((adapt_comp_reg & 1) == 0)) {
|
||||
*link_up = TRUE;
|
||||
*link_up = true;
|
||||
break;
|
||||
} else {
|
||||
*link_up = FALSE;
|
||||
*link_up = false;
|
||||
}
|
||||
msec_delay(100);
|
||||
hw->phy.ops.read_reg(hw, 0xC79F,
|
||||
@ -680,12 +680,12 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
|
||||
}
|
||||
} else {
|
||||
if ((link_reg & 1) && ((adapt_comp_reg & 1) == 0))
|
||||
*link_up = TRUE;
|
||||
*link_up = true;
|
||||
else
|
||||
*link_up = FALSE;
|
||||
*link_up = false;
|
||||
}
|
||||
|
||||
if (*link_up == FALSE)
|
||||
if (*link_up == false)
|
||||
goto out;
|
||||
}
|
||||
|
||||
@ -693,19 +693,19 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
|
||||
if (link_up_wait_to_complete) {
|
||||
for (i = 0; i < hw->mac.max_link_up_time; i++) {
|
||||
if (links_reg & IXGBE_LINKS_UP) {
|
||||
*link_up = TRUE;
|
||||
*link_up = true;
|
||||
break;
|
||||
} else {
|
||||
*link_up = FALSE;
|
||||
*link_up = false;
|
||||
}
|
||||
msec_delay(100);
|
||||
links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
|
||||
}
|
||||
} else {
|
||||
if (links_reg & IXGBE_LINKS_UP)
|
||||
*link_up = TRUE;
|
||||
*link_up = true;
|
||||
else
|
||||
*link_up = FALSE;
|
||||
*link_up = false;
|
||||
}
|
||||
|
||||
if (links_reg & IXGBE_LINKS_SPEED)
|
||||
@ -713,9 +713,9 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
|
||||
else
|
||||
*speed = IXGBE_LINK_SPEED_1GB_FULL;
|
||||
|
||||
if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && (*link_up == TRUE) &&
|
||||
if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && (*link_up == true) &&
|
||||
(ixgbe_validate_link_ready(hw) != IXGBE_SUCCESS))
|
||||
*link_up = FALSE;
|
||||
*link_up = false;
|
||||
|
||||
out:
|
||||
return IXGBE_SUCCESS;
|
||||
@ -725,7 +725,7 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
|
||||
* ixgbe_setup_mac_link_82598 - Set MAC link speed
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
*
|
||||
* Set the link speed in the AUTOC register and restarts link.
|
||||
**/
|
||||
@ -733,7 +733,7 @@ static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw,
|
||||
ixgbe_link_speed speed,
|
||||
bool autoneg_wait_to_complete)
|
||||
{
|
||||
bool autoneg = FALSE;
|
||||
bool autoneg = false;
|
||||
s32 status = IXGBE_SUCCESS;
|
||||
ixgbe_link_speed link_capabilities = IXGBE_LINK_SPEED_UNKNOWN;
|
||||
u32 curr_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
|
||||
@ -779,7 +779,7 @@ static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw,
|
||||
* ixgbe_setup_copper_link_82598 - Set the PHY autoneg advertised field
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait_to_complete: TRUE if waiting is needed to complete
|
||||
* @autoneg_wait_to_complete: true if waiting is needed to complete
|
||||
*
|
||||
* Sets the link speed in the AUTOC register in the MAC and restarts link.
|
||||
**/
|
||||
@ -859,7 +859,7 @@ static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
|
||||
}
|
||||
|
||||
/* Reset PHY */
|
||||
if (hw->phy.reset_disable == FALSE) {
|
||||
if (hw->phy.reset_disable == false) {
|
||||
/* PHY ops must be identified and initialized prior to reset */
|
||||
|
||||
/* Init PHY and function pointers, perform SFP setup */
|
||||
@ -915,9 +915,9 @@ static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
|
||||
* AUTOC value since the reset operation sets back to deaults.
|
||||
*/
|
||||
autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
|
||||
if (hw->mac.orig_link_settings_stored == FALSE) {
|
||||
if (hw->mac.orig_link_settings_stored == false) {
|
||||
hw->mac.orig_autoc = autoc;
|
||||
hw->mac.orig_link_settings_stored = TRUE;
|
||||
hw->mac.orig_link_settings_stored = true;
|
||||
} else if (autoc != hw->mac.orig_autoc) {
|
||||
IXGBE_WRITE_REG(hw, IXGBE_AUTOC, hw->mac.orig_autoc);
|
||||
}
|
||||
|
@ -124,7 +124,7 @@ s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw)
|
||||
|
||||
if (hw->device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) {
|
||||
/* Store flag indicating I2C bus access control unit. */
|
||||
hw->phy.qsfp_shared_i2c_bus = TRUE;
|
||||
hw->phy.qsfp_shared_i2c_bus = true;
|
||||
|
||||
/* Initialize access to QSFP+ I2C bus */
|
||||
esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
|
||||
@ -215,7 +215,7 @@ s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)
|
||||
/* Restart DSP and set SFI mode */
|
||||
ret_val = hw->mac.ops.prot_autoc_write(hw,
|
||||
hw->mac.orig_autoc | IXGBE_AUTOC_LMS_10G_SERIAL,
|
||||
FALSE);
|
||||
false);
|
||||
|
||||
if (ret_val) {
|
||||
DEBUGOUT("sfp module setup not complete\n");
|
||||
@ -252,7 +252,7 @@ s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)
|
||||
{
|
||||
s32 ret_val;
|
||||
|
||||
*locked = FALSE;
|
||||
*locked = false;
|
||||
/* If LESM is on then we need to hold the SW/FW semaphore. */
|
||||
if (ixgbe_verify_lesm_fw_enabled_82599(hw)) {
|
||||
ret_val = hw->mac.ops.acquire_swfw_sync(hw,
|
||||
@ -260,7 +260,7 @@ s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)
|
||||
if (ret_val != IXGBE_SUCCESS)
|
||||
return IXGBE_ERR_SWFW_SYNC;
|
||||
|
||||
*locked = TRUE;
|
||||
*locked = true;
|
||||
}
|
||||
|
||||
*reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC);
|
||||
@ -295,7 +295,7 @@ s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 autoc, bool locked)
|
||||
if (ret_val != IXGBE_SUCCESS)
|
||||
return IXGBE_ERR_SWFW_SYNC;
|
||||
|
||||
locked = TRUE;
|
||||
locked = true;
|
||||
}
|
||||
|
||||
IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
|
||||
@ -409,7 +409,7 @@ s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw)
|
||||
* ixgbe_get_link_capabilities_82599 - Determines link capabilities
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: pointer to link speed
|
||||
* @autoneg: TRUE when autoneg or autotry is enabled
|
||||
* @autoneg: true when autoneg or autotry is enabled
|
||||
*
|
||||
* Determines the link capabilities by reading the AUTOC register.
|
||||
**/
|
||||
@ -431,7 +431,7 @@ s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
|
||||
hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 ||
|
||||
hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1) {
|
||||
*speed = IXGBE_LINK_SPEED_1GB_FULL;
|
||||
*autoneg = TRUE;
|
||||
*autoneg = true;
|
||||
goto out;
|
||||
}
|
||||
|
||||
@ -448,22 +448,22 @@ s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
|
||||
switch (autoc & IXGBE_AUTOC_LMS_MASK) {
|
||||
case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
|
||||
*speed = IXGBE_LINK_SPEED_1GB_FULL;
|
||||
*autoneg = FALSE;
|
||||
*autoneg = false;
|
||||
break;
|
||||
|
||||
case IXGBE_AUTOC_LMS_10G_LINK_NO_AN:
|
||||
*speed = IXGBE_LINK_SPEED_10GB_FULL;
|
||||
*autoneg = FALSE;
|
||||
*autoneg = false;
|
||||
break;
|
||||
|
||||
case IXGBE_AUTOC_LMS_1G_AN:
|
||||
*speed = IXGBE_LINK_SPEED_1GB_FULL;
|
||||
*autoneg = TRUE;
|
||||
*autoneg = true;
|
||||
break;
|
||||
|
||||
case IXGBE_AUTOC_LMS_10G_SERIAL:
|
||||
*speed = IXGBE_LINK_SPEED_10GB_FULL;
|
||||
*autoneg = FALSE;
|
||||
*autoneg = false;
|
||||
break;
|
||||
|
||||
case IXGBE_AUTOC_LMS_KX4_KX_KR:
|
||||
@ -475,7 +475,7 @@ s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
|
||||
*speed |= IXGBE_LINK_SPEED_10GB_FULL;
|
||||
if (autoc & IXGBE_AUTOC_KX_SUPP)
|
||||
*speed |= IXGBE_LINK_SPEED_1GB_FULL;
|
||||
*autoneg = TRUE;
|
||||
*autoneg = true;
|
||||
break;
|
||||
|
||||
case IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII:
|
||||
@ -486,12 +486,12 @@ s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
|
||||
*speed |= IXGBE_LINK_SPEED_10GB_FULL;
|
||||
if (autoc & IXGBE_AUTOC_KX_SUPP)
|
||||
*speed |= IXGBE_LINK_SPEED_1GB_FULL;
|
||||
*autoneg = TRUE;
|
||||
*autoneg = true;
|
||||
break;
|
||||
|
||||
case IXGBE_AUTOC_LMS_SGMII_1G_100M:
|
||||
*speed = IXGBE_LINK_SPEED_1GB_FULL | IXGBE_LINK_SPEED_100_FULL;
|
||||
*autoneg = FALSE;
|
||||
*autoneg = false;
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -508,9 +508,9 @@ s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
|
||||
* Limited autoneg is enabled at 1G
|
||||
*/
|
||||
if (hw->phy.media_type == ixgbe_media_type_fiber_qsfp)
|
||||
*autoneg = FALSE;
|
||||
*autoneg = false;
|
||||
else
|
||||
*autoneg = TRUE;
|
||||
*autoneg = true;
|
||||
}
|
||||
|
||||
out:
|
||||
@ -568,7 +568,7 @@ enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw)
|
||||
break;
|
||||
case IXGBE_DEV_ID_82599_BYPASS:
|
||||
media_type = ixgbe_media_type_fiber_fixed;
|
||||
hw->phy.multispeed_fiber = TRUE;
|
||||
hw->phy.multispeed_fiber = true;
|
||||
break;
|
||||
default:
|
||||
media_type = ixgbe_media_type_unknown;
|
||||
@ -604,7 +604,7 @@ void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw)
|
||||
/**
|
||||
* ixgbe_start_mac_link_82599 - Setup MAC link settings
|
||||
* @hw: pointer to hardware structure
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
*
|
||||
* Configures link settings based on values in the ixgbe_hw struct.
|
||||
* Restarts the link. Performs autonegotiation if needed.
|
||||
@ -616,7 +616,7 @@ s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
|
||||
u32 links_reg;
|
||||
u32 i;
|
||||
s32 status = IXGBE_SUCCESS;
|
||||
bool got_lock = FALSE;
|
||||
bool got_lock = false;
|
||||
|
||||
DEBUGFUNC("ixgbe_start_mac_link_82599");
|
||||
|
||||
@ -630,7 +630,7 @@ s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
|
||||
if (status != IXGBE_SUCCESS)
|
||||
goto out;
|
||||
|
||||
got_lock = TRUE;
|
||||
got_lock = true;
|
||||
}
|
||||
|
||||
/* Restart link */
|
||||
@ -716,11 +716,11 @@ void ixgbe_enable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw)
|
||||
* @hw: pointer to hardware structure
|
||||
*
|
||||
* When the driver changes the link speeds that it can support,
|
||||
* it sets autotry_restart to TRUE to indicate that we need to
|
||||
* it sets autotry_restart to true to indicate that we need to
|
||||
* initiate a new autotry session with the link partner. To do
|
||||
* so, we set the speed then disable and re-enable the Tx laser, to
|
||||
* alert the link partner that it also needs to restart autotry on its
|
||||
* end. This is consistent with TRUE clause 37 autoneg, which also
|
||||
* end. This is consistent with true clause 37 autoneg, which also
|
||||
* involves a loss of signal.
|
||||
**/
|
||||
void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw)
|
||||
@ -734,7 +734,7 @@ void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw)
|
||||
if (hw->mac.autotry_restart) {
|
||||
ixgbe_disable_tx_laser_multispeed_fiber(hw);
|
||||
ixgbe_enable_tx_laser_multispeed_fiber(hw);
|
||||
hw->mac.autotry_restart = FALSE;
|
||||
hw->mac.autotry_restart = false;
|
||||
}
|
||||
}
|
||||
|
||||
@ -771,7 +771,7 @@ void ixgbe_set_hard_rate_select_speed(struct ixgbe_hw *hw,
|
||||
* ixgbe_setup_mac_link_smartspeed - Set MAC link speed using SmartSpeed
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
*
|
||||
* Implements the Intel SmartSpeed algorithm.
|
||||
**/
|
||||
@ -782,7 +782,7 @@ s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
|
||||
s32 status = IXGBE_SUCCESS;
|
||||
ixgbe_link_speed link_speed = IXGBE_LINK_SPEED_UNKNOWN;
|
||||
s32 i, j;
|
||||
bool link_up = FALSE;
|
||||
bool link_up = false;
|
||||
u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
|
||||
|
||||
DEBUGFUNC("ixgbe_setup_mac_link_smartspeed");
|
||||
@ -807,7 +807,7 @@ s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
|
||||
*/
|
||||
|
||||
/* First, try to get link with full advertisement */
|
||||
hw->phy.smart_speed_active = FALSE;
|
||||
hw->phy.smart_speed_active = false;
|
||||
for (j = 0; j < IXGBE_SMARTSPEED_MAX_RETRIES; j++) {
|
||||
status = ixgbe_setup_mac_link_82599(hw, speed,
|
||||
autoneg_wait_to_complete);
|
||||
@ -825,7 +825,7 @@ s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
|
||||
|
||||
/* If we have link, just jump out */
|
||||
status = ixgbe_check_link(hw, &link_speed, &link_up,
|
||||
FALSE);
|
||||
false);
|
||||
if (status != IXGBE_SUCCESS)
|
||||
goto out;
|
||||
|
||||
@ -843,7 +843,7 @@ s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
|
||||
goto out;
|
||||
|
||||
/* Turn SmartSpeed on to disable KR support */
|
||||
hw->phy.smart_speed_active = TRUE;
|
||||
hw->phy.smart_speed_active = true;
|
||||
status = ixgbe_setup_mac_link_82599(hw, speed,
|
||||
autoneg_wait_to_complete);
|
||||
if (status != IXGBE_SUCCESS)
|
||||
@ -859,7 +859,7 @@ s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
|
||||
msec_delay(100);
|
||||
|
||||
/* If we have link, just jump out */
|
||||
status = ixgbe_check_link(hw, &link_speed, &link_up, FALSE);
|
||||
status = ixgbe_check_link(hw, &link_speed, &link_up, false);
|
||||
if (status != IXGBE_SUCCESS)
|
||||
goto out;
|
||||
|
||||
@ -868,7 +868,7 @@ s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
|
||||
}
|
||||
|
||||
/* We didn't get link. Turn SmartSpeed back off. */
|
||||
hw->phy.smart_speed_active = FALSE;
|
||||
hw->phy.smart_speed_active = false;
|
||||
status = ixgbe_setup_mac_link_82599(hw, speed,
|
||||
autoneg_wait_to_complete);
|
||||
|
||||
@ -883,7 +883,7 @@ s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
|
||||
* ixgbe_setup_mac_link_82599 - Set MAC link speed
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
*
|
||||
* Set the link speed in the AUTOC register and restarts link.
|
||||
**/
|
||||
@ -891,7 +891,7 @@ s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
|
||||
ixgbe_link_speed speed,
|
||||
bool autoneg_wait_to_complete)
|
||||
{
|
||||
bool autoneg = FALSE;
|
||||
bool autoneg = false;
|
||||
s32 status = IXGBE_SUCCESS;
|
||||
u32 pma_pmd_1g, link_mode;
|
||||
u32 current_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); /* holds the value of AUTOC register at this current point in time */
|
||||
@ -935,7 +935,7 @@ s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
|
||||
if (orig_autoc & IXGBE_AUTOC_KX4_SUPP)
|
||||
autoc |= IXGBE_AUTOC_KX4_SUPP;
|
||||
if ((orig_autoc & IXGBE_AUTOC_KR_SUPP) &&
|
||||
(hw->phy.smart_speed_active == FALSE))
|
||||
(hw->phy.smart_speed_active == false))
|
||||
autoc |= IXGBE_AUTOC_KR_SUPP;
|
||||
}
|
||||
if (speed & IXGBE_LINK_SPEED_1GB_FULL)
|
||||
@ -964,7 +964,7 @@ s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
|
||||
|
||||
if (autoc != current_autoc) {
|
||||
/* Restart link */
|
||||
status = hw->mac.ops.prot_autoc_write(hw, autoc, FALSE);
|
||||
status = hw->mac.ops.prot_autoc_write(hw, autoc, false);
|
||||
if (status != IXGBE_SUCCESS)
|
||||
goto out;
|
||||
|
||||
@ -1001,7 +1001,7 @@ s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
|
||||
* ixgbe_setup_copper_link_82599 - Set the PHY autoneg advertised field
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait_to_complete: TRUE if waiting is needed to complete
|
||||
* @autoneg_wait_to_complete: true if waiting is needed to complete
|
||||
*
|
||||
* Restarts link on PHY and MAC based on settings passed in.
|
||||
**/
|
||||
@ -1037,7 +1037,7 @@ s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
|
||||
u32 ctrl = 0;
|
||||
u32 i, autoc, autoc2;
|
||||
u32 curr_lms;
|
||||
bool link_up = FALSE;
|
||||
bool link_up = false;
|
||||
|
||||
DEBUGFUNC("ixgbe_reset_hw_82599");
|
||||
|
||||
@ -1060,14 +1060,14 @@ s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
|
||||
/* Setup SFP module if there is one present. */
|
||||
if (hw->phy.sfp_setup_needed) {
|
||||
status = hw->mac.ops.setup_sfp(hw);
|
||||
hw->phy.sfp_setup_needed = FALSE;
|
||||
hw->phy.sfp_setup_needed = false;
|
||||
}
|
||||
|
||||
if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)
|
||||
goto reset_hw_out;
|
||||
|
||||
/* Reset PHY */
|
||||
if (hw->phy.reset_disable == FALSE && hw->phy.ops.reset != NULL)
|
||||
if (hw->phy.reset_disable == false && hw->phy.ops.reset != NULL)
|
||||
hw->phy.ops.reset(hw);
|
||||
|
||||
/* remember AUTOC from before we reset */
|
||||
@ -1082,7 +1082,7 @@ s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
|
||||
*/
|
||||
ctrl = IXGBE_CTRL_LNK_RST;
|
||||
if (!hw->force_full_reset) {
|
||||
hw->mac.ops.check_link(hw, &link_speed, &link_up, FALSE);
|
||||
hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
|
||||
if (link_up)
|
||||
ctrl = IXGBE_CTRL_RST;
|
||||
}
|
||||
@ -1131,10 +1131,10 @@ s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
|
||||
IXGBE_WRITE_FLUSH(hw);
|
||||
}
|
||||
|
||||
if (hw->mac.orig_link_settings_stored == FALSE) {
|
||||
if (hw->mac.orig_link_settings_stored == false) {
|
||||
hw->mac.orig_autoc = autoc;
|
||||
hw->mac.orig_autoc2 = autoc2;
|
||||
hw->mac.orig_link_settings_stored = TRUE;
|
||||
hw->mac.orig_link_settings_stored = true;
|
||||
} else {
|
||||
|
||||
/* If MNG FW is running on a multi-speed device that
|
||||
@ -1152,7 +1152,7 @@ s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
|
||||
if (autoc != hw->mac.orig_autoc) {
|
||||
status = hw->mac.ops.prot_autoc_write(hw,
|
||||
hw->mac.orig_autoc,
|
||||
FALSE);
|
||||
false);
|
||||
if (status != IXGBE_SUCCESS)
|
||||
goto reset_hw_out;
|
||||
}
|
||||
@ -1368,7 +1368,7 @@ s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl)
|
||||
* @hw: pointer to hardware structure
|
||||
* @fdirctrl: value to write to flow director control register, initially
|
||||
* contains just the value of the Rx packet buffer allocation
|
||||
* @cloud_mode: TRUE - cloud mode, FALSE - other mode
|
||||
* @cloud_mode: true - cloud mode, false - other mode
|
||||
**/
|
||||
s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
|
||||
bool cloud_mode)
|
||||
@ -2135,7 +2135,7 @@ s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw)
|
||||
goto out;
|
||||
|
||||
/* We need to run link autotry after the driver loads */
|
||||
hw->mac.autotry_restart = TRUE;
|
||||
hw->mac.autotry_restart = true;
|
||||
|
||||
if (ret_val == IXGBE_SUCCESS)
|
||||
ret_val = ixgbe_verify_fw_version_82599(hw);
|
||||
@ -2366,12 +2366,12 @@ static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw)
|
||||
* ixgbe_verify_lesm_fw_enabled_82599 - Checks LESM FW module state.
|
||||
* @hw: pointer to hardware structure
|
||||
*
|
||||
* Returns TRUE if the LESM FW module is present and enabled. Otherwise
|
||||
* returns FALSE. Smart Speed must be disabled if LESM FW module is enabled.
|
||||
* Returns true if the LESM FW module is present and enabled. Otherwise
|
||||
* returns false. Smart Speed must be disabled if LESM FW module is enabled.
|
||||
**/
|
||||
bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw)
|
||||
{
|
||||
bool lesm_enabled = FALSE;
|
||||
bool lesm_enabled = false;
|
||||
u16 fw_offset, fw_lesm_param_offset, fw_lesm_state;
|
||||
s32 status;
|
||||
|
||||
@ -2400,7 +2400,7 @@ bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw)
|
||||
|
||||
if ((status == IXGBE_SUCCESS) &&
|
||||
(fw_lesm_state & IXGBE_FW_LESM_STATE_ENABLED))
|
||||
lesm_enabled = TRUE;
|
||||
lesm_enabled = true;
|
||||
|
||||
out:
|
||||
return lesm_enabled;
|
||||
@ -2542,7 +2542,7 @@ static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
|
||||
|
||||
DEBUGFUNC("ixgbe_read_i2c_byte_82599");
|
||||
|
||||
if (hw->phy.qsfp_shared_i2c_bus == TRUE) {
|
||||
if (hw->phy.qsfp_shared_i2c_bus == true) {
|
||||
/* Acquire I2C bus ownership. */
|
||||
esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
|
||||
esdp |= IXGBE_ESDP_SDP0;
|
||||
@ -2570,7 +2570,7 @@ static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
|
||||
|
||||
release_i2c_access:
|
||||
|
||||
if (hw->phy.qsfp_shared_i2c_bus == TRUE) {
|
||||
if (hw->phy.qsfp_shared_i2c_bus == true) {
|
||||
/* Release I2C bus ownership. */
|
||||
esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
|
||||
esdp &= ~IXGBE_ESDP_SDP0;
|
||||
@ -2600,7 +2600,7 @@ static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
|
||||
|
||||
DEBUGFUNC("ixgbe_write_i2c_byte_82599");
|
||||
|
||||
if (hw->phy.qsfp_shared_i2c_bus == TRUE) {
|
||||
if (hw->phy.qsfp_shared_i2c_bus == true) {
|
||||
/* Acquire I2C bus ownership. */
|
||||
esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
|
||||
esdp |= IXGBE_ESDP_SDP0;
|
||||
@ -2628,7 +2628,7 @@ static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
|
||||
|
||||
release_i2c_access:
|
||||
|
||||
if (hw->phy.qsfp_shared_i2c_bus == TRUE) {
|
||||
if (hw->phy.qsfp_shared_i2c_bus == true) {
|
||||
/* Release I2C bus ownership. */
|
||||
esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
|
||||
esdp &= ~IXGBE_ESDP_SDP0;
|
||||
|
@ -585,7 +585,7 @@ s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
|
||||
* ixgbe_check_phy_link - Determine link and speed status
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: link speed
|
||||
* @link_up: TRUE when link is up
|
||||
* @link_up: true when link is up
|
||||
*
|
||||
* Reads a PHY register to determine if link is up and the current speed for
|
||||
* the PHY.
|
||||
@ -601,7 +601,7 @@ s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
|
||||
* ixgbe_setup_phy_link_speed - Set auto advertise
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
*
|
||||
* Sets the auto advertised capabilities
|
||||
**/
|
||||
@ -616,7 +616,7 @@ s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
|
||||
/**
|
||||
* ixgbe_set_phy_power - Control the phy power state
|
||||
* @hw: pointer to hardware structure
|
||||
* @on: TRUE for on, FALSE for off
|
||||
* @on: true for on, false for off
|
||||
*/
|
||||
s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
|
||||
{
|
||||
@ -628,7 +628,7 @@ s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
|
||||
* ixgbe_check_link - Get link and speed status
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: pointer to link speed
|
||||
* @link_up: TRUE when link is up
|
||||
* @link_up: true when link is up
|
||||
* @link_up_wait_to_complete: bool used to wait for link up or not
|
||||
*
|
||||
* Reads the links register to determine if link is up and the current speed
|
||||
@ -683,7 +683,7 @@ void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
|
||||
* ixgbe_setup_link - Set link speed
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
*
|
||||
* Configures link settings. Restarts the link.
|
||||
* Performs autonegotiation if needed.
|
||||
@ -700,7 +700,7 @@ s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
|
||||
* ixgbe_setup_mac_link - Set link speed
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
*
|
||||
* Configures link settings. Restarts the link.
|
||||
* Performs autonegotiation if needed.
|
||||
@ -717,7 +717,7 @@ s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
|
||||
* ixgbe_get_link_capabilities - Returns link capabilities
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: link speed capabilities
|
||||
* @autoneg: TRUE when autoneg or autotry is enabled
|
||||
* @autoneg: true when autoneg or autotry is enabled
|
||||
*
|
||||
* Determines the link capabilities of the current configuration.
|
||||
**/
|
||||
|
@ -156,13 +156,13 @@ s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw)
|
||||
* of flow control
|
||||
* @hw: pointer to hardware structure
|
||||
*
|
||||
* This function returns TRUE if the device supports flow control
|
||||
* autonegotiation, and FALSE if it does not.
|
||||
* This function returns true if the device supports flow control
|
||||
* autonegotiation, and false if it does not.
|
||||
*
|
||||
**/
|
||||
bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)
|
||||
{
|
||||
bool supported = FALSE;
|
||||
bool supported = false;
|
||||
ixgbe_link_speed speed;
|
||||
bool link_up;
|
||||
|
||||
@ -178,24 +178,24 @@ bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)
|
||||
case IXGBE_DEV_ID_X550EM_A_SFP_N:
|
||||
case IXGBE_DEV_ID_X550EM_A_QSFP:
|
||||
case IXGBE_DEV_ID_X550EM_A_QSFP_N:
|
||||
supported = FALSE;
|
||||
supported = false;
|
||||
break;
|
||||
default:
|
||||
hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);
|
||||
hw->mac.ops.check_link(hw, &speed, &link_up, false);
|
||||
/* if link is down, assume supported */
|
||||
if (link_up)
|
||||
supported = speed == IXGBE_LINK_SPEED_1GB_FULL ?
|
||||
TRUE : FALSE;
|
||||
true : false;
|
||||
else
|
||||
supported = TRUE;
|
||||
supported = true;
|
||||
}
|
||||
|
||||
break;
|
||||
case ixgbe_media_type_backplane:
|
||||
if (hw->device_id == IXGBE_DEV_ID_X550EM_X_XFI)
|
||||
supported = FALSE;
|
||||
supported = false;
|
||||
else
|
||||
supported = TRUE;
|
||||
supported = true;
|
||||
break;
|
||||
case ixgbe_media_type_copper:
|
||||
/* only some copper devices support flow control autoneg */
|
||||
@ -210,10 +210,10 @@ bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)
|
||||
case IXGBE_DEV_ID_X550EM_A_10G_T:
|
||||
case IXGBE_DEV_ID_X550EM_A_1G_T:
|
||||
case IXGBE_DEV_ID_X550EM_A_1G_T_L:
|
||||
supported = TRUE;
|
||||
supported = true;
|
||||
break;
|
||||
default:
|
||||
supported = FALSE;
|
||||
supported = false;
|
||||
}
|
||||
default:
|
||||
break;
|
||||
@ -238,7 +238,7 @@ s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw)
|
||||
s32 ret_val = IXGBE_SUCCESS;
|
||||
u32 reg = 0, reg_bp = 0;
|
||||
u16 reg_cu = 0;
|
||||
bool locked = FALSE;
|
||||
bool locked = false;
|
||||
|
||||
DEBUGFUNC("ixgbe_setup_fc_generic");
|
||||
|
||||
@ -432,17 +432,17 @@ s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw)
|
||||
case ixgbe_mac_X550EM_a:
|
||||
hw->mac.ops.get_device_caps(hw, &device_caps);
|
||||
if (device_caps & IXGBE_DEVICE_CAPS_NO_CROSSTALK_WR)
|
||||
hw->need_crosstalk_fix = FALSE;
|
||||
hw->need_crosstalk_fix = false;
|
||||
else
|
||||
hw->need_crosstalk_fix = TRUE;
|
||||
hw->need_crosstalk_fix = true;
|
||||
break;
|
||||
default:
|
||||
hw->need_crosstalk_fix = FALSE;
|
||||
hw->need_crosstalk_fix = false;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Clear adapter stopped flag */
|
||||
hw->adapter_stopped = FALSE;
|
||||
hw->adapter_stopped = false;
|
||||
|
||||
return IXGBE_SUCCESS;
|
||||
}
|
||||
@ -1121,7 +1121,7 @@ s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw)
|
||||
* Set the adapter_stopped flag so other driver functions stop touching
|
||||
* the hardware
|
||||
*/
|
||||
hw->adapter_stopped = TRUE;
|
||||
hw->adapter_stopped = true;
|
||||
|
||||
/* Disable the receive unit */
|
||||
ixgbe_disable_rx(hw);
|
||||
@ -3124,7 +3124,7 @@ void ixgbe_fc_autoneg(struct ixgbe_hw *hw)
|
||||
goto out;
|
||||
}
|
||||
|
||||
hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);
|
||||
hw->mac.ops.check_link(hw, &speed, &link_up, false);
|
||||
if (!link_up) {
|
||||
ERROR_REPORT1(IXGBE_ERROR_SOFTWARE, "The link is down");
|
||||
goto out;
|
||||
@ -3156,9 +3156,9 @@ void ixgbe_fc_autoneg(struct ixgbe_hw *hw)
|
||||
|
||||
out:
|
||||
if (ret_val == IXGBE_SUCCESS) {
|
||||
hw->fc.fc_was_autonegged = TRUE;
|
||||
hw->fc.fc_was_autonegged = true;
|
||||
} else {
|
||||
hw->fc.fc_was_autonegged = FALSE;
|
||||
hw->fc.fc_was_autonegged = false;
|
||||
hw->fc.current_mode = hw->fc.requested_mode;
|
||||
}
|
||||
}
|
||||
@ -3396,7 +3396,7 @@ s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw)
|
||||
*/
|
||||
s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)
|
||||
{
|
||||
*locked = FALSE;
|
||||
*locked = false;
|
||||
*reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC);
|
||||
return IXGBE_SUCCESS;
|
||||
}
|
||||
@ -3469,7 +3469,7 @@ s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index)
|
||||
u32 autoc_reg = 0;
|
||||
u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
|
||||
s32 ret_val = IXGBE_SUCCESS;
|
||||
bool locked = FALSE;
|
||||
bool locked = false;
|
||||
|
||||
DEBUGFUNC("ixgbe_blink_led_start_generic");
|
||||
|
||||
@ -3480,7 +3480,7 @@ s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index)
|
||||
* Link must be up to auto-blink the LEDs;
|
||||
* Force it if link is down.
|
||||
*/
|
||||
hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);
|
||||
hw->mac.ops.check_link(hw, &speed, &link_up, false);
|
||||
|
||||
if (!link_up) {
|
||||
ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg);
|
||||
@ -3517,7 +3517,7 @@ s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index)
|
||||
u32 autoc_reg = 0;
|
||||
u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
|
||||
s32 ret_val = IXGBE_SUCCESS;
|
||||
bool locked = FALSE;
|
||||
bool locked = false;
|
||||
|
||||
DEBUGFUNC("ixgbe_blink_led_stop_generic");
|
||||
|
||||
@ -3916,7 +3916,7 @@ s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw)
|
||||
* ixgbe_find_vlvf_slot - find the vlanid or the first empty slot
|
||||
* @hw: pointer to hardware structure
|
||||
* @vlan: VLAN id to write to VLAN filter
|
||||
* @vlvf_bypass: TRUE to find vlanid only, FALSE returns first empty slot if
|
||||
* @vlvf_bypass: true to find vlanid only, false returns first empty slot if
|
||||
* vlanid not found
|
||||
*
|
||||
*
|
||||
@ -4152,7 +4152,7 @@ static bool ixgbe_need_crosstalk_fix(struct ixgbe_hw *hw)
|
||||
|
||||
/* Does FW say we need the fix */
|
||||
if (!hw->need_crosstalk_fix)
|
||||
return FALSE;
|
||||
return false;
|
||||
|
||||
/* Only consider SFP+ PHYs i.e. media type fiber */
|
||||
switch (hw->mac.ops.get_media_type(hw)) {
|
||||
@ -4160,17 +4160,17 @@ static bool ixgbe_need_crosstalk_fix(struct ixgbe_hw *hw)
|
||||
case ixgbe_media_type_fiber_qsfp:
|
||||
break;
|
||||
default:
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* ixgbe_check_mac_link_generic - Determine link and speed status
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: pointer to link speed
|
||||
* @link_up: TRUE when link is up
|
||||
* @link_up: true when link is up
|
||||
* @link_up_wait_to_complete: bool used to wait for link up or not
|
||||
*
|
||||
* Reads the links register to determine if link is up and the current speed
|
||||
@ -4201,12 +4201,12 @@ s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
|
||||
break;
|
||||
default:
|
||||
/* sanity check - No SFP+ devices here */
|
||||
sfp_cage_full = FALSE;
|
||||
sfp_cage_full = false;
|
||||
break;
|
||||
}
|
||||
|
||||
if (!sfp_cage_full) {
|
||||
*link_up = FALSE;
|
||||
*link_up = false;
|
||||
*speed = IXGBE_LINK_SPEED_UNKNOWN;
|
||||
return IXGBE_SUCCESS;
|
||||
}
|
||||
@ -4225,19 +4225,19 @@ s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
|
||||
if (link_up_wait_to_complete) {
|
||||
for (i = 0; i < hw->mac.max_link_up_time; i++) {
|
||||
if (links_reg & IXGBE_LINKS_UP) {
|
||||
*link_up = TRUE;
|
||||
*link_up = true;
|
||||
break;
|
||||
} else {
|
||||
*link_up = FALSE;
|
||||
*link_up = false;
|
||||
}
|
||||
msec_delay(100);
|
||||
links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
|
||||
}
|
||||
} else {
|
||||
if (links_reg & IXGBE_LINKS_UP)
|
||||
*link_up = TRUE;
|
||||
*link_up = true;
|
||||
else
|
||||
*link_up = FALSE;
|
||||
*link_up = false;
|
||||
}
|
||||
|
||||
switch (links_reg & IXGBE_LINKS_SPEED_82599) {
|
||||
@ -4582,7 +4582,7 @@ s32 ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 length,
|
||||
* be placed
|
||||
* @length: length of buffer, must be multiple of 4 bytes
|
||||
* @timeout: time in ms to wait for command completion
|
||||
* @return_data: read and return data from the buffer (TRUE) or not (FALSE)
|
||||
* @return_data: read and return data from the buffer (true) or not (false)
|
||||
* Needed because FW structures are big endian and decoding of
|
||||
* these fields can be 8 bit or 16 bit based on command. Decoding
|
||||
* is not easily understood without making a table of commands.
|
||||
@ -4717,7 +4717,7 @@ s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
|
||||
ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
|
||||
sizeof(fw_cmd),
|
||||
IXGBE_HI_COMMAND_TIMEOUT,
|
||||
TRUE);
|
||||
true);
|
||||
if (ret_val != IXGBE_SUCCESS)
|
||||
continue;
|
||||
|
||||
@ -4984,7 +4984,7 @@ bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg)
|
||||
|
||||
/* Page must match for all control pages */
|
||||
if ((in_reg & BYPASS_PAGE_M) != (out_reg & BYPASS_PAGE_M))
|
||||
return FALSE;
|
||||
return false;
|
||||
|
||||
switch (in_reg & BYPASS_PAGE_M) {
|
||||
case BYPASS_PAGE_CTL0:
|
||||
@ -4997,11 +4997,11 @@ bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg)
|
||||
BYPASS_WDTIMEOUT_M |
|
||||
BYPASS_WDT_VALUE_M;
|
||||
if ((out_reg & mask) != (in_reg & mask))
|
||||
return FALSE;
|
||||
return false;
|
||||
|
||||
/* 0x0 is never a valid value for bypass status */
|
||||
if (!(out_reg & BYPASS_STATUS_OFF_M))
|
||||
return FALSE;
|
||||
return false;
|
||||
break;
|
||||
case BYPASS_PAGE_CTL1:
|
||||
/* All the following can't change since the last write
|
||||
@ -5010,7 +5010,7 @@ bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg)
|
||||
*/
|
||||
mask = BYPASS_CTL1_VALID_M | BYPASS_CTL1_TIME_M;
|
||||
if ((out_reg & mask) != (in_reg & mask))
|
||||
return FALSE;
|
||||
return false;
|
||||
break;
|
||||
case BYPASS_PAGE_CTL2:
|
||||
/* All we can check in this page is control number
|
||||
@ -5019,8 +5019,8 @@ bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg)
|
||||
break;
|
||||
}
|
||||
|
||||
/* We are as sure as we can be return TRUE */
|
||||
return TRUE;
|
||||
/* We are as sure as we can be return true */
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -5107,15 +5107,15 @@ s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value)
|
||||
* @hw: pointer to hardware structure
|
||||
* @nvm_ver: pointer to output structure
|
||||
*
|
||||
* if valid option ROM version, nvm_ver->or_valid set to TRUE
|
||||
* else nvm_ver->or_valid is FALSE.
|
||||
* if valid option ROM version, nvm_ver->or_valid set to true
|
||||
* else nvm_ver->or_valid is false.
|
||||
**/
|
||||
void ixgbe_get_orom_version(struct ixgbe_hw *hw,
|
||||
struct ixgbe_nvm_version *nvm_ver)
|
||||
{
|
||||
u16 offset, eeprom_cfg_blkh, eeprom_cfg_blkl;
|
||||
|
||||
nvm_ver->or_valid = FALSE;
|
||||
nvm_ver->or_valid = false;
|
||||
/* Option Rom may or may not be present. Start with pointer */
|
||||
hw->eeprom.ops.read(hw, NVM_OROM_OFFSET, &offset);
|
||||
|
||||
@ -5132,7 +5132,7 @@ void ixgbe_get_orom_version(struct ixgbe_hw *hw,
|
||||
eeprom_cfg_blkh == NVM_VER_INVALID)
|
||||
return;
|
||||
|
||||
nvm_ver->or_valid = TRUE;
|
||||
nvm_ver->or_valid = true;
|
||||
nvm_ver->or_major = eeprom_cfg_blkl >> NVM_OROM_SHIFT;
|
||||
nvm_ver->or_build = (eeprom_cfg_blkl << NVM_OROM_SHIFT) |
|
||||
(eeprom_cfg_blkh >> NVM_OROM_SHIFT);
|
||||
@ -5145,15 +5145,15 @@ void ixgbe_get_orom_version(struct ixgbe_hw *hw,
|
||||
* @hw: pointer to hardware structure
|
||||
* @nvm_ver: pointer to output structure
|
||||
*
|
||||
* if valid OEM product version, nvm_ver->oem_valid set to TRUE
|
||||
* else nvm_ver->oem_valid is FALSE.
|
||||
* if valid OEM product version, nvm_ver->oem_valid set to true
|
||||
* else nvm_ver->oem_valid is false.
|
||||
**/
|
||||
void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
|
||||
struct ixgbe_nvm_version *nvm_ver)
|
||||
{
|
||||
u16 rel_num, prod_ver, mod_len, cap, offset;
|
||||
|
||||
nvm_ver->oem_valid = FALSE;
|
||||
nvm_ver->oem_valid = false;
|
||||
hw->eeprom.ops.read(hw, NVM_OEM_PROD_VER_PTR, &offset);
|
||||
|
||||
/* Return if offset to OEM Product Version block is invalid */
|
||||
@ -5180,7 +5180,7 @@ void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
|
||||
nvm_ver->oem_major = prod_ver >> NVM_VER_SHIFT;
|
||||
nvm_ver->oem_minor = prod_ver & NVM_VER_MASK;
|
||||
nvm_ver->oem_release = rel_num;
|
||||
nvm_ver->oem_valid = TRUE;
|
||||
nvm_ver->oem_valid = true;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -5243,9 +5243,9 @@ void ixgbe_disable_rx_generic(struct ixgbe_hw *hw)
|
||||
if (pfdtxgswc & IXGBE_PFDTXGSWC_VT_LBEN) {
|
||||
pfdtxgswc &= ~IXGBE_PFDTXGSWC_VT_LBEN;
|
||||
IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc);
|
||||
hw->mac.set_lben = TRUE;
|
||||
hw->mac.set_lben = true;
|
||||
} else {
|
||||
hw->mac.set_lben = FALSE;
|
||||
hw->mac.set_lben = false;
|
||||
}
|
||||
}
|
||||
rxctrl &= ~IXGBE_RXCTRL_RXEN;
|
||||
@ -5266,13 +5266,13 @@ void ixgbe_enable_rx_generic(struct ixgbe_hw *hw)
|
||||
pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC);
|
||||
pfdtxgswc |= IXGBE_PFDTXGSWC_VT_LBEN;
|
||||
IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc);
|
||||
hw->mac.set_lben = FALSE;
|
||||
hw->mac.set_lben = false;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* ixgbe_mng_present - returns TRUE when management capability is present
|
||||
* ixgbe_mng_present - returns true when management capability is present
|
||||
* @hw: pointer to hardware structure
|
||||
*/
|
||||
bool ixgbe_mng_present(struct ixgbe_hw *hw)
|
||||
@ -5280,7 +5280,7 @@ bool ixgbe_mng_present(struct ixgbe_hw *hw)
|
||||
u32 fwsm;
|
||||
|
||||
if (hw->mac.type < ixgbe_mac_82599EB)
|
||||
return FALSE;
|
||||
return false;
|
||||
|
||||
fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw));
|
||||
|
||||
@ -5291,7 +5291,7 @@ bool ixgbe_mng_present(struct ixgbe_hw *hw)
|
||||
* ixgbe_mng_enabled - Is the manageability engine enabled?
|
||||
* @hw: pointer to hardware structure
|
||||
*
|
||||
* Returns TRUE if the manageability engine is enabled.
|
||||
* Returns true if the manageability engine is enabled.
|
||||
**/
|
||||
bool ixgbe_mng_enabled(struct ixgbe_hw *hw)
|
||||
{
|
||||
@ -5299,26 +5299,26 @@ bool ixgbe_mng_enabled(struct ixgbe_hw *hw)
|
||||
|
||||
fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw));
|
||||
if ((fwsm & IXGBE_FWSM_MODE_MASK) != IXGBE_FWSM_FW_MODE_PT)
|
||||
return FALSE;
|
||||
return false;
|
||||
|
||||
manc = IXGBE_READ_REG(hw, IXGBE_MANC);
|
||||
if (!(manc & IXGBE_MANC_RCV_TCO_EN))
|
||||
return FALSE;
|
||||
return false;
|
||||
|
||||
if (hw->mac.type <= ixgbe_mac_X540) {
|
||||
factps = IXGBE_READ_REG(hw, IXGBE_FACTPS_BY_MAC(hw));
|
||||
if (factps & IXGBE_FACTPS_MNGCG)
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* ixgbe_setup_mac_link_multispeed_fiber - Set MAC link speed
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
*
|
||||
* Set the link speed in the MAC and/or PHY register and restarts link.
|
||||
**/
|
||||
@ -5331,7 +5331,7 @@ s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
|
||||
s32 status = IXGBE_SUCCESS;
|
||||
u32 speedcnt = 0;
|
||||
u32 i = 0;
|
||||
bool autoneg, link_up = FALSE;
|
||||
bool autoneg, link_up = false;
|
||||
|
||||
DEBUGFUNC("ixgbe_setup_mac_link_multispeed_fiber");
|
||||
|
||||
@ -5386,7 +5386,7 @@ s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
|
||||
|
||||
/* If we have link, just jump out */
|
||||
status = ixgbe_check_link(hw, &link_speed,
|
||||
&link_up, FALSE);
|
||||
&link_up, false);
|
||||
if (status != IXGBE_SUCCESS)
|
||||
return status;
|
||||
|
||||
@ -5431,7 +5431,7 @@ s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
|
||||
msec_delay(100);
|
||||
|
||||
/* If we have link, just jump out */
|
||||
status = ixgbe_check_link(hw, &link_speed, &link_up, FALSE);
|
||||
status = ixgbe_check_link(hw, &link_speed, &link_up, false);
|
||||
if (status != IXGBE_SUCCESS)
|
||||
return status;
|
||||
|
||||
|
@ -332,7 +332,7 @@ s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *dcb_config)
|
||||
goto err_config;
|
||||
}
|
||||
if (p->tsa == ixgbe_dcb_tsa_strict) {
|
||||
link_strict[i][bw_id] = TRUE;
|
||||
link_strict[i][bw_id] = true;
|
||||
/* Link strict should have zero bandwidth */
|
||||
if (bw) {
|
||||
ret_val = IXGBE_ERR_CONFIG;
|
||||
|
@ -385,17 +385,17 @@ s32 ixgbe_dcb_config_tc_stats_82599(struct ixgbe_hw *hw,
|
||||
u32 reg = 0;
|
||||
u8 i = 0;
|
||||
u8 tc_count = 8;
|
||||
bool vt_mode = FALSE;
|
||||
bool vt_mode = false;
|
||||
|
||||
if (dcb_config != NULL) {
|
||||
tc_count = dcb_config->num_tcs.pg_tcs;
|
||||
vt_mode = dcb_config->vt_mode;
|
||||
}
|
||||
|
||||
if (!((tc_count == 8 && vt_mode == FALSE) || tc_count == 4))
|
||||
if (!((tc_count == 8 && vt_mode == false) || tc_count == 4))
|
||||
return IXGBE_ERR_PARAM;
|
||||
|
||||
if (tc_count == 8 && vt_mode == FALSE) {
|
||||
if (tc_count == 8 && vt_mode == false) {
|
||||
/*
|
||||
* Receive Queues stats setting
|
||||
* 32 RQSMR registers, each configuring 4 queues.
|
||||
@ -435,7 +435,7 @@ s32 ixgbe_dcb_config_tc_stats_82599(struct ixgbe_hw *hw,
|
||||
reg = 0x07070707;
|
||||
IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), reg);
|
||||
}
|
||||
} else if (tc_count == 4 && vt_mode == FALSE) {
|
||||
} else if (tc_count == 4 && vt_mode == false) {
|
||||
/*
|
||||
* Receive Queues stats setting
|
||||
* 32 RQSMR registers, each configuring 4 queues.
|
||||
@ -472,7 +472,7 @@ s32 ixgbe_dcb_config_tc_stats_82599(struct ixgbe_hw *hw,
|
||||
reg = 0x03030303;
|
||||
IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), reg);
|
||||
}
|
||||
} else if (tc_count == 4 && vt_mode == TRUE) {
|
||||
} else if (tc_count == 4 && vt_mode == true) {
|
||||
/*
|
||||
* Receive Queues stats setting
|
||||
* 32 RQSMR registers, each configuring 4 queues.
|
||||
|
@ -263,7 +263,7 @@ static s32 ixgbe_check_for_ack_vf(struct ixgbe_hw *hw, u16 mbx_id)
|
||||
* @hw: pointer to the HW structure
|
||||
* @mbx_id: id of mailbox to check
|
||||
*
|
||||
* returns TRUE if the PF has set the reset done bit or else FALSE
|
||||
* returns true if the PF has set the reset done bit or else false
|
||||
**/
|
||||
static s32 ixgbe_check_for_rst_vf(struct ixgbe_hw *hw, u16 mbx_id)
|
||||
{
|
||||
|
@ -68,7 +68,7 @@
|
||||
|
||||
|
||||
/* If it's a IXGBE_VF_* msg then it originates in the VF and is sent to the
|
||||
* PF. The reverse is TRUE if it is IXGBE_PF_*.
|
||||
* PF. The reverse is true if it is IXGBE_PF_*.
|
||||
* Message ACK's are the value or'd with 0xF0000000
|
||||
*/
|
||||
#define IXGBE_VT_MSGTYPE_ACK 0x80000000 /* Messages below or'd with
|
||||
|
@ -115,10 +115,6 @@ enum {
|
||||
#define ERROR_REPORT3(S,A,B,C)
|
||||
#endif
|
||||
|
||||
#define FALSE 0
|
||||
#define false 0 /* shared code requires this */
|
||||
#define TRUE 1
|
||||
#define true 1
|
||||
#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
|
||||
#define PCI_COMMAND_REGISTER PCIR_COMMAND
|
||||
|
||||
|
@ -83,7 +83,7 @@ static s32 ixgbe_in_i2c_byte_ack(struct ixgbe_hw *hw, u8 *byte)
|
||||
if (status)
|
||||
return status;
|
||||
/* ACK */
|
||||
return ixgbe_clock_out_i2c_bit(hw, FALSE);
|
||||
return ixgbe_clock_out_i2c_bit(hw, false);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -107,7 +107,7 @@ static u8 ixgbe_ones_comp_byte_add(u8 add1, u8 add2)
|
||||
* @addr: I2C bus address to read from
|
||||
* @reg: I2C device register to read from
|
||||
* @val: pointer to location to receive read value
|
||||
* @lock: TRUE if to take and release semaphore
|
||||
* @lock: true if to take and release semaphore
|
||||
*
|
||||
* Returns an error code on error.
|
||||
*/
|
||||
@ -157,7 +157,7 @@ s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg,
|
||||
if (ixgbe_clock_in_i2c_byte(hw, &csum_byte))
|
||||
goto fail;
|
||||
/* NACK */
|
||||
if (ixgbe_clock_out_i2c_bit(hw, FALSE))
|
||||
if (ixgbe_clock_out_i2c_bit(hw, false))
|
||||
goto fail;
|
||||
ixgbe_i2c_stop(hw);
|
||||
if (lock)
|
||||
@ -185,7 +185,7 @@ s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg,
|
||||
* @addr: I2C bus address to write to
|
||||
* @reg: I2C device register to write to
|
||||
* @val: value to write
|
||||
* @lock: TRUE if to take and release semaphore
|
||||
* @lock: true if to take and release semaphore
|
||||
*
|
||||
* Returns an error code on error.
|
||||
*/
|
||||
@ -287,7 +287,7 @@ s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw)
|
||||
* @hw: pointer to hardware structure
|
||||
* @phy_addr: PHY address to probe
|
||||
*
|
||||
* Returns TRUE if PHY found
|
||||
* Returns true if PHY found
|
||||
*/
|
||||
static bool ixgbe_probe_phy(struct ixgbe_hw *hw, u16 phy_addr)
|
||||
{
|
||||
@ -296,11 +296,11 @@ static bool ixgbe_probe_phy(struct ixgbe_hw *hw, u16 phy_addr)
|
||||
if (!ixgbe_validate_phy_addr(hw, phy_addr)) {
|
||||
DEBUGOUT1("Unable to validate PHY address 0x%04X\n",
|
||||
phy_addr);
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
|
||||
if (ixgbe_get_phy_id(hw))
|
||||
return FALSE;
|
||||
return false;
|
||||
|
||||
hw->phy.type = ixgbe_get_phy_type_from_id(hw->phy.id);
|
||||
|
||||
@ -315,7 +315,7 @@ static bool ixgbe_probe_phy(struct ixgbe_hw *hw, u16 phy_addr)
|
||||
hw->phy.type = ixgbe_phy_generic;
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -385,16 +385,16 @@ s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw)
|
||||
|
||||
/* If we don't have this bit, it can't be blocking */
|
||||
if (hw->mac.type == ixgbe_mac_82598EB)
|
||||
return FALSE;
|
||||
return false;
|
||||
|
||||
mmngc = IXGBE_READ_REG(hw, IXGBE_MMNGC);
|
||||
if (mmngc & IXGBE_MMNGC_MNG_VETO) {
|
||||
ERROR_REPORT1(IXGBE_ERROR_SOFTWARE,
|
||||
"MNG_VETO bit detected.\n");
|
||||
return TRUE;
|
||||
return true;
|
||||
}
|
||||
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -406,7 +406,7 @@ s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw)
|
||||
bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr)
|
||||
{
|
||||
u16 phy_id = 0;
|
||||
bool valid = FALSE;
|
||||
bool valid = false;
|
||||
|
||||
DEBUGFUNC("ixgbe_validate_phy_addr");
|
||||
|
||||
@ -415,7 +415,7 @@ bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr)
|
||||
IXGBE_MDIO_PMA_PMD_DEV_TYPE, &phy_id);
|
||||
|
||||
if (phy_id != 0xFFFF && phy_id != 0x0)
|
||||
valid = TRUE;
|
||||
valid = true;
|
||||
|
||||
DEBUGOUT1("PHY ID HIGH is 0x%04X\n", phy_id);
|
||||
|
||||
@ -792,7 +792,7 @@ s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw)
|
||||
{
|
||||
s32 status = IXGBE_SUCCESS;
|
||||
u16 autoneg_reg = IXGBE_MII_AUTONEG_REG;
|
||||
bool autoneg = FALSE;
|
||||
bool autoneg = false;
|
||||
ixgbe_link_speed speed;
|
||||
|
||||
DEBUGFUNC("ixgbe_setup_phy_link_generic");
|
||||
@ -972,7 +972,7 @@ s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
|
||||
|
||||
DEBUGFUNC("ixgbe_get_copper_link_capabilities_generic");
|
||||
|
||||
*autoneg = TRUE;
|
||||
*autoneg = true;
|
||||
if (!hw->phy.speeds_supported)
|
||||
status = ixgbe_get_copper_speeds_supported(hw);
|
||||
|
||||
@ -984,7 +984,7 @@ s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
|
||||
* ixgbe_check_phy_link_tnx - Determine link and speed status
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: current link speed
|
||||
* @link_up: TRUE is link is up, FALSE otherwise
|
||||
* @link_up: true is link is up, false otherwise
|
||||
*
|
||||
* Reads the VS1 register to determine if link is up and the current speed for
|
||||
* the PHY.
|
||||
@ -1002,7 +1002,7 @@ s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
|
||||
DEBUGFUNC("ixgbe_check_phy_link_tnx");
|
||||
|
||||
/* Initialize speed and link to default case */
|
||||
*link_up = FALSE;
|
||||
*link_up = false;
|
||||
*speed = IXGBE_LINK_SPEED_10GB_FULL;
|
||||
|
||||
/*
|
||||
@ -1020,7 +1020,7 @@ s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
|
||||
phy_speed = phy_data &
|
||||
IXGBE_MDIO_VENDOR_SPECIFIC_1_SPEED_STATUS;
|
||||
if (phy_link == IXGBE_MDIO_VENDOR_SPECIFIC_1_LINK_STATUS) {
|
||||
*link_up = TRUE;
|
||||
*link_up = true;
|
||||
if (phy_speed ==
|
||||
IXGBE_MDIO_VENDOR_SPECIFIC_1_SPEED_STATUS)
|
||||
*speed = IXGBE_LINK_SPEED_1GB_FULL;
|
||||
@ -1041,7 +1041,7 @@ s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw)
|
||||
{
|
||||
s32 status = IXGBE_SUCCESS;
|
||||
u16 autoneg_reg = IXGBE_MII_AUTONEG_REG;
|
||||
bool autoneg = FALSE;
|
||||
bool autoneg = false;
|
||||
ixgbe_link_speed speed;
|
||||
|
||||
DEBUGFUNC("ixgbe_setup_phy_link_tnx");
|
||||
@ -1154,7 +1154,7 @@ s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw,
|
||||
s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
|
||||
{
|
||||
u16 phy_offset, control, eword, edata, block_crc;
|
||||
bool end_data = FALSE;
|
||||
bool end_data = false;
|
||||
u16 list_offset, data_offset;
|
||||
u16 phy_data = 0;
|
||||
s32 ret_val = IXGBE_SUCCESS;
|
||||
@ -1238,7 +1238,7 @@ s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
|
||||
DEBUGOUT("CONTROL:\n");
|
||||
if (edata == IXGBE_CONTROL_EOL_NL) {
|
||||
DEBUGOUT("EOL\n");
|
||||
end_data = TRUE;
|
||||
end_data = true;
|
||||
} else if (edata == IXGBE_CONTROL_SOL_NL) {
|
||||
DEBUGOUT("SOL\n");
|
||||
} else {
|
||||
@ -1439,15 +1439,15 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
|
||||
}
|
||||
|
||||
if (hw->phy.sfp_type != stored_sfp_type)
|
||||
hw->phy.sfp_setup_needed = TRUE;
|
||||
hw->phy.sfp_setup_needed = true;
|
||||
|
||||
/* Determine if the SFP+ PHY is dual speed or not. */
|
||||
hw->phy.multispeed_fiber = FALSE;
|
||||
hw->phy.multispeed_fiber = false;
|
||||
if (((comp_codes_1g & IXGBE_SFF_1GBASESX_CAPABLE) &&
|
||||
(comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE)) ||
|
||||
((comp_codes_1g & IXGBE_SFF_1GBASELX_CAPABLE) &&
|
||||
(comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE)))
|
||||
hw->phy.multispeed_fiber = TRUE;
|
||||
hw->phy.multispeed_fiber = true;
|
||||
|
||||
/* Determine PHY vendor */
|
||||
if (hw->phy.type != ixgbe_phy_nl) {
|
||||
@ -1544,7 +1544,7 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
|
||||
if (hw->phy.type == ixgbe_phy_sfp_intel) {
|
||||
status = IXGBE_SUCCESS;
|
||||
} else {
|
||||
if (hw->allow_unsupported_sfp == TRUE) {
|
||||
if (hw->allow_unsupported_sfp == true) {
|
||||
EWARN(hw, "WARNING: Intel (R) Network Connections are quality tested using Intel (R) Ethernet Optics. Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. Intel Corporation is not responsible for any harm caused by using untested modules.\n");
|
||||
status = IXGBE_SUCCESS;
|
||||
} else {
|
||||
@ -1652,7 +1652,7 @@ s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw)
|
||||
u8 connector = 0;
|
||||
u8 cable_length = 0;
|
||||
u8 device_tech = 0;
|
||||
bool active_cable = FALSE;
|
||||
bool active_cable = false;
|
||||
|
||||
DEBUGFUNC("ixgbe_identify_qsfp_module_generic");
|
||||
|
||||
@ -1705,7 +1705,7 @@ s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw)
|
||||
hw->phy.sfp_type = ixgbe_sfp_type_srlr_core1;
|
||||
} else {
|
||||
if (comp_codes_10g & IXGBE_SFF_QSFP_DA_ACTIVE_CABLE)
|
||||
active_cable = TRUE;
|
||||
active_cable = true;
|
||||
|
||||
if (!active_cable) {
|
||||
/* check for active DA cables that pre-date
|
||||
@ -1727,7 +1727,7 @@ s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw)
|
||||
(cable_length > 0) &&
|
||||
((device_tech >> 4) ==
|
||||
IXGBE_SFF_QSFP_TRANSMITER_850NM_VCSEL))
|
||||
active_cable = TRUE;
|
||||
active_cable = true;
|
||||
}
|
||||
|
||||
if (active_cable) {
|
||||
@ -1747,15 +1747,15 @@ s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw)
|
||||
}
|
||||
|
||||
if (hw->phy.sfp_type != stored_sfp_type)
|
||||
hw->phy.sfp_setup_needed = TRUE;
|
||||
hw->phy.sfp_setup_needed = true;
|
||||
|
||||
/* Determine if the QSFP+ PHY is dual speed or not. */
|
||||
hw->phy.multispeed_fiber = FALSE;
|
||||
hw->phy.multispeed_fiber = false;
|
||||
if (((comp_codes_1g & IXGBE_SFF_1GBASESX_CAPABLE) &&
|
||||
(comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE)) ||
|
||||
((comp_codes_1g & IXGBE_SFF_1GBASELX_CAPABLE) &&
|
||||
(comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE)))
|
||||
hw->phy.multispeed_fiber = TRUE;
|
||||
hw->phy.multispeed_fiber = true;
|
||||
|
||||
/* Determine PHY vendor for optical modules */
|
||||
if (comp_codes_10g & (IXGBE_SFF_10GBASESR_CAPABLE |
|
||||
@ -1797,7 +1797,7 @@ s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw)
|
||||
if (hw->phy.type == ixgbe_phy_qsfp_intel) {
|
||||
status = IXGBE_SUCCESS;
|
||||
} else {
|
||||
if (hw->allow_unsupported_sfp == TRUE) {
|
||||
if (hw->allow_unsupported_sfp == true) {
|
||||
EWARN(hw, "WARNING: Intel (R) Network Connections are quality tested using Intel (R) Ethernet Optics. Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. Intel Corporation is not responsible for any harm caused by using untested modules.\n");
|
||||
status = IXGBE_SUCCESS;
|
||||
} else {
|
||||
@ -1971,7 +1971,7 @@ s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
|
||||
}
|
||||
|
||||
/**
|
||||
* ixgbe_is_sfp_probe - Returns TRUE if SFP is being detected
|
||||
* ixgbe_is_sfp_probe - Returns true if SFP is being detected
|
||||
* @hw: pointer to hardware structure
|
||||
* @offset: eeprom offset to be read
|
||||
* @addr: I2C address to be read
|
||||
@ -1981,8 +1981,8 @@ static bool ixgbe_is_sfp_probe(struct ixgbe_hw *hw, u8 offset, u8 addr)
|
||||
if (addr == IXGBE_I2C_EEPROM_DEV_ADDR &&
|
||||
offset == IXGBE_SFF_IDENTIFIER &&
|
||||
hw->phy.sfp_type == ixgbe_sfp_type_not_present)
|
||||
return TRUE;
|
||||
return FALSE;
|
||||
return true;
|
||||
return false;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -1991,7 +1991,7 @@ static bool ixgbe_is_sfp_probe(struct ixgbe_hw *hw, u8 offset, u8 addr)
|
||||
* @byte_offset: byte offset to read
|
||||
* @dev_addr: address to read from
|
||||
* @data: value read
|
||||
* @lock: TRUE if to take and release semaphore
|
||||
* @lock: true if to take and release semaphore
|
||||
*
|
||||
* Performs byte read operation to SFP module's EEPROM over I2C interface at
|
||||
* a specified device address.
|
||||
@ -2091,7 +2091,7 @@ s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
|
||||
u8 dev_addr, u8 *data)
|
||||
{
|
||||
return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr,
|
||||
data, TRUE);
|
||||
data, true);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -2108,7 +2108,7 @@ s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
|
||||
u8 dev_addr, u8 *data)
|
||||
{
|
||||
return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr,
|
||||
data, FALSE);
|
||||
data, false);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -2117,7 +2117,7 @@ s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
|
||||
* @byte_offset: byte offset to write
|
||||
* @dev_addr: address to write to
|
||||
* @data: value to write
|
||||
* @lock: TRUE if to take and release semaphore
|
||||
* @lock: true if to take and release semaphore
|
||||
*
|
||||
* Performs byte write operation to SFP module's EEPROM over I2C interface at
|
||||
* a specified device address.
|
||||
@ -2197,7 +2197,7 @@ s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
|
||||
u8 dev_addr, u8 data)
|
||||
{
|
||||
return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr,
|
||||
data, TRUE);
|
||||
data, true);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -2214,7 +2214,7 @@ s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
|
||||
u8 dev_addr, u8 data)
|
||||
{
|
||||
return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr,
|
||||
data, FALSE);
|
||||
data, false);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -2675,7 +2675,7 @@ s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw)
|
||||
/**
|
||||
* ixgbe_set_copper_phy_power - Control power for copper phy
|
||||
* @hw: pointer to hardware structure
|
||||
* @on: TRUE for on, FALSE for off
|
||||
* @on: true for on, false for off
|
||||
*/
|
||||
s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on)
|
||||
{
|
||||
|
@ -146,7 +146,7 @@ static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
|
||||
s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
|
||||
{
|
||||
/* Clear adapter stopped flag */
|
||||
hw->adapter_stopped = FALSE;
|
||||
hw->adapter_stopped = false;
|
||||
|
||||
return IXGBE_SUCCESS;
|
||||
}
|
||||
@ -257,7 +257,7 @@ s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
|
||||
* Set the adapter_stopped flag so other driver functions stop touching
|
||||
* the hardware
|
||||
*/
|
||||
hw->adapter_stopped = TRUE;
|
||||
hw->adapter_stopped = true;
|
||||
|
||||
/* Clear interrupt mask to stop from interrupts being generated */
|
||||
IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
|
||||
@ -461,7 +461,7 @@ s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
|
||||
* @hw: pointer to the HW structure
|
||||
* @vlan: 12 bit VLAN ID
|
||||
* @vind: unused by VF drivers
|
||||
* @vlan_on: if TRUE then set bit, else clear bit
|
||||
* @vlan_on: if true then set bit, else clear bit
|
||||
* @vlvf_bypass: boolean flag indicating updating default pool is okay
|
||||
*
|
||||
* Turn on/off specified VLAN in the VLAN filter table.
|
||||
@ -475,7 +475,7 @@ s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
|
||||
|
||||
msgbuf[0] = IXGBE_VF_SET_VLAN;
|
||||
msgbuf[1] = vlan;
|
||||
/* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
|
||||
/* Setting the 8 bit field MSG INFO to true indicates "add" */
|
||||
msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
|
||||
|
||||
ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
|
||||
@ -558,7 +558,7 @@ s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
|
||||
* ixgbe_setup_mac_link_vf - Setup MAC link settings
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
*
|
||||
* Set the link speed in the AUTOC register and restarts link.
|
||||
**/
|
||||
@ -573,8 +573,8 @@ s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
|
||||
* ixgbe_check_mac_link_vf - Get link/speed status
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: pointer to link speed
|
||||
* @link_up: TRUE is link is up, FALSE otherwise
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @link_up: true is link is up, false otherwise
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
*
|
||||
* Reads the links register to determine if link is up and the current speed
|
||||
**/
|
||||
@ -590,7 +590,7 @@ s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
|
||||
|
||||
/* If we were hit with a reset drop the link */
|
||||
if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
|
||||
mac->get_link_status = TRUE;
|
||||
mac->get_link_status = true;
|
||||
|
||||
if (!mac->get_link_status)
|
||||
goto out;
|
||||
@ -665,7 +665,7 @@ s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
|
||||
/* if we passed all the tests above then the link is up and we no
|
||||
* longer need to check for link
|
||||
*/
|
||||
mac->get_link_status = FALSE;
|
||||
mac->get_link_status = false;
|
||||
|
||||
out:
|
||||
*link_up = !mac->get_link_status;
|
||||
|
@ -164,7 +164,7 @@ s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw)
|
||||
* ixgbe_get_link_capabilities_X540 - Determines link capabilities
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: pointer to link speed
|
||||
* @autoneg: TRUE when autoneg or autotry is enabled
|
||||
* @autoneg: true when autoneg or autotry is enabled
|
||||
*
|
||||
* Determines the link capabilities by reading the AUTOC register.
|
||||
**/
|
||||
@ -193,7 +193,7 @@ enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw)
|
||||
* ixgbe_setup_mac_link_X540 - Sets the auto advertised capabilities
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
**/
|
||||
s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw,
|
||||
ixgbe_link_speed speed,
|
||||
@ -1018,8 +1018,8 @@ s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)
|
||||
* register to work. Force link and speed in the MAC if link is down.
|
||||
* This will be reversed when we stop the blinking.
|
||||
*/
|
||||
hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);
|
||||
if (link_up == FALSE) {
|
||||
hw->mac.ops.check_link(hw, &speed, &link_up, false);
|
||||
if (link_up == false) {
|
||||
macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);
|
||||
macc_reg |= IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS;
|
||||
IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);
|
||||
|
@ -422,7 +422,7 @@ s32 ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity,
|
||||
rc = ixgbe_host_interface_command(hw, (u32 *)&hic.cmd,
|
||||
sizeof(hic.cmd),
|
||||
IXGBE_HI_COMMAND_TIMEOUT,
|
||||
TRUE);
|
||||
true);
|
||||
if (rc != IXGBE_SUCCESS)
|
||||
return rc;
|
||||
if (hic.rsp.hdr.cmd_or_resp.ret_status ==
|
||||
@ -545,7 +545,7 @@ static s32 ixgbe_write_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr,
|
||||
static s32 ixgbe_read_i2c_combined_generic(struct ixgbe_hw *hw, u8 addr,
|
||||
u16 reg, u16 *val)
|
||||
{
|
||||
return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, TRUE);
|
||||
return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, true);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -561,7 +561,7 @@ static s32
|
||||
ixgbe_read_i2c_combined_generic_unlocked(struct ixgbe_hw *hw, u8 addr,
|
||||
u16 reg, u16 *val)
|
||||
{
|
||||
return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, FALSE);
|
||||
return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, false);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -576,7 +576,7 @@ ixgbe_read_i2c_combined_generic_unlocked(struct ixgbe_hw *hw, u8 addr,
|
||||
static s32 ixgbe_write_i2c_combined_generic(struct ixgbe_hw *hw,
|
||||
u8 addr, u16 reg, u16 val)
|
||||
{
|
||||
return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, TRUE);
|
||||
return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, true);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -592,7 +592,7 @@ static s32
|
||||
ixgbe_write_i2c_combined_generic_unlocked(struct ixgbe_hw *hw,
|
||||
u8 addr, u16 reg, u16 val)
|
||||
{
|
||||
return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, FALSE);
|
||||
return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, false);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -1236,7 +1236,7 @@ s32 ixgbe_get_phy_token(struct ixgbe_hw *hw)
|
||||
status = ixgbe_host_interface_command(hw, (u32 *)&token_cmd,
|
||||
sizeof(token_cmd),
|
||||
IXGBE_HI_COMMAND_TIMEOUT,
|
||||
TRUE);
|
||||
true);
|
||||
if (status) {
|
||||
DEBUGOUT1("Issuing host interface command failed with Status = %d\n",
|
||||
status);
|
||||
@ -1274,7 +1274,7 @@ s32 ixgbe_put_phy_token(struct ixgbe_hw *hw)
|
||||
status = ixgbe_host_interface_command(hw, (u32 *)&token_cmd,
|
||||
sizeof(token_cmd),
|
||||
IXGBE_HI_COMMAND_TIMEOUT,
|
||||
TRUE);
|
||||
true);
|
||||
if (status)
|
||||
return status;
|
||||
if (token_cmd.hdr.cmd_or_resp.ret_status == FW_PHY_TOKEN_OK)
|
||||
@ -1310,7 +1310,7 @@ s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
|
||||
|
||||
status = ixgbe_host_interface_command(hw, (u32 *)&write_cmd,
|
||||
sizeof(write_cmd),
|
||||
IXGBE_HI_COMMAND_TIMEOUT, FALSE);
|
||||
IXGBE_HI_COMMAND_TIMEOUT, false);
|
||||
|
||||
return status;
|
||||
}
|
||||
@ -1342,7 +1342,7 @@ s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
|
||||
|
||||
status = ixgbe_host_interface_command(hw, (u32 *)&hic.cmd,
|
||||
sizeof(hic.cmd),
|
||||
IXGBE_HI_COMMAND_TIMEOUT, TRUE);
|
||||
IXGBE_HI_COMMAND_TIMEOUT, true);
|
||||
|
||||
/* Extract the register value from the response. */
|
||||
*data = IXGBE_BE32_TO_CPU(hic.rsp.read_data);
|
||||
@ -1545,7 +1545,7 @@ enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw)
|
||||
/**
|
||||
* ixgbe_supported_sfp_modules_X550em - Check if SFP module type is supported
|
||||
* @hw: pointer to hardware structure
|
||||
* @linear: TRUE if SFP module is linear
|
||||
* @linear: true if SFP module is linear
|
||||
*/
|
||||
static s32 ixgbe_supported_sfp_modules_X550em(struct ixgbe_hw *hw, bool *linear)
|
||||
{
|
||||
@ -1556,7 +1556,7 @@ static s32 ixgbe_supported_sfp_modules_X550em(struct ixgbe_hw *hw, bool *linear)
|
||||
return IXGBE_ERR_SFP_NOT_PRESENT;
|
||||
case ixgbe_sfp_type_da_cu_core0:
|
||||
case ixgbe_sfp_type_da_cu_core1:
|
||||
*linear = TRUE;
|
||||
*linear = true;
|
||||
break;
|
||||
case ixgbe_sfp_type_srlr_core0:
|
||||
case ixgbe_sfp_type_srlr_core1:
|
||||
@ -1566,7 +1566,7 @@ static s32 ixgbe_supported_sfp_modules_X550em(struct ixgbe_hw *hw, bool *linear)
|
||||
case ixgbe_sfp_type_1g_sx_core1:
|
||||
case ixgbe_sfp_type_1g_lx_core0:
|
||||
case ixgbe_sfp_type_1g_lx_core1:
|
||||
*linear = FALSE;
|
||||
*linear = false;
|
||||
break;
|
||||
case ixgbe_sfp_type_unknown:
|
||||
case ixgbe_sfp_type_1g_cu_core0:
|
||||
@ -1676,7 +1676,7 @@ static s32 ixgbe_restart_an_internal_phy_x550em(struct ixgbe_hw *hw)
|
||||
* ixgbe_setup_sgmii - Set up link for sgmii
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait: true when waiting for completion is needed
|
||||
*/
|
||||
static s32 ixgbe_setup_sgmii(struct ixgbe_hw *hw, ixgbe_link_speed speed,
|
||||
bool autoneg_wait)
|
||||
@ -1745,7 +1745,7 @@ static s32 ixgbe_setup_sgmii(struct ixgbe_hw *hw, ixgbe_link_speed speed,
|
||||
* ixgbe_setup_sgmii_fw - Set up link for internal PHY SGMII auto-negotiation
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait: true when waiting for completion is needed
|
||||
*/
|
||||
static s32 ixgbe_setup_sgmii_fw(struct ixgbe_hw *hw, ixgbe_link_speed speed,
|
||||
bool autoneg_wait)
|
||||
@ -1876,7 +1876,7 @@ void ixgbe_init_mac_link_ops_X550em(struct ixgbe_hw *hw)
|
||||
* ixgbe_get_link_capabilities_x550em - Determines link capabilities
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: pointer to link speed
|
||||
* @autoneg: TRUE when autoneg or autotry is enabled
|
||||
* @autoneg: true when autoneg or autotry is enabled
|
||||
*/
|
||||
s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,
|
||||
ixgbe_link_speed *speed,
|
||||
@ -1886,7 +1886,7 @@ s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,
|
||||
|
||||
|
||||
if (hw->phy.type == ixgbe_phy_fw) {
|
||||
*autoneg = TRUE;
|
||||
*autoneg = true;
|
||||
*speed = hw->phy.speeds_supported;
|
||||
return 0;
|
||||
}
|
||||
@ -1895,7 +1895,7 @@ s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,
|
||||
if (hw->phy.media_type == ixgbe_media_type_fiber) {
|
||||
|
||||
/* CS4227 SFP must not enable auto-negotiation */
|
||||
*autoneg = FALSE;
|
||||
*autoneg = false;
|
||||
|
||||
/* Check if 1G SFP module. */
|
||||
if (hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 ||
|
||||
@ -1966,7 +1966,7 @@ static s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc)
|
||||
u32 status;
|
||||
u16 reg;
|
||||
|
||||
*lsc = FALSE;
|
||||
*lsc = false;
|
||||
|
||||
/* Vendor alarm triggered */
|
||||
status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,
|
||||
@ -1998,7 +1998,7 @@ static s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc)
|
||||
/* If high temperature failure, then return over temp error and exit */
|
||||
if (reg & IXGBE_MDIO_GLOBAL_ALM_1_HI_TMP_FAIL) {
|
||||
/* power down the PHY in case the PHY FW didn't already */
|
||||
ixgbe_set_copper_phy_power(hw, FALSE);
|
||||
ixgbe_set_copper_phy_power(hw, false);
|
||||
return IXGBE_ERR_OVERTEMP;
|
||||
} else if (reg & IXGBE_MDIO_GLOBAL_ALM_1_DEV_FAULT) {
|
||||
/* device fault alarm triggered */
|
||||
@ -2012,7 +2012,7 @@ static s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc)
|
||||
/* if device fault was due to high temp alarm handle and exit */
|
||||
if (reg == IXGBE_MDIO_GLOBAL_FAULT_MSG_HI_TMP) {
|
||||
/* power down the PHY in case the PHY FW didn't */
|
||||
ixgbe_set_copper_phy_power(hw, FALSE);
|
||||
ixgbe_set_copper_phy_power(hw, false);
|
||||
return IXGBE_ERR_OVERTEMP;
|
||||
}
|
||||
}
|
||||
@ -2034,7 +2034,7 @@ static s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc)
|
||||
|
||||
/* Indicate LSC */
|
||||
if (reg & IXGBE_MDIO_AUTO_NEG_VEN_LSC)
|
||||
*lsc = TRUE;
|
||||
*lsc = true;
|
||||
|
||||
return IXGBE_SUCCESS;
|
||||
}
|
||||
@ -2434,7 +2434,7 @@ s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
|
||||
s32 status;
|
||||
u32 ctrl = 0;
|
||||
u32 i;
|
||||
bool link_up = FALSE;
|
||||
bool link_up = false;
|
||||
u32 swfw_mask = hw->phy.phy_semaphore_mask;
|
||||
|
||||
DEBUGFUNC("ixgbe_reset_hw_X550em");
|
||||
@ -2476,7 +2476,7 @@ s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
|
||||
/* Setup SFP module if there is one present. */
|
||||
if (hw->phy.sfp_setup_needed) {
|
||||
status = hw->mac.ops.setup_sfp(hw);
|
||||
hw->phy.sfp_setup_needed = FALSE;
|
||||
hw->phy.sfp_setup_needed = false;
|
||||
}
|
||||
|
||||
if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)
|
||||
@ -2496,7 +2496,7 @@ s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
|
||||
*/
|
||||
ctrl = IXGBE_CTRL_LNK_RST;
|
||||
if (!hw->force_full_reset) {
|
||||
hw->mac.ops.check_link(hw, &link_speed, &link_up, FALSE);
|
||||
hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
|
||||
if (link_up)
|
||||
ctrl = IXGBE_CTRL_RST;
|
||||
}
|
||||
@ -2630,7 +2630,7 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
|
||||
{
|
||||
s32 ret_val;
|
||||
u16 reg_slice, reg_val;
|
||||
bool setup_linear = FALSE;
|
||||
bool setup_linear = false;
|
||||
UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
|
||||
|
||||
/* Check if SFP module is supported and linear */
|
||||
@ -2724,7 +2724,7 @@ s32 ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw,
|
||||
{
|
||||
s32 ret_val;
|
||||
u16 reg_phy_ext;
|
||||
bool setup_linear = FALSE;
|
||||
bool setup_linear = false;
|
||||
u32 reg_slice, reg_phy_int, slice_offset;
|
||||
|
||||
UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
|
||||
@ -2956,7 +2956,7 @@ static s32 ixgbe_ext_phy_t_x550em_get_link(struct ixgbe_hw *hw, bool *link_up)
|
||||
u32 ret;
|
||||
u16 autoneg_status;
|
||||
|
||||
*link_up = FALSE;
|
||||
*link_up = false;
|
||||
|
||||
/* read this twice back to back to indicate current status */
|
||||
ret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,
|
||||
@ -3260,7 +3260,7 @@ s32 ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset,
|
||||
|
||||
status = ixgbe_host_interface_command(hw, (u32 *)&buffer,
|
||||
sizeof(buffer),
|
||||
IXGBE_HI_COMMAND_TIMEOUT, TRUE);
|
||||
IXGBE_HI_COMMAND_TIMEOUT, true);
|
||||
if (status != IXGBE_SUCCESS) {
|
||||
DEBUGOUT2("for offset %04x failed with status %d\n",
|
||||
offset, status);
|
||||
@ -3623,7 +3623,7 @@ s32 ixgbe_update_flash_X550(struct ixgbe_hw *hw)
|
||||
|
||||
status = ixgbe_host_interface_command(hw, (u32 *)&buffer,
|
||||
sizeof(buffer),
|
||||
IXGBE_HI_COMMAND_TIMEOUT, FALSE);
|
||||
IXGBE_HI_COMMAND_TIMEOUT, false);
|
||||
|
||||
return status;
|
||||
}
|
||||
@ -3740,9 +3740,9 @@ void ixgbe_disable_rx_x550(struct ixgbe_hw *hw)
|
||||
if (pfdtxgswc & IXGBE_PFDTXGSWC_VT_LBEN) {
|
||||
pfdtxgswc &= ~IXGBE_PFDTXGSWC_VT_LBEN;
|
||||
IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc);
|
||||
hw->mac.set_lben = TRUE;
|
||||
hw->mac.set_lben = true;
|
||||
} else {
|
||||
hw->mac.set_lben = FALSE;
|
||||
hw->mac.set_lben = false;
|
||||
}
|
||||
|
||||
fw_cmd.hdr.cmd = FW_DISABLE_RXEN_CMD;
|
||||
@ -3752,7 +3752,7 @@ void ixgbe_disable_rx_x550(struct ixgbe_hw *hw)
|
||||
|
||||
status = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
|
||||
sizeof(struct ixgbe_hic_disable_rxen),
|
||||
IXGBE_HI_COMMAND_TIMEOUT, TRUE);
|
||||
IXGBE_HI_COMMAND_TIMEOUT, true);
|
||||
|
||||
/* If we fail - disable RX using register write */
|
||||
if (status) {
|
||||
@ -3805,7 +3805,7 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
|
||||
*/
|
||||
if (!link_up || !(hw->eeprom.ctrl_word_3 & NVM_INIT_CTRL_3_LPLU) ||
|
||||
!(hw->wol_enabled || ixgbe_mng_present(hw)))
|
||||
return ixgbe_set_copper_phy_power(hw, FALSE);
|
||||
return ixgbe_set_copper_phy_power(hw, false);
|
||||
|
||||
/* Determine LCD */
|
||||
status = ixgbe_get_lcd_t_x550em(hw, &lcd_speed);
|
||||
@ -3815,7 +3815,7 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
|
||||
|
||||
/* If no valid LCD link speed, then force link down and exit. */
|
||||
if (lcd_speed == IXGBE_LINK_SPEED_UNKNOWN)
|
||||
return ixgbe_set_copper_phy_power(hw, FALSE);
|
||||
return ixgbe_set_copper_phy_power(hw, false);
|
||||
|
||||
status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_STAT,
|
||||
IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
|
||||
@ -3827,7 +3827,7 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
|
||||
/* If no link now, speed is invalid so take link down */
|
||||
status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);
|
||||
if (status != IXGBE_SUCCESS)
|
||||
return ixgbe_set_copper_phy_power(hw, FALSE);
|
||||
return ixgbe_set_copper_phy_power(hw, false);
|
||||
|
||||
/* clear everything but the speed bits */
|
||||
speed &= IXGBE_MDIO_AUTO_NEG_VEN_STAT_SPEED_MASK;
|
||||
@ -3865,7 +3865,7 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
|
||||
save_autoneg = hw->phy.autoneg_advertised;
|
||||
|
||||
/* Setup link at least common link speed */
|
||||
status = hw->mac.ops.setup_link(hw, lcd_speed, FALSE);
|
||||
status = hw->mac.ops.setup_link(hw, lcd_speed, false);
|
||||
|
||||
/* restore autoneg from before setting lplu speed */
|
||||
hw->phy.autoneg_advertised = save_autoneg;
|
||||
@ -3988,10 +3988,10 @@ s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw)
|
||||
IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);
|
||||
|
||||
/* This device does not fully support AN. */
|
||||
hw->fc.disable_fc_autoneg = TRUE;
|
||||
hw->fc.disable_fc_autoneg = true;
|
||||
break;
|
||||
case IXGBE_DEV_ID_X550EM_X_XFI:
|
||||
hw->fc.disable_fc_autoneg = TRUE;
|
||||
hw->fc.disable_fc_autoneg = true;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@ -4025,7 +4025,7 @@ void ixgbe_fc_autoneg_backplane_x550em_a(struct ixgbe_hw *hw)
|
||||
goto out;
|
||||
}
|
||||
|
||||
hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);
|
||||
hw->mac.ops.check_link(hw, &speed, &link_up, false);
|
||||
if (!link_up) {
|
||||
ERROR_REPORT1(IXGBE_ERROR_SOFTWARE, "The link is down");
|
||||
goto out;
|
||||
@ -4072,9 +4072,9 @@ void ixgbe_fc_autoneg_backplane_x550em_a(struct ixgbe_hw *hw)
|
||||
|
||||
out:
|
||||
if (status == IXGBE_SUCCESS) {
|
||||
hw->fc.fc_was_autonegged = TRUE;
|
||||
hw->fc.fc_was_autonegged = true;
|
||||
} else {
|
||||
hw->fc.fc_was_autonegged = FALSE;
|
||||
hw->fc.fc_was_autonegged = false;
|
||||
hw->fc.current_mode = hw->fc.requested_mode;
|
||||
}
|
||||
}
|
||||
@ -4086,7 +4086,7 @@ void ixgbe_fc_autoneg_backplane_x550em_a(struct ixgbe_hw *hw)
|
||||
**/
|
||||
void ixgbe_fc_autoneg_fiber_x550em_a(struct ixgbe_hw *hw)
|
||||
{
|
||||
hw->fc.fc_was_autonegged = FALSE;
|
||||
hw->fc.fc_was_autonegged = false;
|
||||
hw->fc.current_mode = hw->fc.requested_mode;
|
||||
}
|
||||
|
||||
@ -4114,7 +4114,7 @@ void ixgbe_fc_autoneg_sgmii_x550em_a(struct ixgbe_hw *hw)
|
||||
goto out;
|
||||
}
|
||||
|
||||
hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);
|
||||
hw->mac.ops.check_link(hw, &speed, &link_up, false);
|
||||
if (!link_up) {
|
||||
ERROR_REPORT1(IXGBE_ERROR_SOFTWARE, "The link is down");
|
||||
goto out;
|
||||
@ -4138,9 +4138,9 @@ void ixgbe_fc_autoneg_sgmii_x550em_a(struct ixgbe_hw *hw)
|
||||
|
||||
out:
|
||||
if (status == IXGBE_SUCCESS) {
|
||||
hw->fc.fc_was_autonegged = TRUE;
|
||||
hw->fc.fc_was_autonegged = true;
|
||||
} else {
|
||||
hw->fc.fc_was_autonegged = FALSE;
|
||||
hw->fc.fc_was_autonegged = false;
|
||||
hw->fc.current_mode = hw->fc.requested_mode;
|
||||
}
|
||||
}
|
||||
@ -4452,7 +4452,7 @@ s32 ixgbe_handle_lasi_ext_t_x550em(struct ixgbe_hw *hw)
|
||||
* ixgbe_setup_mac_link_t_X550em - Sets the auto advertised link speed
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: new link speed
|
||||
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
|
||||
* @autoneg_wait_to_complete: true when waiting for completion is needed
|
||||
*
|
||||
* Setup internal/external PHY link speed based on link speed, then set
|
||||
* external PHY auto advertised link speed.
|
||||
@ -4508,7 +4508,7 @@ s32 ixgbe_setup_mac_link_t_X550em(struct ixgbe_hw *hw,
|
||||
* ixgbe_check_link_t_X550em - Determine link and speed status
|
||||
* @hw: pointer to hardware structure
|
||||
* @speed: pointer to link speed
|
||||
* @link_up: TRUE when link is up
|
||||
* @link_up: true when link is up
|
||||
* @link_up_wait_to_complete: bool used to wait for link up or not
|
||||
*
|
||||
* Check that both the MAC and X557 external PHY have link.
|
||||
@ -4545,7 +4545,7 @@ s32 ixgbe_check_link_t_X550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
|
||||
|
||||
/* If external PHY link is not up, then indicate link not up */
|
||||
if (!(autoneg_status & IXGBE_MDIO_AUTO_NEG_LINK_STATUS))
|
||||
*link_up = FALSE;
|
||||
*link_up = false;
|
||||
|
||||
return IXGBE_SUCCESS;
|
||||
}
|
||||
@ -4662,7 +4662,7 @@ s32 ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min,
|
||||
ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
|
||||
sizeof(fw_cmd),
|
||||
IXGBE_HI_COMMAND_TIMEOUT,
|
||||
TRUE);
|
||||
true);
|
||||
if (ret_val != IXGBE_SUCCESS)
|
||||
continue;
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user