ARM: SEV/WFE instructions are implemented starting from ARMv6K,

use it directly.

MFC after: 1 week

sys/arm/allwinner/aw_mp.c

@@ -193,7 +193,8 @@ aw_mp_start_ap(platform_t plat)
 		val |= (1 << i);
 	bus_space_write_4(fdtbus_bs_tag, cpucfg, CPUCFG_DBGCTL1, val);
 
-	armv7_sev();
+	dsb();
+	sev();
 	bus_space_unmap(fdtbus_bs_tag, cpucfg, CPUCFG_SIZE);
 	if (soc_family != ALLWINNERSOC_SUN7I)
 		bus_space_unmap(fdtbus_bs_tag, prcm, PRCM_SIZE);
@@ -279,7 +280,8 @@ a83t_mp_start_ap(platform_t plat)
 		panic("Couldn't map the PRCM\n");
 
 	aw_mc_mp_start_ap(cpuscfg, cpuxcfg, prcm);
-	armv7_sev();
+	dsb();
+	sev();
 	bus_space_unmap(fdtbus_bs_tag, cpuxcfg, CPUXCFG_SIZE);
 	bus_space_unmap(fdtbus_bs_tag, cpuscfg, CPUCFG_SIZE);
 	bus_space_unmap(fdtbus_bs_tag, prcm, PRCM_SIZE);

sys/arm/altera/socfpga/socfpga_mp.c

@@ -151,7 +151,8 @@ platform_mp_start_ap(void)
 	/* Put CPU1 out from reset */
 	bus_space_write_4(fdtbus_bs_tag, rst, MPUMODRST, 0);
 
-	armv7_sev();
+	dsb();
+	sev();
 
 	bus_space_unmap(fdtbus_bs_tag, scu, SCU_SIZE);
 	bus_space_unmap(fdtbus_bs_tag, rst, RSTMGR_SIZE);

sys/arm/amlogic/aml8726/aml8726_mp.c

@@ -487,7 +487,8 @@ platform_mp_start_ap(void)
 	CPUCONF_BARRIER(AML_CPUCONF_CONTROL_REG);
 
 	/* Wakeup the now enabled APs */
-	armv7_sev();
+	dsb();
+	sev();
 
 	/*
 	 * Free the resources which are not needed after startup.

sys/arm/arm/cpufunc_asm_armv7.S

@@ -165,10 +165,3 @@ ENTRY(armv7_drain_writebuf)
 	dsb
 	RET
 END(armv7_drain_writebuf)
-
-ENTRY(armv7_sev)
-	dsb
-	sev
-	nop
-	RET
-END(armv7_sev)

sys/arm/arm/mp_machdep.c

@@ -467,9 +467,8 @@ release_aps(void *dummy __unused)
 #endif
 	atomic_store_rel_int(&aps_ready, 1);
 	/* Wake the other threads up */
-#if __ARM_ARCH >= 7
-	armv7_sev();
-#endif
+	dsb();
+	sev();
 
 	printf("Release APs\n");
 

sys/arm/broadcom/bcm2835/bcm2836_mp.c

@@ -135,7 +135,8 @@ bcm2836_mp_start_ap(platform_t plat)
 		} while (1);
 
 		/* dsb and sev */
-		armv7_sev();
+		dsb();
+		sev();
 
 		/* recode AP in CPU map */
 		CPU_SET(i, &all_cpus);

sys/arm/freescale/imx/imx6_mp.c

@@ -150,7 +150,8 @@ platform_mp_start_ap(void)
 	}
 	bus_space_write_4(fdtbus_bs_tag, src, SRC_CONTROL_REG, val);
 
-	armv7_sev();
+	dsb();
+	sev();
 
 	bus_space_unmap(fdtbus_bs_tag, scu, SCU_SIZE);
 	bus_space_unmap(fdtbus_bs_tag, src, SRC_SIZE);

sys/arm/include/cpu-v6.h

@@ -56,6 +56,8 @@ extern uint32_t	ccnt_hi[MAXCPU];
 extern int pmu_attched;
 #endif /* DEV_PMU */
 
+#define sev()  __asm __volatile("sev" : : : "memory")
+#define wfe()  __asm __volatile("wfe" : : : "memory")
 
 /*
  * Macros to generate CP15 (system control processor) read/write functions.

sys/arm/include/cpufunc.h

@@ -284,7 +284,6 @@ void	armv7_idcache_wbinv_all		(void);
 void	armv7_cpu_sleep			(int);
 void	armv7_setup			(void);
 void	armv7_drain_writebuf		(void);
-void	armv7_sev			(void);
 
 void	armadaxp_idcache_wbinv_all	(void);
 

sys/arm/mv/armada38x/pmsu.c

@@ -146,7 +146,8 @@ pmsu_boot_secondary_cpu(void)
 	    pmap_kextract((vm_offset_t)mpentry));
 
 	dcache_wbinv_poc_all();
-	armv7_sev();
+	dsb();
+	sev();
 
 	bus_space_unmap(fdtbus_bs_tag, vaddr, MV_PMSU_REGS_LEN);
 

sys/arm/nvidia/tegra124/tegra124_mp.c

@@ -121,7 +121,8 @@ tegra124_mp_start_ap(platform_t plat)
 		}
 
 	}
-	armv7_sev();
+	dsb();
+	sev();
 	bus_space_unmap(fdtbus_bs_tag, pmc, PMC_SIZE);
 	bus_space_unmap(fdtbus_bs_tag, exvec, TEGRA_EXCEPTION_VECTORS_SIZE);
 }

sys/arm/rockchip/rk30xx_mp.c

@@ -163,7 +163,8 @@ platform_mp_start_ap(void)
 		val &= ~(1 << i);
 	bus_space_write_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON, val);
 
-	armv7_sev();
+	dsb();
+	sev();
 
 	bus_space_unmap(fdtbus_bs_tag, scu, SCU_SIZE);
 	bus_space_unmap(fdtbus_bs_tag, imem, IMEM_SIZE);

sys/arm/samsung/exynos/exynos5_mp.c

@@ -124,7 +124,8 @@ platform_mp_start_ap(void)
 
 	dcache_wbinv_poc_all();
 
-	armv7_sev();
+	dsb();
+	sev();
 	bus_space_unmap(fdtbus_bs_tag, sysram, 0x100);
 	bus_space_unmap(fdtbus_bs_tag, pmu, 0x20000);
 }

sys/arm/ti/omap4/omap4_mp.c

@@ -64,6 +64,7 @@ platform_mp_start_ap(void)
 
 	ti_smc0(0x200, 0xfffffdff, MODIFY_AUX_CORE_0);
 	ti_smc0(pmap_kextract((vm_offset_t)mpentry), 0, WRITE_AUX_CORE_1);
-	armv7_sev();
+	dsb();
+	sev();
 	bus_space_unmap(fdtbus_bs_tag, scu_addr, 0x1000);
 }

sys/arm/xilinx/zy7_mp.c

@@ -94,5 +94,6 @@ platform_mp_start_ap(void)
 	dcache_wbinv_poc_all();
 
 	/* Wake up CPU1. */
-	armv7_sev();
+	dsb();
+	sev();
 }