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After discussion with Felix Fietkau (nbd) about the ath9k Merlin LNA bit

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settings, it seems that our defines are backwards and don't match what
is in the EEPROM documentation or internal driver.

The ath9k code used to have a bitfield here, rather than a uint8_t, and
there were #defines used to swap the order based on the endian of the
platform - this wasn't because of nybble or bit ordering of the
underlying host but because of what the compiler was doing.

This may be the reason for the backwards field numbers, as ath9k had
similar issues.
This commit is contained in:
Adrian Chadd 2011-03-25 00:45:24 +00:00
parent 423c974c28
commit 7dd51df82f
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=219980
1 changed files with 8 additions and 8 deletions
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16
sys/dev/ath/ath_hal/ah_eeprom_v14.h
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@ -217,14 +217,14 @@ typedef struct ModalEepHeader {
uint8_t ob_ch1; // 1 -> ob and db become chain specific from AR9280
uint8_t db_ch1; // 1
uint8_t flagBits; // 1
#define AR5416_EEP_FLAG_USEANT1 0x01 /* +1 configured antenna */
#define AR5416_EEP_FLAG_FORCEXPAON 0x02 /* force XPA bit for 5G */
#define AR5416_EEP_FLAG_LOCALBIAS 0x04 /* enable local bias */
#define AR5416_EEP_FLAG_FEMBANDSELECT 0x08 /* FEM band select used */
#define AR5416_EEP_FLAG_XLNABUFIN 0x10
#define AR5416_EEP_FLAG_XLNAISEL 0x60
#define AR5416_EEP_FLAG_XLNAISEL_S 5
#define AR5416_EEP_FLAG_XLNABUFMODE 0x80
#define AR5416_EEP_FLAG_USEANT1 0x80 /* +1 configured antenna */
#define AR5416_EEP_FLAG_FORCEXPAON 0x40 /* force XPA bit for 5G */
#define AR5416_EEP_FLAG_LOCALBIAS 0x20 /* enable local bias */
#define AR5416_EEP_FLAG_FEMBANDSELECT 0x10 /* FEM band select used */
#define AR5416_EEP_FLAG_XLNABUFIN 0x08
#define AR5416_EEP_FLAG_XLNAISEL1 0x04
#define AR5416_EEP_FLAG_XLNAISEL2 0x02
#define AR5416_EEP_FLAG_XLNABUFMODE 0x01
uint8_t miscBits; // [0..1]: bb_tx_dac_scale_cck
uint16_t xpaBiasLvlFreq[3]; // 3
uint8_t futureModal[6]; // 6