- Fix some style bugs and remove another banal comment missed in
rev. 1.46. - Move the KASSERT on gem_add_rxbuf() to the right spot and add an equivalent one to gem_disable_tx().
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d8ef604544
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=176996
@ -327,11 +327,11 @@ gem_attach(struct gem_softc *sc)
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* allocated.
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*/
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/* Get RX FIFO size */
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/* Get RX FIFO size. */
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sc->sc_rxfifosize = 64 *
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bus_read_4(sc->sc_res[0], GEM_RX_FIFO_SIZE);
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/* Get TX FIFO size */
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/* Get TX FIFO size. */
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v = bus_read_4(sc->sc_res[0], GEM_TX_FIFO_SIZE);
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device_printf(sc->sc_dev, "%ukB RX FIFO, %ukB TX FIFO\n",
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sc->sc_rxfifosize / 1024, v / 16);
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@ -598,7 +598,7 @@ gem_tick(void *arg)
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bus_read_4(sc->sc_res[0], GEM_MAC_LATE_COLL_CNT);
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/*
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* then clear the hardware counters.
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* Then clear the hardware counters.
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*/
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bus_write_4(sc->sc_res[0], GEM_MAC_NORM_COLL_CNT, 0);
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bus_write_4(sc->sc_res[0], GEM_MAC_FIRST_COLL_CNT, 0);
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@ -724,7 +724,7 @@ gem_reset_rx(struct gem_softc *sc)
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if (!gem_bitwait(sc, GEM_RX_CONFIG, GEM_RX_CONFIG_RXDMA_EN, 0))
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device_printf(sc->sc_dev, "cannot disable RX DMA\n");
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/* Finally, reset the ERX */
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/* Finally, reset the ERX. */
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bus_write_4(sc->sc_res[0], GEM_RESET, GEM_RESET_RX);
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bus_barrier(sc->sc_res[0], GEM_RESET, 4, BUS_SPACE_BARRIER_WRITE);
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if (!gem_bitwait(sc, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX, 0)) {
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@ -794,7 +794,7 @@ gem_reset_tx(struct gem_softc *sc)
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if (!gem_bitwait(sc, GEM_TX_CONFIG, GEM_TX_CONFIG_TXDMA_EN, 0))
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device_printf(sc->sc_dev, "cannot disable TX DMA\n");
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/* Finally, reset the ETX */
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/* Finally, reset the ETX. */
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bus_write_4(sc->sc_res[0], GEM_RESET, GEM_RESET_TX);
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bus_barrier(sc->sc_res[0], GEM_RESET, 4, BUS_SPACE_BARRIER_WRITE);
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if (!gem_bitwait(sc, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX, 0)) {
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@ -817,9 +817,6 @@ gem_disable_rx(struct gem_softc *sc)
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return (gem_bitwait(sc, GEM_MAC_RX_CONFIG, GEM_MAC_RX_ENABLE, 0));
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}
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/*
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* disable transmitter.
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*/
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static int
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gem_disable_tx(struct gem_softc *sc)
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{
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@ -1090,6 +1087,9 @@ gem_load_txmbuf(struct gem_softc *sc, struct mbuf **m_head)
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}
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} else if (error != 0)
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return (error);
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/* If nsegs is wrong then the stack is corrupt. */
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KASSERT(nsegs <= GEM_NTXSEGS,
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("%s: too many DMA segments (%d)", __func__, nsegs));
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if (nsegs == 0) {
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m_freem(*m_head);
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*m_head = NULL;
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@ -1602,7 +1602,6 @@ gem_add_rxbuf(struct gem_softc *sc, int idx)
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error = bus_dmamap_load_mbuf_sg(sc->sc_rdmatag, rxs->rxs_dmamap,
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m, segs, &nsegs, BUS_DMA_NOWAIT);
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KASSERT(nsegs == 1, ("Too many segments returned!"));
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if (error != 0) {
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device_printf(sc->sc_dev,
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"cannot load RS DMA map %d, error = %d\n", idx, error);
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@ -1610,6 +1609,8 @@ gem_add_rxbuf(struct gem_softc *sc, int idx)
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return (error);
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}
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/* If nsegs is wrong then the stack is corrupt. */
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KASSERT(nsegs == 1,
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("%s: too many DMA segments (%d)", __func__, nsegs));
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rxs->rxs_mbuf = m;
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rxs->rxs_paddr = segs[0].ds_addr;
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@ -1752,7 +1753,7 @@ static void
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gem_mifinit(struct gem_softc *sc)
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{
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/* Configure the MIF in frame mode */
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/* Configure the MIF in frame mode. */
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bus_write_4(sc->sc_res[0], GEM_MIF_CONFIG, bus_read_4(sc->sc_res[0],
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GEM_MIF_CONFIG) & ~GEM_MIF_CONFIG_BB_ENA);
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}
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