From 809923ca0223de4c76830cc064655b8fac7bb0fd Mon Sep 17 00:00:00 2001 From: Justin Hibbits Date: Mon, 11 May 2015 20:58:05 +0000 Subject: [PATCH] Add a PCI bridge for the Freescale PCIe Root Complex Summary: The Freescale PCIe Root Complex shows up as a Processor class device, PowerPC subclass, so the generic PCI code ignores it for a bridge. This adds support for it. As part of this, update the Freescale PCI hostbridge driver, to allow probing beyond the root complex, instead of only allowing "proper" PCI-PCI bridges. Reviewers: #powerpc, marcel, nwhitehorn Reviewed By: nwhitehorn Subscribers: imp Differential Revision: https://reviews.freebsd.org/D2442 Relnotes: yes --- sys/conf/files.powerpc | 1 + sys/dev/pci/pci_pci.c | 26 ++++--- sys/dev/pci/pcib_private.h | 1 + sys/powerpc/mpc85xx/pci_mpc85xx.c | 14 +++- sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c | 104 +++++++++++++++++++++++++ 5 files changed, 133 insertions(+), 13 deletions(-) create mode 100644 sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c diff --git a/sys/conf/files.powerpc b/sys/conf/files.powerpc index 1a67f5c7dd8d..4158f2cb7ab1 100644 --- a/sys/conf/files.powerpc +++ b/sys/conf/files.powerpc @@ -138,6 +138,7 @@ powerpc/mpc85xx/mpc85xx.c optional mpc85xx powerpc/mpc85xx/mpc85xx_gpio.c optional mpc85xx gpio powerpc/mpc85xx/platform_mpc85xx.c optional mpc85xx powerpc/mpc85xx/pci_mpc85xx.c optional pci mpc85xx +powerpc/mpc85xx/pci_mpc85xx_pcib.c optional pci mpc85xx powerpc/ofw/ofw_machdep.c standard powerpc/ofw/ofw_pci.c optional pci powerpc/ofw/ofw_pcibus.c optional pci diff --git a/sys/dev/pci/pci_pci.c b/sys/dev/pci/pci_pci.c index 789a9180313c..585ee863bc46 100644 --- a/sys/dev/pci/pci_pci.c +++ b/sys/dev/pci/pci_pci.c @@ -442,16 +442,7 @@ pcib_probe_windows(struct pcib_softc *sc) dev = sc->dev; if (pci_clear_pcib) { - pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1); - pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2); - pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1); - pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2); - pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2); - pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2); - pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2); - pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4); - pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2); - pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4); + pcib_bridge_init(dev); } /* Determine if the I/O port window is implemented. */ @@ -1115,6 +1106,21 @@ pcib_resume(device_t dev) return (bus_generic_resume(dev)); } +void +pcib_bridge_init(device_t dev) +{ + pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1); + pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2); + pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1); + pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2); + pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2); + pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2); + pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2); + pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4); + pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2); + pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4); +} + int pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) { diff --git a/sys/dev/pci/pcib_private.h b/sys/dev/pci/pcib_private.h index 20cb014c3b84..bba4ce290926 100644 --- a/sys/dev/pci/pcib_private.h +++ b/sys/dev/pci/pcib_private.h @@ -145,6 +145,7 @@ void pcib_setup_secbus(device_t dev, struct pcib_secbus *bus, #endif int pcib_attach(device_t dev); void pcib_attach_common(device_t dev); +void pcib_bridge_init(device_t dev); #ifdef NEW_PCIB const char *pcib_child_name(device_t child); #endif diff --git a/sys/powerpc/mpc85xx/pci_mpc85xx.c b/sys/powerpc/mpc85xx/pci_mpc85xx.c index f1b958f77052..0050a9877f20 100644 --- a/sys/powerpc/mpc85xx/pci_mpc85xx.c +++ b/sys/powerpc/mpc85xx/pci_mpc85xx.c @@ -570,10 +570,19 @@ fsl_pcib_init(struct fsl_pcib_softc *sc, int bus, int maxslot) subclass = fsl_pcib_read_config(sc->sc_dev, bus, slot, func, PCIR_SUBCLASS, 1); + /* + * The PCI Root Complex comes up as a Processor/PowerPC, + * but is a bridge. + */ /* Allow only proper PCI-PCI briges */ - if (class != PCIC_BRIDGE) + if (class != PCIC_BRIDGE && class != PCIC_PROCESSOR) continue; - if (subclass != PCIS_BRIDGE_PCI) + if (subclass != PCIS_BRIDGE_PCI && + subclass != PCIS_PROCESSOR_POWERPC) + continue; + + if (subclass == PCIS_PROCESSOR_POWERPC && + hdrtype != PCIM_HDRTYPE_BRIDGE) continue; secbus++; @@ -825,4 +834,3 @@ fsl_pcib_decode_win(phandle_t node, struct fsl_pcib_softc *sc) return (0); } - diff --git a/sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c b/sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c new file mode 100644 index 000000000000..934f3cc01df8 --- /dev/null +++ b/sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c @@ -0,0 +1,104 @@ +/*- + * Copyright 2015 Justin Hibbits + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * From: FreeBSD: src/sys/powerpc/mpc85xx/pci_ocp.c,v 1.9 2010/03/23 23:46:28 marcel + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include "pcib_if.h" + +static int +fsl_pcib_rc_probe(device_t dev) +{ + printf("Probe called\n"); + if (pci_get_vendor(dev) != 0x1957) + return (ENXIO); + if (pci_get_progif(dev) != 0) + return (ENXIO); + if (pci_get_class(dev) != PCIC_PROCESSOR) + return (ENXIO); + if (pci_get_subclass(dev) != PCIS_PROCESSOR_POWERPC) + return (ENXIO); + + return (BUS_PROBE_DEFAULT); +} + +static int +fsl_pcib_rc_attach(device_t dev) +{ + struct pcib_softc *sc; + device_t child; + + pcib_bridge_init(dev); + pcib_attach_common(dev); + + sc = device_get_softc(dev); + if (sc->bus.sec != 0) { + child = device_add_child(dev, "pci", -1); + if (child != NULL) + return (bus_generic_attach(dev)); + } + + return (0); +} + +static device_method_t fsl_pcib_rc_methods[] = { + DEVMETHOD(device_probe, fsl_pcib_rc_probe), + DEVMETHOD(device_attach, fsl_pcib_rc_attach), + DEVMETHOD_END +}; + +static devclass_t fsl_pcib_rc_devclass; +DEFINE_CLASS_1(pcib, fsl_pcib_rc_driver, fsl_pcib_rc_methods, + sizeof(struct pcib_softc), pcib_driver); +DRIVER_MODULE(rcpcib, pci, fsl_pcib_rc_driver, fsl_pcib_rc_devclass, 0, 0); +