Add an implementation of __ffssi2() derived from __ffsdi2().
Newer versions of GCC include an __ffssi2() symbol in libgcc and the compiler can emit calls to it in generated code. This is true for at least GCC 6.2 when compiling world for mips and mips64. Reviewed by: jmallett, dim Sponsored by: DARPA / AFRL Differential Revision: https://reviews.freebsd.org/D10086
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2020-12-20 02:59:44 +00:00
svn path=/head/; revision=316511
@ -45,6 +45,7 @@ si_int __ctzsi2(si_int a); // count trailing zeros
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si_int __ctzdi2(di_int a); // count trailing zeros
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si_int __ctzdi2(di_int a); // count trailing zeros
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si_int __ctzti2(ti_int a); // count trailing zeros
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si_int __ctzti2(ti_int a); // count trailing zeros
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si_int __ffssi2(si_int a); // find least significant 1 bit
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si_int __ffsdi2(di_int a); // find least significant 1 bit
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si_int __ffsdi2(di_int a); // find least significant 1 bit
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si_int __ffsti2(ti_int a); // find least significant 1 bit
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si_int __ffsti2(ti_int a); // find least significant 1 bit
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29
contrib/compiler-rt/lib/builtins/ffssi2.c
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29
contrib/compiler-rt/lib/builtins/ffssi2.c
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/* ===-- ffssi2.c - Implement __ffssi2 -------------------------------------===
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*
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* The LLVM Compiler Infrastructure
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*
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* This file is dual licensed under the MIT and the University of Illinois Open
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* Source Licenses. See LICENSE.TXT for details.
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*
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* ===----------------------------------------------------------------------===
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*
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* This file implements __ffssi2 for the compiler_rt library.
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*
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* ===----------------------------------------------------------------------===
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*/
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#include "int_lib.h"
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/* Returns: the index of the least significant 1-bit in a, or
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* the value zero if a is zero. The least significant bit is index one.
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*/
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COMPILER_RT_ABI si_int
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__ffssi2(si_int a)
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{
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if (a == 0)
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{
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return 0;
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}
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return __builtin_ctz(a) + 1;
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}
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@ -38,6 +38,7 @@ SRCF+= divxc3
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SRCF+= enable_execute_stack
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SRCF+= enable_execute_stack
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SRCF+= eprintf
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SRCF+= eprintf
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SRCF+= extendhfsf2
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SRCF+= extendhfsf2
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SRCF+= ffssi2
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SRCF+= ffsdi2
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SRCF+= ffsdi2
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SRCF+= ffsti2
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SRCF+= ffsti2
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SRCF+= fixdfdi
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SRCF+= fixdfdi
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