Add 8devices CARAMBOLA2 support.
This is based on the AR933x (Hornet) SoC from Qualcomm Atheros. It's a much nicer board to do development on - 64MB RAM, 16MB flash. The development board breaks out the GPIO pins, ethernet, serial (via a USB<->RS232 chip), USB host and of course a small wifi antenna. Everything but the wifi works thus far.
This commit is contained in:
Adrian Chadd
parent
70234acbb1
commit
82aa6e614b
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=251551
53
sys/mips/conf/CARAMBOLA2
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53
sys/mips/conf/CARAMBOLA2
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#
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# Carambola 2 - an AR933x based SoC wifi device.
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#
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# http://shop.8devices.com/wifi4things/carambola2
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#
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# * AR9330 SoC
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# * 64MB RAM
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# * 16MB flash
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# * Integrated 1x1 2GHz wifi and 10/100 bridge
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#
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# $FreeBSD$
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#
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# Include the default AR933x parameters
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include "AR933X_BASE"
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ident CARAMBOLA2
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# Override hints with board values
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hints "CARAMBOLA2.hints"
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# Board memory - 64MB
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options AR71XX_REALMEM=(64*1024*1024)
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# i2c GPIO bus
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#device gpioiic
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#device iicbb
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#device iicbus
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#device iic
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# Options required for miiproxy and mdiobus
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options ARGE_MDIO # Export an MDIO bus separate from arge
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device miiproxy # MDIO bus <-> MII PHY rendezvous
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device etherswitch
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device arswitch
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# read MSDOS formatted disks - USB
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#options MSDOSFS
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# Enable the uboot environment stuff rather then the
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# redboot stuff.
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options AR71XX_ENV_UBOOT
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# uzip - to boot natively from flash
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device geom_uncompress
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options GEOM_UNCOMPRESS
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# Used for the static uboot partition map
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device geom_map
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# Boot off of the rootfs, as defined in the geom_map setup.
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options ROOTDEVNAME=\"ufs:map/rootfs.uncompress\"
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109
sys/mips/conf/CARAMBOLA2.hints
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109
sys/mips/conf/CARAMBOLA2.hints
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#
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# This file adds to the values in AR91XX_BASE.hints.
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#
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# $FreeBSD$
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# mdiobus on arge1
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hint.argemdio.0.at="nexus0"
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hint.argemdio.0.maddr=0x1a000000
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hint.argemdio.0.msize=0x1000
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hint.argemdio.0.order=0
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# Embedded Atheros Switch
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hint.arswitch.0.at="mdio0"
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# XXX this should really say it's an AR933x switch, as there
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# are some vlan specific differences here!
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hint.arswitch.0.is_7240=1
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hint.arswitch.0.numphys=4
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hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY
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hint.arswitch.0.is_rgmii=0
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hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII
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# arge0 - MII, autoneg, phy(4)
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hint.arge.0.phymask=0x10 # PHY4
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hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus
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# arge1 - GMII, 1000/full
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hint.arge.1.phymask=0x0 # No directly mapped PHYs
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hint.arge.1.media=1000
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hint.arge.1.fduplex=1
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# The AP121 16MB flash layout:
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#
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# [ 0.700000] 0x000000000000-0x000000040000 : "u-boot"
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# [ 0.710000] 0x000000040000-0x000000050000 : "u-boot-env"
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# [ 0.710000] 0x000000050000-0x000000250000 : "kernel"
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# [ 0.720000] 0x000000250000-0x000000fe0000 : "rootfs"
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# [ 0.720000] mtd: partition "rootfs" set to be root filesystem
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# [ 0.730000] mtd: partition "rootfs_data" created automatically, ofs=480000, len=B60000
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# [ 0.740000] 0x000000480000-0x000000fe0000 : "rootfs_data"
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# [ 0.740000] 0x000000fe0000-0x000000ff0000 : "nvram"
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# [ 0.750000] 0x000000ff0000-0x000001000000 : "art"
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# [ 0.750000] 0x000000050000-0x000000fe0000 : "firmware"
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hint.map.0.at="flash/spi0"
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hint.map.0.start=0x00000000
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hint.map.0.end=0x000040000
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hint.map.0.name="uboot"
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hint.map.0.readonly=1
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hint.map.1.at="flash/spi0"
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hint.map.1.start=0x00040000
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hint.map.1.end=0x00050000
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hint.map.1.name="uboot-env"
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hint.map.1.readonly=0
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hint.map.2.at="flash/spi0"
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hint.map.2.start=0x00050000
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hint.map.2.end=0x00250000
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hint.map.2.name="kernel"
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hint.map.2.readonly=0
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hint.map.3.at="flash/spi0"
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hint.map.3.start=0x00250000
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hint.map.3.end=0x00fe0000
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hint.map.3.name="rootfs"
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hint.map.3.readonly=0
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hint.map.4.at="flash/spi0"
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hint.map.4.start=0x00fe0000
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hint.map.4.end=0x00ff0000
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hint.map.4.name="cfg"
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hint.map.4.readonly=0
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# This is radio calibration section. It is (or should be!) unique
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# for each board, to take into account thermal and electrical differences
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# as well as the regulatory compliance data.
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#
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hint.map.5.at="flash/spi0"
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hint.map.5.start=0x00ff0000
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hint.map.5.end=0x01000000
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hint.map.5.name="art"
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hint.map.5.readonly=1
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# GPIO specific configuration block
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# Don't flip on anything that isn't already enabled.
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# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
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# not used here.
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hint.gpio.0.function_set=0x00000000
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hint.gpio.0.function_clear=0x00000000
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# These are the GPIO LEDs and buttons which can be software controlled.
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#hint.gpio.0.pinmask=0x001c02ae
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hint.gpio.0.pinmask=0x00001803
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# gpio0 - WLAN LED
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# gpio1 - USB LED
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# gpio11 - Jumpstart button
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# gpio12 - Reset button
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# LEDs are configured separately and driven by the LED device
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hint.gpioled.0.at="gpiobus0"
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hint.gpioled.0.name="wlan"
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hint.gpioled.0.pins=0x0001
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hint.gpioled.1.at="gpiobus0"
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hint.gpioled.1.name="usb"
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hint.gpioled.1.pins=0x0002
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