Clean up the syntax WRT semicolons at the end of function-like-macros, and protect GCCisms from non-GNU compilers and lint.
This commit is contained in:
Mark Murray
parent
e74b0f7796
commit
8306a37bbb
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=100251
@ -28,6 +28,12 @@
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#ifndef _MACHINE_ATOMIC_H_
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#define _MACHINE_ATOMIC_H_
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#ifndef __GNUC__
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#ifndef lint
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#error "This file must be compiled with GCC or lint"
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#endif /* lint */
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#endif /* __GNUC__ */
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/*
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* Various simple arithmetic on memory which is atomic in the presence
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* of interrupts and multiple processors.
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@ -65,13 +71,13 @@
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*/
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#if defined(KLD_MODULE)
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#define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
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void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v);
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void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
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int atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src);
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#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
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u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \
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void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v);
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void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
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#else /* !KLD_MODULE */
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@ -89,6 +95,7 @@ void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v);
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* The assembly is volatilized to demark potential before-and-after side
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* effects if an interrupt or SMP collision were to occur.
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*/
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#ifdef __GNUC__
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#define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
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static __inline void \
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atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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@ -97,6 +104,10 @@ atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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: "+m" (*p) \
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: CONS (V)); \
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}
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#else /* !__GNUC__ */
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#define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
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void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
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#endif /* __GNUC__ */
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/*
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* Atomic compare and set, used by the mutex functions
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@ -106,6 +117,7 @@ atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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* Returns 0 on failure, non-zero on success
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*/
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#if defined(__GNUC__)
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#if defined(I386_CPU)
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static __inline int
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atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
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@ -151,7 +163,15 @@ atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
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return (res);
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}
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#endif /* defined(I386_CPU) */
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#else /* !defined(__GNUC__) */
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static __inline int
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atomic_cmpset_int(volatile u_int *dst __unused, u_int exp __unused,
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u_int src __unused)
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{
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}
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#endif /* defined(__GNUC__) */
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#if defined(__GNUC__)
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#if defined(I386_CPU)
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/*
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* We assume that a = b will do atomic loads and stores.
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@ -172,7 +192,7 @@ atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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*p = v; \
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__asm __volatile("" : : : "memory"); \
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}
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#else
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#else /* !defined(I386_CPU) */
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#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
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static __inline u_##TYPE \
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@ -200,32 +220,43 @@ atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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: : "memory"); \
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}
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#endif /* defined(I386_CPU) */
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#else /* !defined(__GNUC__) */
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/*
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* XXXX: Dummy functions!!
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*/
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#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
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u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p __unused); \
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void atomic_store_rel_##TYPE(volatile u_##TYPE *p __unused, \
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u_##TYPE v __unused)
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#endif /* defined(__GNUC__) */
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#endif /* KLD_MODULE */
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ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v)
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ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v)
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ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v)
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ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v)
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ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v);
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ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v);
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ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v);
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ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v);
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ATOMIC_ASM(set, short, "orw %w1,%0", "ir", v)
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ATOMIC_ASM(clear, short, "andw %w1,%0", "ir", ~v)
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ATOMIC_ASM(add, short, "addw %w1,%0", "ir", v)
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ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir", v)
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ATOMIC_ASM(set, short, "orw %w1,%0", "ir", v);
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ATOMIC_ASM(clear, short, "andw %w1,%0", "ir", ~v);
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ATOMIC_ASM(add, short, "addw %w1,%0", "ir", v);
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ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir", v);
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ATOMIC_ASM(set, int, "orl %1,%0", "ir", v)
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ATOMIC_ASM(clear, int, "andl %1,%0", "ir", ~v)
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ATOMIC_ASM(add, int, "addl %1,%0", "ir", v)
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ATOMIC_ASM(subtract, int, "subl %1,%0", "ir", v)
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ATOMIC_ASM(set, int, "orl %1,%0", "ir", v);
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ATOMIC_ASM(clear, int, "andl %1,%0", "ir", ~v);
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ATOMIC_ASM(add, int, "addl %1,%0", "ir", v);
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ATOMIC_ASM(subtract, int, "subl %1,%0", "ir", v);
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ATOMIC_ASM(set, long, "orl %1,%0", "ir", v)
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ATOMIC_ASM(clear, long, "andl %1,%0", "ir", ~v)
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ATOMIC_ASM(add, long, "addl %1,%0", "ir", v)
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ATOMIC_ASM(subtract, long, "subl %1,%0", "ir", v)
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ATOMIC_ASM(set, long, "orl %1,%0", "ir", v);
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ATOMIC_ASM(clear, long, "andl %1,%0", "ir", ~v);
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ATOMIC_ASM(add, long, "addl %1,%0", "ir", v);
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ATOMIC_ASM(subtract, long, "subl %1,%0", "ir", v);
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ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0")
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ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0")
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ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0")
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ATOMIC_STORE_LOAD(long, "cmpxchgl %0,%1", "xchgl %1,%0")
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ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0");
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ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0");
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ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0");
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ATOMIC_STORE_LOAD(long, "cmpxchgl %0,%1", "xchgl %1,%0");
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#undef ATOMIC_ASM
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#undef ATOMIC_STORE_LOAD
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@ -370,6 +401,7 @@ ATOMIC_PTR(subtract)
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#undef ATOMIC_PTR
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#if defined(__GNUC__)
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static __inline u_int
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atomic_readandclear_int(volatile u_int *addr)
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{
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@ -384,7 +416,17 @@ atomic_readandclear_int(volatile u_int *addr)
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return (result);
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}
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#else /* !defined(__GNUC__) */
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/*
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* XXXX: Dummy!
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*/
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static __inline u_int
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atomic_readandclear_int(volatile u_int *addr __unused)
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{
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}
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#endif /* defined(__GNUC__) */
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#if defined(__GNUC__)
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static __inline u_long
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atomic_readandclear_long(volatile u_long *addr)
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{
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@ -399,5 +441,14 @@ atomic_readandclear_long(volatile u_long *addr)
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return (result);
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}
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#else /* !defined(__GNUC__) */
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/*
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* XXXX: Dummy!
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*/
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static __inline u_long
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atomic_readandclear_long(volatile u_long *addr __unused)
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{
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}
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#endif /* defined(__GNUC__) */
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#endif /* !defined(WANT_FUNCTIONS) */
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#endif /* ! _MACHINE_ATOMIC_H_ */
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@ -28,6 +28,12 @@
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#ifndef _MACHINE_ATOMIC_H_
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#define _MACHINE_ATOMIC_H_
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#ifndef __GNUC__
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#ifndef lint
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#error "This file must be compiled with GCC or lint"
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#endif /* lint */
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#endif /* __GNUC__ */
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/*
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* Various simple arithmetic on memory which is atomic in the presence
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* of interrupts and multiple processors.
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@ -65,13 +71,13 @@
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*/
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#if defined(KLD_MODULE)
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#define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
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void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v);
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void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
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int atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src);
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#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
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u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \
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void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v);
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void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
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#else /* !KLD_MODULE */
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@ -89,6 +95,7 @@ void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v);
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* The assembly is volatilized to demark potential before-and-after side
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* effects if an interrupt or SMP collision were to occur.
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*/
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#ifdef __GNUC__
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#define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
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static __inline void \
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atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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@ -97,6 +104,10 @@ atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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: "+m" (*p) \
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: CONS (V)); \
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}
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#else /* !__GNUC__ */
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#define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
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void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
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#endif /* __GNUC__ */
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/*
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* Atomic compare and set, used by the mutex functions
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@ -106,6 +117,7 @@ atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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* Returns 0 on failure, non-zero on success
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*/
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#if defined(__GNUC__)
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#if defined(I386_CPU)
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static __inline int
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atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
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@ -151,7 +163,15 @@ atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
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return (res);
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}
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#endif /* defined(I386_CPU) */
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#else /* !defined(__GNUC__) */
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static __inline int
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atomic_cmpset_int(volatile u_int *dst __unused, u_int exp __unused,
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u_int src __unused)
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{
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}
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#endif /* defined(__GNUC__) */
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#if defined(__GNUC__)
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#if defined(I386_CPU)
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/*
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* We assume that a = b will do atomic loads and stores.
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@ -172,7 +192,7 @@ atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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*p = v; \
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__asm __volatile("" : : : "memory"); \
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}
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#else
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#else /* !defined(I386_CPU) */
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#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
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static __inline u_##TYPE \
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@ -200,32 +220,43 @@ atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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: : "memory"); \
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}
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#endif /* defined(I386_CPU) */
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#else /* !defined(__GNUC__) */
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/*
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* XXXX: Dummy functions!!
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*/
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#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
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u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p __unused); \
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void atomic_store_rel_##TYPE(volatile u_##TYPE *p __unused, \
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u_##TYPE v __unused)
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#endif /* defined(__GNUC__) */
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#endif /* KLD_MODULE */
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ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v)
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ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v)
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ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v)
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ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v)
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ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v);
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ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v);
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ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v);
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ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v);
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ATOMIC_ASM(set, short, "orw %w1,%0", "ir", v)
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ATOMIC_ASM(clear, short, "andw %w1,%0", "ir", ~v)
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ATOMIC_ASM(add, short, "addw %w1,%0", "ir", v)
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ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir", v)
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ATOMIC_ASM(set, short, "orw %w1,%0", "ir", v);
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ATOMIC_ASM(clear, short, "andw %w1,%0", "ir", ~v);
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ATOMIC_ASM(add, short, "addw %w1,%0", "ir", v);
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ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir", v);
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ATOMIC_ASM(set, int, "orl %1,%0", "ir", v)
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ATOMIC_ASM(clear, int, "andl %1,%0", "ir", ~v)
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ATOMIC_ASM(add, int, "addl %1,%0", "ir", v)
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ATOMIC_ASM(subtract, int, "subl %1,%0", "ir", v)
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ATOMIC_ASM(set, int, "orl %1,%0", "ir", v);
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ATOMIC_ASM(clear, int, "andl %1,%0", "ir", ~v);
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ATOMIC_ASM(add, int, "addl %1,%0", "ir", v);
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ATOMIC_ASM(subtract, int, "subl %1,%0", "ir", v);
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ATOMIC_ASM(set, long, "orl %1,%0", "ir", v)
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ATOMIC_ASM(clear, long, "andl %1,%0", "ir", ~v)
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ATOMIC_ASM(add, long, "addl %1,%0", "ir", v)
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ATOMIC_ASM(subtract, long, "subl %1,%0", "ir", v)
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ATOMIC_ASM(set, long, "orl %1,%0", "ir", v);
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ATOMIC_ASM(clear, long, "andl %1,%0", "ir", ~v);
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ATOMIC_ASM(add, long, "addl %1,%0", "ir", v);
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ATOMIC_ASM(subtract, long, "subl %1,%0", "ir", v);
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ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0")
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ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0")
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ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0")
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ATOMIC_STORE_LOAD(long, "cmpxchgl %0,%1", "xchgl %1,%0")
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ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0");
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ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0");
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ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0");
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ATOMIC_STORE_LOAD(long, "cmpxchgl %0,%1", "xchgl %1,%0");
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#undef ATOMIC_ASM
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#undef ATOMIC_STORE_LOAD
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@ -370,6 +401,7 @@ ATOMIC_PTR(subtract)
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#undef ATOMIC_PTR
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#if defined(__GNUC__)
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static __inline u_int
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atomic_readandclear_int(volatile u_int *addr)
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{
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@ -384,7 +416,17 @@ atomic_readandclear_int(volatile u_int *addr)
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return (result);
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}
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#else /* !defined(__GNUC__) */
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/*
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* XXXX: Dummy!
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*/
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static __inline u_int
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atomic_readandclear_int(volatile u_int *addr __unused)
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{
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}
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#endif /* defined(__GNUC__) */
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#if defined(__GNUC__)
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static __inline u_long
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atomic_readandclear_long(volatile u_long *addr)
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{
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@ -399,5 +441,14 @@ atomic_readandclear_long(volatile u_long *addr)
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return (result);
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}
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#else /* !defined(__GNUC__) */
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/*
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* XXXX: Dummy!
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*/
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static __inline u_long
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atomic_readandclear_long(volatile u_long *addr __unused)
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{
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}
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#endif /* defined(__GNUC__) */
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#endif /* !defined(WANT_FUNCTIONS) */
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#endif /* ! _MACHINE_ATOMIC_H_ */
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