unify amd64 and i386 cpu_reset() in x86/cpu_machdep.c
Because I didn't see any reason not too. I've been making some changes to the code and couldn't help but notice that the i386 and am64 code was nearly identical. MFC after: 17 days
This commit is contained in:
Andriy Gapon
parent
3a648f0472
commit
8428d0f154
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=331878
@ -84,13 +84,6 @@ __FBSDID("$FreeBSD$");
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#include <isa/isareg.h>
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static void cpu_reset_real(void);
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#ifdef SMP
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static void cpu_reset_proxy(void);
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static u_int cpu_reset_proxyid;
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static volatile u_int cpu_reset_proxy_active;
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#endif
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_Static_assert(OFFSETOF_CURTHREAD == offsetof(struct pcpu, pc_curthread),
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"OFFSETOF_CURTHREAD does not correspond with offset of pc_curthread.");
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_Static_assert(OFFSETOF_CURPCB == offsetof(struct pcpu, pc_curpcb),
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@ -565,129 +558,6 @@ cpu_set_user_tls(struct thread *td, void *tls_base)
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return (0);
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}
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#ifdef SMP
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static void
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cpu_reset_proxy()
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{
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cpu_reset_proxy_active = 1;
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while (cpu_reset_proxy_active == 1)
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ia32_pause(); /* Wait for other cpu to see that we've started */
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printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid);
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DELAY(1000000);
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cpu_reset_real();
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}
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#endif
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void
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cpu_reset()
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{
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#ifdef SMP
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cpuset_t map;
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u_int cnt;
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if (smp_started) {
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map = all_cpus;
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CPU_CLR(PCPU_GET(cpuid), &map);
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CPU_NAND(&map, &stopped_cpus);
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if (!CPU_EMPTY(&map)) {
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printf("cpu_reset: Stopping other CPUs\n");
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stop_cpus(map);
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}
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if (PCPU_GET(cpuid) != 0) {
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cpu_reset_proxyid = PCPU_GET(cpuid);
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cpustop_restartfunc = cpu_reset_proxy;
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cpu_reset_proxy_active = 0;
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printf("cpu_reset: Restarting BSP\n");
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/* Restart CPU #0. */
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CPU_SETOF(0, &started_cpus);
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wmb();
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cnt = 0;
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while (cpu_reset_proxy_active == 0 && cnt < 10000000) {
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ia32_pause();
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cnt++; /* Wait for BSP to announce restart */
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}
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if (cpu_reset_proxy_active == 0) {
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printf("cpu_reset: Failed to restart BSP\n");
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} else {
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cpu_reset_proxy_active = 2;
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while (1)
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ia32_pause();
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/* NOTREACHED */
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}
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}
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DELAY(1000000);
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}
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#endif
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cpu_reset_real();
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/* NOTREACHED */
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}
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static void
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cpu_reset_real()
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{
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struct region_descriptor null_idt;
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int b;
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disable_intr();
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/*
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* Attempt to do a CPU reset via the keyboard controller,
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* do not turn off GateA20, as any machine that fails
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* to do the reset here would then end up in no man's land.
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*/
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outb(IO_KBD + 4, 0xFE);
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DELAY(500000); /* wait 0.5 sec to see if that did it */
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/*
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* Attempt to force a reset via the Reset Control register at
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* I/O port 0xcf9. Bit 2 forces a system reset when it
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* transitions from 0 to 1. Bit 1 selects the type of reset
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* to attempt: 0 selects a "soft" reset, and 1 selects a
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* "hard" reset. We try a "hard" reset. The first write sets
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* bit 1 to select a "hard" reset and clears bit 2. The
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* second write forces a 0 -> 1 transition in bit 2 to trigger
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* a reset.
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*/
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outb(0xcf9, 0x2);
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outb(0xcf9, 0x6);
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DELAY(500000); /* wait 0.5 sec to see if that did it */
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/*
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* Attempt to force a reset via the Fast A20 and Init register
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* at I/O port 0x92. Bit 1 serves as an alternate A20 gate.
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* Bit 0 asserts INIT# when set to 1. We are careful to only
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* preserve bit 1 while setting bit 0. We also must clear bit
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* 0 before setting it if it isn't already clear.
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*/
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b = inb(0x92);
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if (b != 0xff) {
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if ((b & 0x1) != 0)
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outb(0x92, b & 0xfe);
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outb(0x92, b | 0x1);
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DELAY(500000); /* wait 0.5 sec to see if that did it */
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}
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printf("No known reset method worked, attempting CPU shutdown\n");
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DELAY(1000000); /* wait 1 sec for printf to complete */
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/* Wipe the IDT. */
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null_idt.rd_limit = 0;
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null_idt.rd_base = 0;
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lidt(&null_idt);
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/* "good night, sweet prince .... <THUNK!>" */
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breakpoint();
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/* NOTREACHED */
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while(1);
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}
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/*
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* Software interrupt handler for queued VM system processing.
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*/
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@ -103,13 +103,6 @@ _Static_assert(OFFSETOF_CURPCB == offsetof(struct pcpu, pc_curpcb),
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_Static_assert(__OFFSETOF_MONITORBUF == offsetof(struct pcpu, pc_monitorbuf),
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"__OFFSETOF_MONINORBUF does not correspond with offset of pc_monitorbuf.");
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static void cpu_reset_real(void);
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#ifdef SMP
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static void cpu_reset_proxy(void);
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static u_int cpu_reset_proxyid;
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static volatile u_int cpu_reset_proxy_active;
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#endif
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union savefpu *
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get_pcb_user_save_td(struct thread *td)
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{
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@ -577,141 +570,6 @@ kvtop(void *addr)
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return (pa);
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}
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#ifdef SMP
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static void
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cpu_reset_proxy()
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{
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cpu_reset_proxy_active = 1;
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while (cpu_reset_proxy_active == 1)
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ia32_pause(); /* Wait for other cpu to see that we've started */
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printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid);
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DELAY(1000000);
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cpu_reset_real();
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}
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#endif
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void
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cpu_reset()
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{
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#ifdef SMP
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cpuset_t map;
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u_int cnt;
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if (smp_started) {
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map = all_cpus;
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CPU_CLR(PCPU_GET(cpuid), &map);
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CPU_NAND(&map, &stopped_cpus);
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if (!CPU_EMPTY(&map)) {
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printf("cpu_reset: Stopping other CPUs\n");
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stop_cpus(map);
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}
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if (PCPU_GET(cpuid) != 0) {
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cpu_reset_proxyid = PCPU_GET(cpuid);
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cpustop_restartfunc = cpu_reset_proxy;
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cpu_reset_proxy_active = 0;
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printf("cpu_reset: Restarting BSP\n");
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/* Restart CPU #0. */
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CPU_SETOF(0, &started_cpus);
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wmb();
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cnt = 0;
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while (cpu_reset_proxy_active == 0 && cnt < 10000000) {
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ia32_pause();
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cnt++; /* Wait for BSP to announce restart */
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}
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if (cpu_reset_proxy_active == 0) {
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printf("cpu_reset: Failed to restart BSP\n");
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} else {
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cpu_reset_proxy_active = 2;
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while (1)
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ia32_pause();
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/* NOTREACHED */
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}
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}
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DELAY(1000000);
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}
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#endif
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cpu_reset_real();
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/* NOTREACHED */
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}
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static void
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cpu_reset_real()
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{
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struct region_descriptor null_idt;
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int b;
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disable_intr();
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#ifdef CPU_ELAN
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if (elan_mmcr != NULL)
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elan_mmcr->RESCFG = 1;
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#endif
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if (cpu == CPU_GEODE1100) {
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/* Attempt Geode's own reset */
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outl(0xcf8, 0x80009044ul);
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outl(0xcfc, 0xf);
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}
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#if !defined(BROKEN_KEYBOARD_RESET)
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/*
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* Attempt to do a CPU reset via the keyboard controller,
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* do not turn off GateA20, as any machine that fails
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* to do the reset here would then end up in no man's land.
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*/
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outb(IO_KBD + 4, 0xFE);
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DELAY(500000); /* wait 0.5 sec to see if that did it */
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#endif
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/*
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* Attempt to force a reset via the Reset Control register at
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* I/O port 0xcf9. Bit 2 forces a system reset when it
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* transitions from 0 to 1. Bit 1 selects the type of reset
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* to attempt: 0 selects a "soft" reset, and 1 selects a
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* "hard" reset. We try a "hard" reset. The first write sets
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* bit 1 to select a "hard" reset and clears bit 2. The
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* second write forces a 0 -> 1 transition in bit 2 to trigger
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* a reset.
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*/
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outb(0xcf9, 0x2);
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outb(0xcf9, 0x6);
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DELAY(500000); /* wait 0.5 sec to see if that did it */
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/*
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* Attempt to force a reset via the Fast A20 and Init register
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* at I/O port 0x92. Bit 1 serves as an alternate A20 gate.
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* Bit 0 asserts INIT# when set to 1. We are careful to only
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* preserve bit 1 while setting bit 0. We also must clear bit
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* 0 before setting it if it isn't already clear.
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*/
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b = inb(0x92);
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if (b != 0xff) {
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if ((b & 0x1) != 0)
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outb(0x92, b & 0xfe);
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outb(0x92, b | 0x1);
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DELAY(500000); /* wait 0.5 sec to see if that did it */
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}
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printf("No known reset method worked, attempting CPU shutdown\n");
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DELAY(1000000); /* wait 1 sec for printf to complete */
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/* Wipe the IDT. */
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null_idt.rd_limit = 0;
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null_idt.rd_base = 0;
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lidt(&null_idt);
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/* "good night, sweet prince .... <THUNK!>" */
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breakpoint();
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/* NOTREACHED */
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while(1);
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}
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/*
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* Get an sf_buf from the freelist. May block if none are available.
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*/
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@ -96,10 +96,18 @@ __FBSDID("$FreeBSD$");
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#include <vm/vm_pager.h>
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#include <vm/vm_param.h>
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#include <isa/isareg.h>
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#define STATE_RUNNING 0x0
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#define STATE_MWAIT 0x1
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#define STATE_SLEEPING 0x2
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#ifdef SMP
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static u_int cpu_reset_proxyid;
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static volatile u_int cpu_reset_proxy_active;
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#endif
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/*
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* Machine dependent boot() routine
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*
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@ -242,6 +250,141 @@ cpu_halt(void)
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halt();
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}
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static void
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cpu_reset_real()
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{
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struct region_descriptor null_idt;
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int b;
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disable_intr();
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#ifdef CPU_ELAN
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if (elan_mmcr != NULL)
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elan_mmcr->RESCFG = 1;
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#endif
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#ifdef __i386__
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if (cpu == CPU_GEODE1100) {
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/* Attempt Geode's own reset */
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outl(0xcf8, 0x80009044ul);
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outl(0xcfc, 0xf);
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}
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#endif
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#if !defined(BROKEN_KEYBOARD_RESET)
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/*
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* Attempt to do a CPU reset via the keyboard controller,
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* do not turn off GateA20, as any machine that fails
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* to do the reset here would then end up in no man's land.
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*/
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outb(IO_KBD + 4, 0xFE);
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DELAY(500000); /* wait 0.5 sec to see if that did it */
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#endif
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/*
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* Attempt to force a reset via the Reset Control register at
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* I/O port 0xcf9. Bit 2 forces a system reset when it
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* transitions from 0 to 1. Bit 1 selects the type of reset
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* to attempt: 0 selects a "soft" reset, and 1 selects a
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* "hard" reset. We try a "hard" reset. The first write sets
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* bit 1 to select a "hard" reset and clears bit 2. The
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* second write forces a 0 -> 1 transition in bit 2 to trigger
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* a reset.
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*/
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outb(0xcf9, 0x2);
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outb(0xcf9, 0x6);
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DELAY(500000); /* wait 0.5 sec to see if that did it */
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/*
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* Attempt to force a reset via the Fast A20 and Init register
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* at I/O port 0x92. Bit 1 serves as an alternate A20 gate.
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* Bit 0 asserts INIT# when set to 1. We are careful to only
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* preserve bit 1 while setting bit 0. We also must clear bit
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* 0 before setting it if it isn't already clear.
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*/
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b = inb(0x92);
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if (b != 0xff) {
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if ((b & 0x1) != 0)
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outb(0x92, b & 0xfe);
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outb(0x92, b | 0x1);
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DELAY(500000); /* wait 0.5 sec to see if that did it */
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}
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printf("No known reset method worked, attempting CPU shutdown\n");
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DELAY(1000000); /* wait 1 sec for printf to complete */
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/* Wipe the IDT. */
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null_idt.rd_limit = 0;
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null_idt.rd_base = 0;
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lidt(&null_idt);
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/* "good night, sweet prince .... <THUNK!>" */
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breakpoint();
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/* NOTREACHED */
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while(1);
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}
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#ifdef SMP
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static void
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cpu_reset_proxy()
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{
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cpu_reset_proxy_active = 1;
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while (cpu_reset_proxy_active == 1)
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ia32_pause(); /* Wait for other cpu to see that we've started */
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printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid);
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DELAY(1000000);
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cpu_reset_real();
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}
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#endif
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void
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cpu_reset()
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{
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#ifdef SMP
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cpuset_t map;
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u_int cnt;
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if (smp_started) {
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map = all_cpus;
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CPU_CLR(PCPU_GET(cpuid), &map);
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CPU_NAND(&map, &stopped_cpus);
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if (!CPU_EMPTY(&map)) {
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printf("cpu_reset: Stopping other CPUs\n");
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stop_cpus(map);
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}
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if (PCPU_GET(cpuid) != 0) {
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cpu_reset_proxyid = PCPU_GET(cpuid);
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cpustop_restartfunc = cpu_reset_proxy;
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cpu_reset_proxy_active = 0;
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printf("cpu_reset: Restarting BSP\n");
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/* Restart CPU #0. */
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CPU_SETOF(0, &started_cpus);
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wmb();
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cnt = 0;
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while (cpu_reset_proxy_active == 0 && cnt < 10000000) {
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ia32_pause();
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cnt++; /* Wait for BSP to announce restart */
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}
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if (cpu_reset_proxy_active == 0) {
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printf("cpu_reset: Failed to restart BSP\n");
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} else {
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cpu_reset_proxy_active = 2;
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while (1)
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ia32_pause();
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/* NOTREACHED */
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}
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}
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DELAY(1000000);
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}
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#endif
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cpu_reset_real();
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/* NOTREACHED */
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}
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bool
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cpu_mwait_usable(void)
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{
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