am335x_clk_pruss_activate(): use the L3F clock.
The DISP DPLL clock is slower and was making the PRU programs slower on FreeBSD than on Linux. Submitted by: Manuel Stuehn <freebsdnewbie at freenet.de> MFC after: 1 week
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=278061
@ -502,7 +502,7 @@ am335x_clk_gpio_activate(struct ti_clock_dev *clkdev)
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/* set *_CLKCTRL register MODULEMODE[1:0] to enable(2) */
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/* set *_CLKCTRL register OPTFCLKEN_GPIO_1_G DBCLK[18] to FCLK_EN(1) */
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prcm_write_4(clk_details->clkctrl_reg, 2 | (1 << 18));
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while ((prcm_read_4(clk_details->clkctrl_reg) &
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while ((prcm_read_4(clk_details->clkctrl_reg) &
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(3 | (1 << 18) )) != (2 | (1 << 18)))
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DELAY(10);
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@ -724,11 +724,11 @@ am335x_clk_lcdc_activate(struct ti_clock_dev *clkdev)
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prcm_write_4(CM_WKUP_CM_CLKMODE_DPLL_DISP, 0x4);
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/* Make sure it's in bypass mode */
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while (!(prcm_read_4(CM_WKUP_CM_IDLEST_DPLL_DISP)
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while (!(prcm_read_4(CM_WKUP_CM_IDLEST_DPLL_DISP)
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& (1 << 8)))
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DELAY(10);
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/*
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/*
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* For now set frequency to 99*SYSFREQ/8 which is twice as
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* HDMI 1080p pixel clock (minimum LCDC freq divisor is 2)
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*/
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@ -738,7 +738,7 @@ am335x_clk_lcdc_activate(struct ti_clock_dev *clkdev)
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prcm_write_4(CM_WKUP_CM_CLKMODE_DPLL_DISP, 0x7);
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int timeout = 10000;
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while ((!(prcm_read_4(CM_WKUP_CM_IDLEST_DPLL_DISP)
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while ((!(prcm_read_4(CM_WKUP_CM_IDLEST_DPLL_DISP)
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& (1 << 0))) && timeout--)
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DELAY(10);
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@ -786,9 +786,9 @@ am335x_clk_pruss_activate(struct ti_clock_dev *clkdev)
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while ((prcm_read_4(CM_PER_PRUSS_CLKSTCTRL) & (1<<6)) == 0)
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DELAY(10);
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/* Select DISP DPLL as OCP clock */
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prcm_write_4(CLKSEL_PRUSS_OCP_CLK, 1);
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while ((prcm_read_4(CLKSEL_PRUSS_OCP_CLK) & 0x3) != 1)
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/* Select L3F as OCP clock */
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prcm_write_4(CLKSEL_PRUSS_OCP_CLK, 0);
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while ((prcm_read_4(CLKSEL_PRUSS_OCP_CLK) & 0x3) != 0)
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DELAY(10);
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/* Clear the RESET bit */
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