Don't switch from fast interrupt handlers to normal interrupt
handlers if interrupts are nested more than a few (3) deep. This only reduces the maximum nesting level by 1 with the standard drivers unless there is a related bug somewhere, but can't hurt much (the worst case is returning to hoggish interrupt handler like wdintr(), but such interrupt handlers hurt anyway). Fixed a previously harmless race incrementing the interrupt nesting level. This should be in 2.1.6 and 2.2.
This commit is contained in:
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cf8c1bcd54
commit
857450d0ac
@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: vector.s,v 1.21 1996/10/30 22:39:04 asami Exp $
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* $Id: vector.s,v 1.22 1996/11/06 17:02:38 bde Exp $
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*/
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/*
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@ -135,7 +135,8 @@ IDTVEC(vec_name) ; \
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movl _cpl,%eax ; /* are we unmasking pending HWIs or SWIs? */ \
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notl %eax ; \
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andl _ipending,%eax ; \
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jne 1f ; /* yes, handle them */ \
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jne 2f ; /* yes, maybe handle them */ \
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1: ; \
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MEXITCOUNT ; \
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MAYBE_POPL_ES ; \
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popl %ds ; \
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@ -145,9 +146,13 @@ IDTVEC(vec_name) ; \
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iret ; \
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; \
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ALIGN_TEXT ; \
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1: ; \
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2: ; \
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cmpb $3,_intr_nesting_level ; /* is there enough stack? */ \
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jae 1b ; /* no, return */ \
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movl _cpl,%eax ; \
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/* XXX next line is probably unnecessary now. */ \
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movl $HWI_MASK|SWI_MASK,_cpl ; /* limit nesting ... */ \
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incb _intr_nesting_level ; /* ... really limit it ... */ \
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sti ; /* ... to do this as early as possible */ \
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MAYBE_POPL_ES ; /* discard most of thin frame ... */ \
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popl %ecx ; /* ... original %ds ... */ \
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@ -163,7 +168,6 @@ IDTVEC(vec_name) ; \
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movl (2+8+1)*4(%esp),%eax ; /* ... cpl from thin frame */ \
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pushl %eax ; \
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subl $4,%esp ; /* junk for unit number */ \
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incb _intr_nesting_level ; \
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MEXITCOUNT ; \
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jmp _doreti
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: vector.s,v 1.21 1996/10/30 22:39:04 asami Exp $
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* $Id: vector.s,v 1.22 1996/11/06 17:02:38 bde Exp $
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*/
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/*
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@ -135,7 +135,8 @@ IDTVEC(vec_name) ; \
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movl _cpl,%eax ; /* are we unmasking pending HWIs or SWIs? */ \
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notl %eax ; \
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andl _ipending,%eax ; \
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jne 1f ; /* yes, handle them */ \
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jne 2f ; /* yes, maybe handle them */ \
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1: ; \
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MEXITCOUNT ; \
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MAYBE_POPL_ES ; \
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popl %ds ; \
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@ -145,9 +146,13 @@ IDTVEC(vec_name) ; \
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iret ; \
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; \
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ALIGN_TEXT ; \
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1: ; \
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2: ; \
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cmpb $3,_intr_nesting_level ; /* is there enough stack? */ \
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jae 1b ; /* no, return */ \
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movl _cpl,%eax ; \
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/* XXX next line is probably unnecessary now. */ \
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movl $HWI_MASK|SWI_MASK,_cpl ; /* limit nesting ... */ \
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incb _intr_nesting_level ; /* ... really limit it ... */ \
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sti ; /* ... to do this as early as possible */ \
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MAYBE_POPL_ES ; /* discard most of thin frame ... */ \
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popl %ecx ; /* ... original %ds ... */ \
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@ -163,7 +168,6 @@ IDTVEC(vec_name) ; \
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movl (2+8+1)*4(%esp),%eax ; /* ... cpl from thin frame */ \
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pushl %eax ; \
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subl $4,%esp ; /* junk for unit number */ \
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incb _intr_nesting_level ; \
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MEXITCOUNT ; \
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jmp _doreti
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: vector.s,v 1.21 1996/10/30 22:39:04 asami Exp $
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* $Id: vector.s,v 1.22 1996/11/06 17:02:38 bde Exp $
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*/
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/*
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@ -135,7 +135,8 @@ IDTVEC(vec_name) ; \
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movl _cpl,%eax ; /* are we unmasking pending HWIs or SWIs? */ \
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notl %eax ; \
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andl _ipending,%eax ; \
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jne 1f ; /* yes, handle them */ \
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jne 2f ; /* yes, maybe handle them */ \
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1: ; \
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MEXITCOUNT ; \
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MAYBE_POPL_ES ; \
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popl %ds ; \
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@ -145,9 +146,13 @@ IDTVEC(vec_name) ; \
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iret ; \
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; \
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ALIGN_TEXT ; \
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1: ; \
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2: ; \
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cmpb $3,_intr_nesting_level ; /* is there enough stack? */ \
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jae 1b ; /* no, return */ \
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movl _cpl,%eax ; \
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/* XXX next line is probably unnecessary now. */ \
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movl $HWI_MASK|SWI_MASK,_cpl ; /* limit nesting ... */ \
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incb _intr_nesting_level ; /* ... really limit it ... */ \
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sti ; /* ... to do this as early as possible */ \
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MAYBE_POPL_ES ; /* discard most of thin frame ... */ \
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popl %ecx ; /* ... original %ds ... */ \
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@ -163,7 +168,6 @@ IDTVEC(vec_name) ; \
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movl (2+8+1)*4(%esp),%eax ; /* ... cpl from thin frame */ \
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pushl %eax ; \
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subl $4,%esp ; /* junk for unit number */ \
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incb _intr_nesting_level ; \
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MEXITCOUNT ; \
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jmp _doreti
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