Add driver for Motorcomm YT8511 GbE PHY
Partially from: https://reviews.freebsd.org/D36093
This commit is contained in:
Søren Schmidt
Ganbold Tsagaankhuu
parent
2e1e68cbae
commit
85e7d8e0ae
184
sys/dev/mii/mcommphy.c
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184
sys/dev/mii/mcommphy.c
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/*
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* Copyright (c) 2022 Jared McNeill <jmcneill@invisible.ca>
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* Copyright (c) 2022 Soren Schmidt <sos@deepcore.dk>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Motorcomm YT8511C / YT8511H Integrated 10/100/1000 Gigabit Ethernet phy
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/errno.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include "miibus_if.h"
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#define MCOMMPHY_OUI 0x000000
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#define MCOMMPHY_MODEL 0x10
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#define MCOMMPHY_REV 0x0a
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#define EXT_REG_ADDR 0x1e
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#define EXT_REG_DATA 0x1f
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/* Extended registers */
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#define PHY_CLOCK_GATING_REG 0x0c
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#define RX_CLK_DELAY_EN 0x0001
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#define CLK_25M_SEL 0x0006
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#define CLK_25M_SEL_125M 3
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#define TX_CLK_DELAY_SEL 0x00f0
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#define PHY_SLEEP_CONTROL1_REG 0x27
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#define PLLON_IN_SLP 0x4000
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#define LOWEST_SET_BIT(mask) ((((mask) - 1) & (mask)) ^ (mask))
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#define SHIFTIN(x, mask) ((x) * LOWEST_SET_BIT(mask))
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static int
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mcommphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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switch (cmd) {
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case MII_POLLSTAT:
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break;
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case MII_MEDIACHG:
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mii_phy_setmedia(sc);
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break;
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case MII_TICK:
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if (mii_phy_tick(sc) == EJUSTRETURN)
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return (0);
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break;
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}
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/* Update the media status. */
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PHY_STATUS(sc);
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/* Callback if something changed. */
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mii_phy_update(sc, cmd);
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return (0);
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}
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static const struct mii_phy_funcs mcommphy_funcs = {
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mcommphy_service,
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ukphy_status,
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mii_phy_reset
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};
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static int
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mcommphy_probe(device_t dev)
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{
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struct mii_attach_args *ma = device_get_ivars(dev);
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/*
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* The YT8511C reports an OUI of 0. Best we can do here is to match
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* exactly the contents of the PHY identification registers.
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*/
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if (MII_OUI(ma->mii_id1, ma->mii_id2) == MCOMMPHY_OUI &&
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MII_MODEL(ma->mii_id2) == MCOMMPHY_MODEL &&
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MII_REV(ma->mii_id2) == MCOMMPHY_REV) {
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device_set_desc(dev, "Motorcomm YT8511 media interface");
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return BUS_PROBE_DEFAULT;
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}
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return (ENXIO);
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}
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static int
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mcommphy_attach(device_t dev)
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{
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struct mii_softc *sc = device_get_softc(dev);
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uint16_t oldaddr, data;
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mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &mcommphy_funcs, 0);
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PHY_RESET(sc);
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/* begin chip stuff */
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oldaddr = PHY_READ(sc, EXT_REG_ADDR);
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PHY_WRITE(sc, EXT_REG_ADDR, PHY_CLOCK_GATING_REG);
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data = PHY_READ(sc, EXT_REG_DATA);
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data &= ~CLK_25M_SEL;
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data |= SHIFTIN(CLK_25M_SEL_125M, CLK_25M_SEL);;
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if (sc->mii_flags & MIIF_RX_DELAY) {
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data |= RX_CLK_DELAY_EN;
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} else {
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data &= ~RX_CLK_DELAY_EN;
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}
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data &= ~TX_CLK_DELAY_SEL;
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if (sc->mii_flags & MIIF_TX_DELAY) {
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data |= SHIFTIN(0xf, TX_CLK_DELAY_SEL);
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} else {
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data |= SHIFTIN(0x2, TX_CLK_DELAY_SEL);
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}
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PHY_WRITE(sc, EXT_REG_DATA, data);
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PHY_WRITE(sc, EXT_REG_ADDR, PHY_SLEEP_CONTROL1_REG);
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data = PHY_READ(sc, EXT_REG_DATA);
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data |= PLLON_IN_SLP;
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PHY_WRITE(sc, EXT_REG_DATA, data);
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PHY_WRITE(sc, EXT_REG_ADDR, oldaddr);
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/* end chip stuff */
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sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask;
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if (sc->mii_capabilities & BMSR_EXTSTAT)
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sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
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device_printf(dev, " ");
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mii_phy_add_media(sc);
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printf("\n");
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MIIBUS_MEDIAINIT(sc->mii_dev);
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return (0);
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}
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static device_method_t mcommphy_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, mcommphy_probe),
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DEVMETHOD(device_attach, mcommphy_attach),
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DEVMETHOD(device_detach, mii_phy_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD_END
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};
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static driver_t mcommphy_driver = {
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"mcommphy",
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mcommphy_methods,
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sizeof(struct mii_softc)
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};
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DRIVER_MODULE(mcommphy, miibus, mcommphy_driver, 0, 0);
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@ -63,6 +63,7 @@ oui JMICRON 0x00d831 JMicron Technologies
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oui LEVEL1 0x00207b Level 1
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oui MARVELL 0x005043 Marvell Semiconductor
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oui MICREL 0x0010a1 Micrel
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oui MOTORCOMM 0x000000 Motorcomm
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oui MYSON 0x00c0b4 Myson Technology
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oui NATSEMI 0x080017 National Semiconductor
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oui PMCSIERRA 0x00e004 PMC-Sierra
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@ -291,6 +292,9 @@ model MICREL KSZ8081 0x0016 Micrel KSZ8081 10/100 PHY
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model MICREL KSZ9021 0x0021 Micrel KSZ9021 10/100/1000 PHY
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model MICREL KSZ9031 0x0022 Micrel KSZ9031 10/100/1000 PHY
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/* Motorcomm PHYs */
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model MOTORCOMM YT8511 0x010a Motorcomm YT8511 10/100/1000 PHY
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/* Myson Technology PHYs */
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model xxMYSON MTD972 0x0000 MTD972 10/100 media interface
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model MYSON MTD803 0x0000 MTD803 3-in-1 media interface
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