Synchronize with following changes:
> Revision Changes Path > 1.250 +1 -18 src/sys/i386/i386/machdep.c > 1.48 +1 -7 src/sys/i386/conf/options.i386 > 1.251 +19 -46 src/sys/i386/i386/machdep.c > 1.24 +2 -6 src/sys/i386/i386/microtime.s > 1.100 +4 -15 src/sys/i386/i386/trap.c > 1.46 +6 -7 src/sys/i386/isa/npx.c
This commit is contained in:
KATO Takenori
parent
5603173abd
commit
879210125e
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=26843
@ -1,4 +1,4 @@
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# $Id: options.pc98,v 1.26 1997/06/04 10:29:17 kato Exp $
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# $Id: options.pc98,v 1.27 1997/06/06 13:07:18 kato Exp $
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BOUNCEPAGES opt_bounce.h
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USER_LDT
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MATH_EMULATE opt_math_emulate.h
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@ -40,12 +40,6 @@ NAPIC opt_smp.h
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NINTR opt_smp.h
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SMP_TIMER_NC opt_smp.h
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# These three are known to be broken, don't enable them.
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SMP_PRIVPAGES opt_smp_privpages.h
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SMP_AUTOSTART opt_smp_autostart.h
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SERIAL_DEBUG opt_serial.h
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AHC_TAGENABLE opt_aic7xxx.h
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AHC_SCBPAGING_ENABLE opt_aic7xxx.h
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AHC_ALLOW_MEMIO opt_aic7xxx.h
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@ -1,4 +1,4 @@
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# $Id: options.pc98,v 1.26 1997/06/04 10:29:17 kato Exp $
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# $Id: options.pc98,v 1.27 1997/06/06 13:07:18 kato Exp $
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BOUNCEPAGES opt_bounce.h
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USER_LDT
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MATH_EMULATE opt_math_emulate.h
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@ -40,12 +40,6 @@ NAPIC opt_smp.h
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NINTR opt_smp.h
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SMP_TIMER_NC opt_smp.h
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# These three are known to be broken, don't enable them.
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SMP_PRIVPAGES opt_smp_privpages.h
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SMP_AUTOSTART opt_smp_autostart.h
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SERIAL_DEBUG opt_serial.h
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AHC_TAGENABLE opt_aic7xxx.h
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AHC_SCBPAGING_ENABLE opt_aic7xxx.h
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AHC_ALLOW_MEMIO opt_aic7xxx.h
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@ -35,7 +35,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
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* $Id: machdep.c,v 1.44 1997/06/09 13:38:21 kato Exp $
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* $Id: machdep.c,v 1.45 1997/06/15 16:35:13 kato Exp $
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*/
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#include "apm.h"
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@ -229,12 +229,6 @@ cpu_startup(dummy)
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* Good {morning,afternoon,evening,night}.
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*/
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printf(version);
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#ifdef SMP
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#if defined(LATE_START)
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mp_start(); /* fire up the APs and APICs */
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#endif /* LATE_START */
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mp_announce();
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#endif /* SMP */
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earlysetcpuclass();
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startrtclock();
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printcpuinfo();
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@ -370,23 +364,6 @@ cpu_startup(dummy)
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u_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
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(maxproc*UPAGES*PAGE_SIZE), FALSE);
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#if defined(SMP) && defined(SMP_PRIVPAGES)
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/* Per-cpu pages.. (the story so far is... subject to change)
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* ========= For the per-cpu data page ========
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* 1 private data page
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* 1 PDE (per-cpu PTD entry page)
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* 1 PT (per-cpu page table page)
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* ============ For the idle loop =============
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* 2 UPAGEs (per-cpu idle procs)
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* 1 PTD (for per-cpu equiv of IdlePTD)
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* ============================================
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* = total of 6 pages per cpu. The BSP reuses the ones allocated
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* by locore.s during boot to remove special cases at runtime.
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*/
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ppage_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
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(NCPU*6*PAGE_SIZE), FALSE);
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#endif
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/*
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* Finally, allocate mbuf pool. Since mclrefcnt is an off-size
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* we use the more space efficient malloc in place of kmem_alloc.
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@ -430,6 +407,14 @@ cpu_startup(dummy)
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printf("avail memory = %d (%dK bytes)\n", ptoa(cnt.v_free_count),
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ptoa(cnt.v_free_count) / 1024);
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#ifdef SMP
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/*
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* OK, enough kmem_alloc/malloc state should be up, lets get on with it!
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*/
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mp_start(); /* fire up the APs and APICs */
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mp_announce();
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#endif /* SMP */
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/*
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* Set up buffers, so they can be used to read disk labels.
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*/
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@ -815,8 +800,7 @@ struct region_descriptor r_gdt, r_idt;
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#endif
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#ifdef SMP
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struct i386tss SMPcommon_tss[NCPU]; /* One tss per cpu */
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struct i386tss *SMPcommon_tss_ptr[NCPU]; /* for the benefit of asmp code */
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extern struct i386tss common_tss; /* One tss per cpu */
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#else
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struct i386tss common_tss;
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#endif
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@ -893,11 +877,7 @@ struct soft_segment_descriptor gdt_segs[
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0 /* limit granularity (byte/page units)*/ },
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/* GPROC0_SEL 6 Proc 0 Tss Descriptor */
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{
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#ifdef SMP
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(int) &SMPcommon_tss[0],/* segment base address */
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#else
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(int) &common_tss, /* segment base address */
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#endif
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sizeof(struct i386tss)-1,/* length - all address space */
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SDT_SYS386TSS, /* segment type */
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0, /* segment descriptor priority level */
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@ -1090,12 +1070,11 @@ init386(first)
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#ifdef SMP
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/*
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* Oh puke!
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* Spin these up now. init_secondary() grabs them. We could use
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* #for(x,y,z) / #endfor cpp directives if they existed.
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*/
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for (x = 0; x < NCPU; x++) {
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SMPcommon_tss_ptr[x] = &SMPcommon_tss[x];
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gdt_segs[NGDT + x] = gdt_segs[GPROC0_SEL];
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gdt_segs[NGDT + x].ssd_base = (int) SMPcommon_tss_ptr[x];
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ssdtosd(&gdt_segs[NGDT + x], &gdt[NGDT + x].sd);
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}
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#endif
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@ -1301,6 +1280,11 @@ init386(first)
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Maxmem = idp->id_msize / 4;
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#endif
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#ifdef SMP
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/* look for the MP hardware - needed for apic addresses */
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mp_probe();
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#endif
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/* call pmap initialization to make new kernel address space */
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pmap_bootstrap (first, 0);
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@ -1436,40 +1420,18 @@ init386(first)
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avail_end + off, VM_PROT_ALL, TRUE);
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msgbufmapped = 1;
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#ifdef SMP
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/* look for the MP hardware */
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mp_probe();
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/* make the initial tss so cpu can get interrupt stack on syscall! */
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for(x = 0; x < NCPU; x++) {
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SMPcommon_tss[x].tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE;
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SMPcommon_tss[x].tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
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SMPcommon_tss[x].tss_ioopt = (sizeof SMPcommon_tss[x]) << 16;
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}
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#if 0
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/** XXX FIXME:
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* We can't access the LOCAL APIC till mp_enable() runs. Since
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* this is run by the BSP, cpunumber() should always equal 0 anyway.
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*/
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gsel_tss = GSEL(NGDT + cpunumber(), SEL_KPL);
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#else
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gsel_tss = GSEL(NGDT /** + 0 */, SEL_KPL);
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#endif /** 0 */
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ltr(gsel_tss);
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#else
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/* make an initial tss so cpu can get interrupt stack on syscall! */
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common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE;
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common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
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common_tss.tss_ioopt = (sizeof common_tss) << 16;
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gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
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ltr(gsel_tss);
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#endif /* SMP */
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dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
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dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
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dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
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dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
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dblfault_tss.tss_cr3 = IdlePTD;
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dblfault_tss.tss_cr3 = (int)IdlePTD;
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dblfault_tss.tss_eip = (int) dblfault_handler;
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dblfault_tss.tss_eflags = PSL_KERNEL;
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dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs =
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@ -1503,14 +1465,8 @@ init386(first)
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/* setup proc 0's pcb */
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proc0.p_addr->u_pcb.pcb_flags = 0;
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proc0.p_addr->u_pcb.pcb_cr3 = IdlePTD;
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proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD;
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proc0.p_addr->u_pcb.pcb_mpnest = 1;
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#ifdef SMP
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#if !defined(LATE_START)
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mp_start(); /* fire up the APs and APICs */
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#endif /* LATE_START */
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#endif /* SMP */
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}
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int
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@ -32,14 +32,11 @@
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* SUCH DAMAGE.
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*
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* from: Steve McCanne's microtime code
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* $Id: microtime.s,v 1.9 1997/04/27 13:22:02 kato Exp $
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* $Id: microtime.s,v 1.10 1997/05/30 10:00:58 kato Exp $
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*/
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#include "opt_cpu.h"
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#ifdef APIC_IO
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#include <machine/apic.h>
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#endif /* APIC_IO */
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#include <machine/asmacros.h>
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#include <i386/isa/icu.h>
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@ -129,8 +126,7 @@ ENTRY(microtime)
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jbe 1f
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#if defined(APIC_IO)
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movl _apic_base, %eax
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movl APIC_IRR1(%eax), %eax /** XXX assumption: IRQ0-24 */
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movl lapic_irr1, %eax /** XXX assumption: IRQ0-24 */
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testl %eax, _mask8254 /* is a hard timer interrupt pending? */
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#else
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inb $IO_ICU1, %al /* read IRR in ICU */
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@ -35,7 +35,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)trap.c 7.4 (Berkeley) 5/13/91
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* $Id: trap.c,v 1.23 1997/06/02 15:45:32 kato Exp $
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* $Id: trap.c,v 1.24 1997/06/09 13:38:21 kato Exp $
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*/
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/*
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@ -87,11 +87,7 @@
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#include "isa.h"
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#include "npx.h"
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#ifdef SMP
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extern struct i386tss *SMPcommon_tss_ptr[];
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#else
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extern struct i386tss common_tss;
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#endif
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int (*pmath_emulate) __P((struct trapframe *));
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@ -754,7 +750,7 @@ trap_fatal(frame)
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type, trap_msg[type],
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ISPL(frame->tf_cs) == SEL_UPL ? "user" : "kernel");
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#ifdef SMP
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printf("cpunumber = %d\n", cpunumber());
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printf("cpuid = %d\n", cpuid);
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#endif
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if (type == T_PAGEFLT) {
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printf("fault virtual address = 0x%x\n", eva);
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@ -840,19 +836,12 @@ trap_fatal(frame)
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void
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dblfault_handler()
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{
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#ifdef SMP
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int x = cpunumber();
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#endif
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printf("\nFatal double fault:\n");
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#ifdef SMP
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printf("eip = 0x%x\n", SMPcommon_tss_ptr[x]->tss_eip);
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printf("esp = 0x%x\n", SMPcommon_tss_ptr[x]->tss_esp);
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printf("ebp = 0x%x\n", SMPcommon_tss_ptr[x]->tss_ebp);
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#else
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printf("eip = 0x%x\n", common_tss.tss_eip);
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printf("esp = 0x%x\n", common_tss.tss_esp);
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printf("ebp = 0x%x\n", common_tss.tss_ebp);
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#ifdef SMP
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printf("cpuid = %d\n", cpuid);
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#endif
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panic("double fault");
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}
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@ -35,7 +35,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
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* $Id: machdep.c,v 1.44 1997/06/09 13:38:21 kato Exp $
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* $Id: machdep.c,v 1.45 1997/06/15 16:35:13 kato Exp $
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*/
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#include "apm.h"
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@ -229,12 +229,6 @@ cpu_startup(dummy)
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* Good {morning,afternoon,evening,night}.
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*/
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printf(version);
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#ifdef SMP
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#if defined(LATE_START)
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mp_start(); /* fire up the APs and APICs */
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#endif /* LATE_START */
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mp_announce();
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#endif /* SMP */
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earlysetcpuclass();
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startrtclock();
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printcpuinfo();
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@ -370,23 +364,6 @@ cpu_startup(dummy)
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u_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
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(maxproc*UPAGES*PAGE_SIZE), FALSE);
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#if defined(SMP) && defined(SMP_PRIVPAGES)
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/* Per-cpu pages.. (the story so far is... subject to change)
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* ========= For the per-cpu data page ========
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* 1 private data page
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* 1 PDE (per-cpu PTD entry page)
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* 1 PT (per-cpu page table page)
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* ============ For the idle loop =============
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* 2 UPAGEs (per-cpu idle procs)
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* 1 PTD (for per-cpu equiv of IdlePTD)
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* ============================================
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* = total of 6 pages per cpu. The BSP reuses the ones allocated
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* by locore.s during boot to remove special cases at runtime.
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*/
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ppage_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
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(NCPU*6*PAGE_SIZE), FALSE);
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#endif
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|
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/*
|
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* Finally, allocate mbuf pool. Since mclrefcnt is an off-size
|
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* we use the more space efficient malloc in place of kmem_alloc.
|
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@ -430,6 +407,14 @@ cpu_startup(dummy)
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printf("avail memory = %d (%dK bytes)\n", ptoa(cnt.v_free_count),
|
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ptoa(cnt.v_free_count) / 1024);
|
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|
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#ifdef SMP
|
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/*
|
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* OK, enough kmem_alloc/malloc state should be up, lets get on with it!
|
||||
*/
|
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mp_start(); /* fire up the APs and APICs */
|
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mp_announce();
|
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#endif /* SMP */
|
||||
|
||||
/*
|
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* Set up buffers, so they can be used to read disk labels.
|
||||
*/
|
||||
@ -815,8 +800,7 @@ struct region_descriptor r_gdt, r_idt;
|
||||
#endif
|
||||
|
||||
#ifdef SMP
|
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struct i386tss SMPcommon_tss[NCPU]; /* One tss per cpu */
|
||||
struct i386tss *SMPcommon_tss_ptr[NCPU]; /* for the benefit of asmp code */
|
||||
extern struct i386tss common_tss; /* One tss per cpu */
|
||||
#else
|
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struct i386tss common_tss;
|
||||
#endif
|
||||
@ -893,11 +877,7 @@ struct soft_segment_descriptor gdt_segs[
|
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0 /* limit granularity (byte/page units)*/ },
|
||||
/* GPROC0_SEL 6 Proc 0 Tss Descriptor */
|
||||
{
|
||||
#ifdef SMP
|
||||
(int) &SMPcommon_tss[0],/* segment base address */
|
||||
#else
|
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(int) &common_tss, /* segment base address */
|
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#endif
|
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sizeof(struct i386tss)-1,/* length - all address space */
|
||||
SDT_SYS386TSS, /* segment type */
|
||||
0, /* segment descriptor priority level */
|
||||
@ -1090,12 +1070,11 @@ init386(first)
|
||||
|
||||
#ifdef SMP
|
||||
/*
|
||||
* Oh puke!
|
||||
* Spin these up now. init_secondary() grabs them. We could use
|
||||
* #for(x,y,z) / #endfor cpp directives if they existed.
|
||||
*/
|
||||
for (x = 0; x < NCPU; x++) {
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SMPcommon_tss_ptr[x] = &SMPcommon_tss[x];
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gdt_segs[NGDT + x] = gdt_segs[GPROC0_SEL];
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gdt_segs[NGDT + x].ssd_base = (int) SMPcommon_tss_ptr[x];
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ssdtosd(&gdt_segs[NGDT + x], &gdt[NGDT + x].sd);
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}
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#endif
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@ -1301,6 +1280,11 @@ init386(first)
|
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Maxmem = idp->id_msize / 4;
|
||||
#endif
|
||||
|
||||
#ifdef SMP
|
||||
/* look for the MP hardware - needed for apic addresses */
|
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mp_probe();
|
||||
#endif
|
||||
|
||||
/* call pmap initialization to make new kernel address space */
|
||||
pmap_bootstrap (first, 0);
|
||||
|
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@ -1436,40 +1420,18 @@ init386(first)
|
||||
avail_end + off, VM_PROT_ALL, TRUE);
|
||||
msgbufmapped = 1;
|
||||
|
||||
#ifdef SMP
|
||||
/* look for the MP hardware */
|
||||
mp_probe();
|
||||
|
||||
/* make the initial tss so cpu can get interrupt stack on syscall! */
|
||||
for(x = 0; x < NCPU; x++) {
|
||||
SMPcommon_tss[x].tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE;
|
||||
SMPcommon_tss[x].tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
|
||||
SMPcommon_tss[x].tss_ioopt = (sizeof SMPcommon_tss[x]) << 16;
|
||||
}
|
||||
#if 0
|
||||
/** XXX FIXME:
|
||||
* We can't access the LOCAL APIC till mp_enable() runs. Since
|
||||
* this is run by the BSP, cpunumber() should always equal 0 anyway.
|
||||
*/
|
||||
gsel_tss = GSEL(NGDT + cpunumber(), SEL_KPL);
|
||||
#else
|
||||
gsel_tss = GSEL(NGDT /** + 0 */, SEL_KPL);
|
||||
#endif /** 0 */
|
||||
ltr(gsel_tss);
|
||||
#else
|
||||
/* make an initial tss so cpu can get interrupt stack on syscall! */
|
||||
common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE;
|
||||
common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
|
||||
common_tss.tss_ioopt = (sizeof common_tss) << 16;
|
||||
gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
|
||||
ltr(gsel_tss);
|
||||
#endif /* SMP */
|
||||
|
||||
dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
|
||||
dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
|
||||
dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
|
||||
dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
|
||||
dblfault_tss.tss_cr3 = IdlePTD;
|
||||
dblfault_tss.tss_cr3 = (int)IdlePTD;
|
||||
dblfault_tss.tss_eip = (int) dblfault_handler;
|
||||
dblfault_tss.tss_eflags = PSL_KERNEL;
|
||||
dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs =
|
||||
@ -1503,14 +1465,8 @@ init386(first)
|
||||
|
||||
/* setup proc 0's pcb */
|
||||
proc0.p_addr->u_pcb.pcb_flags = 0;
|
||||
proc0.p_addr->u_pcb.pcb_cr3 = IdlePTD;
|
||||
proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD;
|
||||
proc0.p_addr->u_pcb.pcb_mpnest = 1;
|
||||
|
||||
#ifdef SMP
|
||||
#if !defined(LATE_START)
|
||||
mp_start(); /* fire up the APs and APICs */
|
||||
#endif /* LATE_START */
|
||||
#endif /* SMP */
|
||||
}
|
||||
|
||||
int
|
||||
|
||||
@ -32,7 +32,7 @@
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* from: @(#)npx.c 7.2 (Berkeley) 5/12/91
|
||||
* $Id: npx.c,v 1.19 1997/05/31 12:43:17 kato Exp $
|
||||
* $Id: npx.c,v 1.20 1997/06/02 15:45:40 kato Exp $
|
||||
*/
|
||||
|
||||
#include "npx.h"
|
||||
@ -63,6 +63,7 @@
|
||||
#include <machine/clock.h>
|
||||
#include <machine/specialreg.h>
|
||||
#if defined(APIC_IO)
|
||||
#include <machine/smp.h>
|
||||
#include <machine/apic.h>
|
||||
#include <machine/mpapic.h>
|
||||
#endif /* APIC_IO */
|
||||
@ -144,10 +145,8 @@ SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint,
|
||||
"Floatingpoint instructions executed in hardware");
|
||||
|
||||
static u_int npx0_imask = SWI_CLOCK_MASK;
|
||||
#ifdef SMP
|
||||
#define npxproc (SMPnpxproc[cpunumber()])
|
||||
struct proc *SMPnpxproc[NCPU];
|
||||
#else
|
||||
|
||||
#ifndef SMP /* XXX per-cpu on smp */
|
||||
struct proc *npxproc;
|
||||
#endif
|
||||
|
||||
@ -176,8 +175,8 @@ asm
|
||||
ss
|
||||
incl " __XSTRING(CNAME(npx_intrs_while_probing)) "
|
||||
pushl %eax
|
||||
movl " __XSTRING(CNAME(apic_base)) ",%eax # EOI to local APIC
|
||||
movl $0,0xb0(,%eax,1) # movl $0, APIC_EOI(%eax)
|
||||
movl $lapic_eoi,%eax # EOI to local APIC
|
||||
movl $0,(%eax) # movl $0, APIC_EOI(%eax)
|
||||
movb $0,%al
|
||||
#ifdef PC98
|
||||
outb %al,$0xf8 # clear BUSY# latch
|
||||
|
||||
Loading…
Reference in New Issue
Block a user