Add an EEPROM op that extracts out the power table offset.
It defaults to -5 dBm for eeproms earlier than v21. This apparently only applies to Merlin (AR9280) or later, earlier 11n chipsets have a power table offset of 0. All the code in ath9k which checks the power table offset and takes it into account first ensures the chip is Merlin or later.
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=219318
@ -100,6 +100,7 @@ enum {
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AR_EEP_ANTGAINMAX_5, /* int8_t* */
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AR_EEP_ANTGAINMAX_2, /* int8_t* */
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AR_EEP_WRITEPROTECT, /* use ath_hal_eepromGetFlag */
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AR_EEP_PWR_TABLE_OFFSET /* int8_t* */
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};
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typedef struct {
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@ -126,6 +126,13 @@ v14EepromGet(struct ath_hal *ah, int param, void *val)
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case AR_EEP_ANTGAINMAX_5:
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*(int8_t *) val = ee->ee_antennaGainMax[0];
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return HAL_OK;
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case AR_EEP_PWR_TABLE_OFFSET:
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if (IS_VERS(>=, AR5416_EEP_MINOR_VER_21))
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*(int8_t *) val = pBase->pwr_table_offset;
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else
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*(int8_t *) val = AR5416_PWR_TABLE_OFFSET_DB;
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return HAL_OK;
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default:
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HALASSERT(0);
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return HAL_EINVAL;
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