Support LSE atomics in the arm64 casue* functions
As with atomic(9) use the ARMv8.1 Large System Extension atomic instructions to implement the userspace compare and swap functions. Reviewed by: kib Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D35234
This commit is contained in:
Andrew Turner
parent
11a6ecd425
commit
88ac318759
@ -56,9 +56,9 @@ fsu_fault_nopcb:
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END(fsu_fault)
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/*
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* int casueword32(volatile uint32_t *, uint32_t, uint32_t *, uint32_t)
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* int casueword32_llsc(volatile uint32_t *, uint32_t, uint32_t *, uint32_t)
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*/
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ENTRY(casueword32)
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ENTRY(casueword32_llsc)
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check_user_access 0, (VM_MAXUSER_ADDRESS-3), fsu_fault_nopcb
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adr x6, fsu_fault /* Load the fault handler */
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mov w5, #1
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@ -73,12 +73,32 @@ ENTRY(casueword32)
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str w4, [x2] /* Store the read data */
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mov w0, w5 /* Result same as store status */
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ret /* Return */
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END(casueword32)
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END(casueword32_llsc)
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/*
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* int casueword(volatile u_long *, u_long, u_long *, u_long)
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* int casueword32_lse(volatile uint32_t *, uint32_t, uint32_t *, uint32_t)
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*/
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ENTRY(casueword)
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ENTRY(casueword32_lse)
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check_user_access 0, (VM_MAXUSER_ADDRESS-3), fsu_fault_nopcb
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adr x6, fsu_fault /* Load the fault handler */
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SET_FAULT_HANDLER(x6, x4) /* And set it */
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ENTER_USER_ACCESS(w6, x4)
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mov w7, w1 /* Back up the compare value */
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.arch_extension lse
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cas w1, w3, [x0] /* Compare and Swap */
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.arch_extension nolse
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cmp w1, w7 /* Check if successful */
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cset w0, ne /* Return 0 on success, 1 on failure */
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EXIT_USER_ACCESS(w6)
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SET_FAULT_HANDLER(xzr, x6) /* Reset the fault handler */
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str w1, [x2] /* Store the read data */
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ret /* Return */
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END(casueword32_lse)
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/*
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* int casueword_llsc(volatile u_long *, u_long, u_long *, u_long)
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*/
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ENTRY(casueword_llsc)
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check_user_access 0, (VM_MAXUSER_ADDRESS-7), fsu_fault_nopcb
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adr x6, fsu_fault /* Load the fault handler */
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mov w5, #1
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@ -93,7 +113,27 @@ ENTRY(casueword)
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str x4, [x2] /* Store the read data */
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mov w0, w5 /* Result same as store status */
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ret /* Return */
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END(casueword)
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END(casueword_llsc)
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/*
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* int casueword_lse(volatile u_long *, u_long, u_long *, u_long)
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*/
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ENTRY(casueword_lse)
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check_user_access 0, (VM_MAXUSER_ADDRESS-3), fsu_fault_nopcb
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adr x6, fsu_fault /* Load the fault handler */
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SET_FAULT_HANDLER(x6, x4) /* And set it */
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ENTER_USER_ACCESS(w6, x4)
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mov x7, x1 /* Back up the compare value */
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.arch_extension lse
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cas x1, x3, [x0] /* Compare and Swap */
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.arch_extension nolse
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cmp x1, x7 /* Check if successful */
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cset w0, ne /* Return 0 on success, 1 on failure */
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EXIT_USER_ACCESS(w6)
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SET_FAULT_HANDLER(xzr, x6) /* Reset the fault handler */
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str x1, [x2] /* Store the read data */
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ret /* Return */
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END(casueword_lse)
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.macro fsudata insn, ret_reg, user_arg
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adr x7, fsu_fault /* Load the fault handler */
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58
sys/arm64/arm64/support_ifunc.c
Normal file
58
sys/arm64/arm64/support_ifunc.c
Normal file
@ -0,0 +1,58 @@
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/*-
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* Copyright (c) 2022 The FreeBSD Foundation
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*
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* This software was developed by Andrew Turner under sponsorship from
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* the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <machine/atomic.h>
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#include <machine/ifunc.h>
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int casueword32_llsc(volatile uint32_t *, uint32_t, uint32_t *, uint32_t);
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int casueword32_lse(volatile uint32_t *, uint32_t, uint32_t *, uint32_t);
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int casueword_llsc(volatile u_long *, u_long, u_long *, u_long);
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int casueword_lse(volatile u_long *, u_long, u_long *, u_long);
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DEFINE_IFUNC(, int, casueword32, (volatile uint32_t *base, uint32_t oldval,
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uint32_t *oldvalp, uint32_t newval))
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{
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if (lse_supported)
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return (casueword32_lse);
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return (casueword32_llsc);
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}
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DEFINE_IFUNC(, int, casueword, (volatile u_long *base, u_long oldval,
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u_long *oldvalp, u_long newval))
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{
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if (lse_supported)
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return (casueword_lse);
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return (casueword_llsc);
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}
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@ -72,6 +72,7 @@ arm64/arm64/pmap.c standard
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arm64/arm64/ptrace_machdep.c standard
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arm64/arm64/sigtramp.S standard
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arm64/arm64/stack_machdep.c optional ddb | stack
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arm64/arm64/support_ifunc.c standard
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arm64/arm64/support.S standard
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arm64/arm64/swtch.S standard
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arm64/arm64/sys_machdep.c standard
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