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Add support for the Davicom DM9102A 10/100 ethernet controller chip.

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This is just to make sure we initialize the chip correctly: we need to
make the sure the port select bit in CSR6 is set properly so that we
use the internal PHY for 10/100 support. (The eval boards I have also
include an external HomePNA PHY, but I need to play with that more
before I can support it.)
This commit is contained in:
Bill Paul 2000-01-19 19:03:08 +00:00
parent 012e166b55
commit 88d739dc5f
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=56295
4 changed files with 46 additions and 10 deletions
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21
sys/dev/dc/if_dc.c
View File

@ -43,7 +43,7 @@
* ASIX Electronics AX88141 (www.asix.com.tw)
* ADMtek AL981 (www.admtek.com.tw)
* ADMtek AN985 (www.admtek.com.tw)
* Davicom DM9100, DM9102 (www.davicom8.com)
* Davicom DM9100, DM9102, DM9102A (www.davicom8.com)
*
* Datasheets for the 21143 are available at developer.intel.com.
* Datasheets for the clone parts can be found at their respective sites.
@ -160,6 +160,8 @@ static struct dc_type dc_devs[] = {
"Davicom DM9100 10/100BaseTX" },
{ DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102,
"Davicom DM9102 10/100BaseTX" },
{ DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102,
"Davicom DM9102A 10/100BaseTX" },
{ DC_VENDORID_ADMTEK, DC_DEVICEID_AL981,
"ADMtek AL981 10/100BaseTX" },
{ DC_VENDORID_ADMTEK, DC_DEVICEID_AN985,
@ -1168,7 +1170,8 @@ static void dc_setcfg(sc, media)
if (sc->dc_type == DC_TYPE_98713)
DC_SETBIT(sc, DC_NETCFG, (DC_NETCFG_PCS|
DC_NETCFG_SCRAMBLER));
DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
if (!DC_IS_DAVICOM(sc))
DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
DC_CLRBIT(sc, DC_10BTCTRL, 0xFFFF);
} else {
if (DC_IS_PNIC(sc)) {
@ -1190,7 +1193,8 @@ static void dc_setcfg(sc, media)
DC_NETCFG_PORTSEL|DC_NETCFG_SCRAMBLER));
if (sc->dc_type == DC_TYPE_98713)
DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PCS);
DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
if (!DC_IS_DAVICOM(sc))
DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
DC_CLRBIT(sc, DC_10BTCTRL, 0xFFFF);
} else {
if (DC_IS_PNIC(sc)) {
@ -1289,6 +1293,9 @@ static struct dc_type *dc_devtype(dev)
if (t->dc_did == DC_DEVICEID_82C168 &&
rev >= DC_REVISION_82C169)
t++;
if (t->dc_did == DC_DEVICEID_DM9102 &&
rev >= DC_REVISION_DM9102A)
t++;
return(t);
}
t++;
@ -1510,7 +1517,11 @@ static int dc_attach(dev)
}
/* Save the cache line size. */
sc->dc_cachesize = pci_read_config(dev, DC_PCI_CFLT, 4) & 0xFF;
if (DC_IS_DAVICOM(sc))
sc->dc_cachesize = 0;
else
sc->dc_cachesize = pci_read_config(dev,
DC_PCI_CFLT, 4) & 0xFF;
/* Reset the adapter. */
dc_reset(sc);
@ -2493,7 +2504,7 @@ static void dc_init(xsc)
/*
* Set cache alignment and burst length.
*/
if (DC_IS_ASIX(sc))
if (DC_IS_ASIX(sc) || DC_IS_DAVICOM(sc))
CSR_WRITE_4(sc, DC_BUSCTL, 0);
else
CSR_WRITE_4(sc, DC_BUSCTL, DC_BUSCTL_MRME|DC_BUSCTL_MRLE);

7
sys/dev/dc/if_dcreg.h
View File

@ -754,6 +754,13 @@ struct dc_softc {
#define DC_DEVICEID_DM9100 0x9100
#define DC_DEVICEID_DM9102 0x9102
/*
* The DM9102A has the same PCI device ID as the DM9102,
* but a higher revision code.
*/
#define DC_REVISION_DM9102 0x10
#define DC_REVISION_DM9102A 0x30
/*
* ADMtek vendor ID.
*/

21
sys/pci/if_dc.c
View File

@ -43,7 +43,7 @@
* ASIX Electronics AX88141 (www.asix.com.tw)
* ADMtek AL981 (www.admtek.com.tw)
* ADMtek AN985 (www.admtek.com.tw)
* Davicom DM9100, DM9102 (www.davicom8.com)
* Davicom DM9100, DM9102, DM9102A (www.davicom8.com)
*
* Datasheets for the 21143 are available at developer.intel.com.
* Datasheets for the clone parts can be found at their respective sites.
@ -160,6 +160,8 @@ static struct dc_type dc_devs[] = {
"Davicom DM9100 10/100BaseTX" },
{ DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102,
"Davicom DM9102 10/100BaseTX" },
{ DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102,
"Davicom DM9102A 10/100BaseTX" },
{ DC_VENDORID_ADMTEK, DC_DEVICEID_AL981,
"ADMtek AL981 10/100BaseTX" },
{ DC_VENDORID_ADMTEK, DC_DEVICEID_AN985,
@ -1168,7 +1170,8 @@ static void dc_setcfg(sc, media)
if (sc->dc_type == DC_TYPE_98713)
DC_SETBIT(sc, DC_NETCFG, (DC_NETCFG_PCS|
DC_NETCFG_SCRAMBLER));
DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
if (!DC_IS_DAVICOM(sc))
DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
DC_CLRBIT(sc, DC_10BTCTRL, 0xFFFF);
} else {
if (DC_IS_PNIC(sc)) {
@ -1190,7 +1193,8 @@ static void dc_setcfg(sc, media)
DC_NETCFG_PORTSEL|DC_NETCFG_SCRAMBLER));
if (sc->dc_type == DC_TYPE_98713)
DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PCS);
DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
if (!DC_IS_DAVICOM(sc))
DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
DC_CLRBIT(sc, DC_10BTCTRL, 0xFFFF);
} else {
if (DC_IS_PNIC(sc)) {
@ -1289,6 +1293,9 @@ static struct dc_type *dc_devtype(dev)
if (t->dc_did == DC_DEVICEID_82C168 &&
rev >= DC_REVISION_82C169)
t++;
if (t->dc_did == DC_DEVICEID_DM9102 &&
rev >= DC_REVISION_DM9102A)
t++;
return(t);
}
t++;
@ -1510,7 +1517,11 @@ static int dc_attach(dev)
}
/* Save the cache line size. */
sc->dc_cachesize = pci_read_config(dev, DC_PCI_CFLT, 4) & 0xFF;
if (DC_IS_DAVICOM(sc))
sc->dc_cachesize = 0;
else
sc->dc_cachesize = pci_read_config(dev,
DC_PCI_CFLT, 4) & 0xFF;
/* Reset the adapter. */
dc_reset(sc);
@ -2493,7 +2504,7 @@ static void dc_init(xsc)
/*
* Set cache alignment and burst length.
*/
if (DC_IS_ASIX(sc))
if (DC_IS_ASIX(sc) || DC_IS_DAVICOM(sc))
CSR_WRITE_4(sc, DC_BUSCTL, 0);
else
CSR_WRITE_4(sc, DC_BUSCTL, DC_BUSCTL_MRME|DC_BUSCTL_MRLE);

7
sys/pci/if_dcreg.h
View File

@ -754,6 +754,13 @@ struct dc_softc {
#define DC_DEVICEID_DM9100 0x9100
#define DC_DEVICEID_DM9102 0x9102
/*
* The DM9102A has the same PCI device ID as the DM9102,
* but a higher revision code.
*/
#define DC_REVISION_DM9102 0x10
#define DC_REVISION_DM9102A 0x30
/*
* ADMtek vendor ID.
*/