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o Remove __unused attribute on variables which actually used

Browse Source 
o Unmagic 'configuration done' bit
o Move probe() to place before attach() for better navigation
o Use bus_read_n instead of bus_space_read_n functions

Pointed out by:	andrew
Sponsored by:	DARPA, AFRL
This commit is contained in:
Ruslan Bukin 2014-09-06 18:08:21 +00:00
parent f021180bfb
commit 8aabb9719d
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=271200
2 changed files with 24 additions and 33 deletions
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18
sys/arm/altera/socfpga/socfpga_common.h
View File

@ -30,15 +30,9 @@
* $FreeBSD$
*/
#define READ4(_sc, _reg) \
bus_space_read_4(_sc->bst, _sc->bsh, _reg)
#define WRITE4(_sc, _reg, _val) \
bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val)
#define READ2(_sc, _reg) \
bus_space_read_2(_sc->bst, _sc->bsh, _reg)
#define WRITE2(_sc, _reg, _val) \
bus_space_write_2(_sc->bst, _sc->bsh, _reg, _val)
#define READ1(_sc, _reg) \
bus_space_read_1(_sc->bst, _sc->bsh, _reg)
#define WRITE1(_sc, _reg, _val) \
bus_space_write_1(_sc->bst, _sc->bsh, _reg, _val)
#define READ4(_sc, _reg) bus_read_4((_sc)->res[0], _reg)
#define READ2(_sc, _reg) bus_read_2((_sc)->res[0], _reg)
#define READ1(_sc, _reg) bus_read_1((_sc)->res[0], _reg)
#define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->res[0], _reg, _val)
#define WRITE2(_sc, _reg, _val) bus_write_2((_sc)->res[0], _reg, _val)
#define WRITE1(_sc, _reg, _val) bus_write_1((_sc)->res[0], _reg, _val)

39
sys/arm/altera/socfpga/socfpga_manager.c
View File

@ -91,6 +91,7 @@ __FBSDID("$FreeBSD$");
#define GPIO_PORTA_EOI 0x84C /* Clear Interrupt Register */
#define PORTA_EOI_NS (1 << 0)
#define GPIO_EXT_PORTA 0x850 /* External Port A Register */
#define EXT_PORTA_CDP (1 << 10) /* Configuration done */
#define GPIO_LS_SYNC 0x860 /* Synchronization Level Register */
#define GPIO_VER_ID_CODE 0x86C /* GPIO Version Register */
#define GPIO_CONFIG_REG2 0x870 /* Configuration Register 2 */
@ -147,8 +148,6 @@ static struct cfgmgr_mode cfgmgr_modes[] = {
struct fpgamgr_softc {
struct resource *res[3];
bus_space_tag_t bst;
bus_space_handle_t bsh;
bus_space_tag_t bst_data;
bus_space_handle_t bsh_data;
struct cdev *mgr_cdev;
@ -162,20 +161,6 @@ static struct resource_spec fpgamgr_spec[] = {
{ -1, 0 }
};
static int
fpgamgr_probe(device_t dev)
{
if (!ofw_bus_status_okay(dev))
return (ENXIO);
if (!ofw_bus_is_compatible(dev, "altr,fpga-mgr"))
return (ENXIO);
device_set_desc(dev, "FPGA Manager");
return (BUS_PROBE_DEFAULT);
}
static int
fpgamgr_state_get(struct fpgamgr_softc *sc)
{
@ -208,7 +193,7 @@ fpgamgr_state_wait(struct fpgamgr_softc *sc, int state)
}
static int
fpga_open(struct cdev *dev __unused, int flags __unused,
fpga_open(struct cdev *dev, int flags __unused,
int fmt __unused, struct thread *td __unused)
{
struct fpgamgr_softc *sc;
@ -310,7 +295,7 @@ fpga_wait_dclk_pulses(struct fpgamgr_softc *sc, int npulses)
}
static int
fpga_close(struct cdev *dev __unused, int flags __unused,
fpga_close(struct cdev *dev, int flags __unused,
int fmt __unused, struct thread *td __unused)
{
struct fpgamgr_softc *sc;
@ -319,7 +304,7 @@ fpga_close(struct cdev *dev __unused, int flags __unused,
sc = dev->si_drv1;
reg = READ4(sc, GPIO_EXT_PORTA);
if ((reg & (1 << 10)) == 0) {
if ((reg & EXT_PORTA_CDP) == 0) {
device_printf(sc->dev, "Err: configuration failed\n");
return (ENXIO);
}
@ -387,6 +372,20 @@ static struct cdevsw fpga_cdevsw = {
.d_name = "FPGA Manager",
};
static int
fpgamgr_probe(device_t dev)
{
if (!ofw_bus_status_okay(dev))
return (ENXIO);
if (!ofw_bus_is_compatible(dev, "altr,fpga-mgr"))
return (ENXIO);
device_set_desc(dev, "FPGA Manager");
return (BUS_PROBE_DEFAULT);
}
static int
fpgamgr_attach(device_t dev)
{
@ -401,8 +400,6 @@ fpgamgr_attach(device_t dev)
}
/* Memory interface */
sc->bst = rman_get_bustag(sc->res[0]);
sc->bsh = rman_get_bushandle(sc->res[0]);
sc->bst_data = rman_get_bustag(sc->res[1]);
sc->bsh_data = rman_get_bushandle(sc->res[1]);