Add the AR934x NAND flash controller register definitions.
Obtained from: OpenWRT
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=263295
177
sys/mips/atheros/ar934x_nfcreg.h
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sys/mips/atheros/ar934x_nfcreg.h
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/*
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* Copyright (c) 2014 Adrian Chadd <adrian@FreeBSD.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Register definitions for the built-in NAND controller
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* of the Atheros AR934x and QCA955x SoCs.
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*
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* This file is based on the AR934x SoC driver from OpenWRT.
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*
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* Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
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*
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* Used with permission.
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*/
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#ifndef __AR934X_NFCREG_H__
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#define __AR934X_NFCREG_H__
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#define BIT(x) (1 << (x))
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#define AR934X_NFC_REG_CMD 0x00
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#define AR934X_NFC_REG_CTRL 0x04
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#define AR934X_NFC_REG_STATUS 0x08
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#define AR934X_NFC_REG_INT_MASK 0x0c
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#define AR934X_NFC_REG_INT_STATUS 0x10
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#define AR934X_NFC_REG_ECC_CTRL 0x14
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#define AR934X_NFC_REG_ECC_OFFSET 0x18
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#define AR934X_NFC_REG_ADDR0_0 0x1c
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#define AR934X_NFC_REG_ADDR0_1 0x24
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#define AR934X_NFC_REG_ADDR1_0 0x20
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#define AR934X_NFC_REG_ADDR1_1 0x28
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#define AR934X_NFC_REG_SPARE_SIZE 0x30
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#define AR934X_NFC_REG_PROTECT 0x38
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#define AR934X_NFC_REG_LOOKUP_EN 0x40
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#define AR934X_NFC_REG_LOOKUP(_x) (0x44 + (_i) * 4)
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#define AR934X_NFC_REG_DMA_ADDR 0x64
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#define AR934X_NFC_REG_DMA_COUNT 0x68
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#define AR934X_NFC_REG_DMA_CTRL 0x6c
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#define AR934X_NFC_REG_MEM_CTRL 0x80
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#define AR934X_NFC_REG_DATA_SIZE 0x84
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#define AR934X_NFC_REG_READ_STATUS 0x88
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#define AR934X_NFC_REG_TIME_SEQ 0x8c
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#define AR934X_NFC_REG_TIMINGS_ASYN 0x90
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#define AR934X_NFC_REG_TIMINGS_SYN 0x94
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#define AR934X_NFC_REG_FIFO_DATA 0x98
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#define AR934X_NFC_REG_TIME_MODE 0x9c
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#define AR934X_NFC_REG_DMA_ADDR_OFFS 0xa0
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#define AR934X_NFC_REG_FIFO_INIT 0xb0
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#define AR934X_NFC_REG_GEN_SEQ_CTRL 0xb4
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#define AR934X_NFC_CMD_CMD_SEQ_S 0
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#define AR934X_NFC_CMD_CMD_SEQ_M 0x3f
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#define AR934X_NFC_CMD_SEQ_1C 0x00
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#define AR934X_NFC_CMD_SEQ_ERASE 0x0e
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#define AR934X_NFC_CMD_SEQ_12 0x0c
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#define AR934X_NFC_CMD_SEQ_1C1AXR 0x21
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#define AR934X_NFC_CMD_SEQ_S 0x24
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#define AR934X_NFC_CMD_SEQ_1C3AXR 0x27
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#define AR934X_NFC_CMD_SEQ_1C5A1CXR 0x2a
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#define AR934X_NFC_CMD_SEQ_18 0x32
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#define AR934X_NFC_CMD_INPUT_SEL_SIU 0
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#define AR934X_NFC_CMD_INPUT_SEL_DMA BIT(6)
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#define AR934X_NFC_CMD_ADDR_SEL_0 0
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#define AR934X_NFC_CMD_ADDR_SEL_1 BIT(7)
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#define AR934X_NFC_CMD_CMD0_S 8
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#define AR934X_NFC_CMD_CMD0_M 0xff
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#define AR934X_NFC_CMD_CMD1_S 16
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#define AR934X_NFC_CMD_CMD1_M 0xff
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#define AR934X_NFC_CMD_CMD2_S 24
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#define AR934X_NFC_CMD_CMD2_M 0xff
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#define AR934X_NFC_CTRL_ADDR_CYCLE0_M 0x7
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#define AR934X_NFC_CTRL_ADDR_CYCLE0_S 0
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#define AR934X_NFC_CTRL_SPARE_EN BIT(3)
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#define AR934X_NFC_CTRL_INT_EN BIT(4)
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#define AR934X_NFC_CTRL_ECC_EN BIT(5)
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#define AR934X_NFC_CTRL_BLOCK_SIZE_S 6
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#define AR934X_NFC_CTRL_BLOCK_SIZE_M 0x3
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#define AR934X_NFC_CTRL_BLOCK_SIZE_32 0
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#define AR934X_NFC_CTRL_BLOCK_SIZE_64 1
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#define AR934X_NFC_CTRL_BLOCK_SIZE_128 2
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#define AR934X_NFC_CTRL_BLOCK_SIZE_256 3
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#define AR934X_NFC_CTRL_PAGE_SIZE_S 8
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#define AR934X_NFC_CTRL_PAGE_SIZE_M 0x7
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#define AR934X_NFC_CTRL_PAGE_SIZE_256 0
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#define AR934X_NFC_CTRL_PAGE_SIZE_512 1
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#define AR934X_NFC_CTRL_PAGE_SIZE_1024 2
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#define AR934X_NFC_CTRL_PAGE_SIZE_2048 3
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#define AR934X_NFC_CTRL_PAGE_SIZE_4096 4
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#define AR934X_NFC_CTRL_PAGE_SIZE_8192 5
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#define AR934X_NFC_CTRL_PAGE_SIZE_16384 6
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#define AR934X_NFC_CTRL_CUSTOM_SIZE_EN BIT(11)
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#define AR934X_NFC_CTRL_IO_WIDTH_8BITS 0
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#define AR934X_NFC_CTRL_IO_WIDTH_16BITS BIT(12)
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#define AR934X_NFC_CTRL_LOOKUP_EN BIT(13)
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#define AR934X_NFC_CTRL_PROT_EN BIT(14)
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#define AR934X_NFC_CTRL_WORK_MODE_ASYNC 0
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#define AR934X_NFC_CTRL_WORK_MODE_SYNC BIT(15)
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#define AR934X_NFC_CTRL_ADDR0_AUTO_INC BIT(16)
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#define AR934X_NFC_CTRL_ADDR1_AUTO_INC BIT(17)
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#define AR934X_NFC_CTRL_ADDR_CYCLE1_M 0x7
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#define AR934X_NFC_CTRL_ADDR_CYCLE1_S 18
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#define AR934X_NFC_CTRL_SMALL_PAGE BIT(21)
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#define AR934X_NFC_DMA_CTRL_DMA_START BIT(7)
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#define AR934X_NFC_DMA_CTRL_DMA_DIR_WRITE 0
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#define AR934X_NFC_DMA_CTRL_DMA_DIR_READ BIT(6)
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#define AR934X_NFC_DMA_CTRL_DMA_MODE_SG BIT(5)
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#define AR934X_NFC_DMA_CTRL_DMA_BURST_S 2
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#define AR934X_NFC_DMA_CTRL_DMA_BURST_0 0
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#define AR934X_NFC_DMA_CTRL_DMA_BURST_1 1
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#define AR934X_NFC_DMA_CTRL_DMA_BURST_2 2
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#define AR934X_NFC_DMA_CTRL_DMA_BURST_3 3
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#define AR934X_NFC_DMA_CTRL_DMA_BURST_4 4
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#define AR934X_NFC_DMA_CTRL_DMA_BURST_5 5
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#define AR934X_NFC_DMA_CTRL_ERR_FLAG BIT(1)
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#define AR934X_NFC_DMA_CTRL_DMA_READY BIT(0)
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#define AR934X_NFC_INT_DEV_RDY(_x) BIT(4 + (_x))
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#define AR934X_NFC_INT_CMD_END BIT(1)
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#define AR934X_NFC_ECC_CTRL_ERR_THRES_S 8
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#define AR934X_NFC_ECC_CTRL_ERR_THRES_M 0x1f
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#define AR934X_NFC_ECC_CTRL_ECC_CAP_S 5
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#define AR934X_NFC_ECC_CTRL_ECC_CAP_M 0x7
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#define AR934X_NFC_ECC_CTRL_ECC_CAP_2 0
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#define AR934X_NFC_ECC_CTRL_ECC_CAP_4 1
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#define AR934X_NFC_ECC_CTRL_ECC_CAP_6 2
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#define AR934X_NFC_ECC_CTRL_ECC_CAP_8 3
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#define AR934X_NFC_ECC_CTRL_ECC_CAP_10 4
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#define AR934X_NFC_ECC_CTRL_ECC_CAP_12 5
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#define AR934X_NFC_ECC_CTRL_ECC_CAP_14 6
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#define AR934X_NFC_ECC_CTRL_ECC_CAP_16 7
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#define AR934X_NFC_ECC_CTRL_ERR_OVER BIT(2)
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#define AR934X_NFC_ECC_CTRL_ERR_UNCORRECT BIT(1)
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#define AR934X_NFC_ECC_CTRL_ERR_CORRECT BIT(0)
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#define AR934X_NFC_ECC_OFFS_OFSET_M 0xffff
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/* default timing values */
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#define AR934X_NFC_TIME_SEQ_DEFAULT 0x7fff
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#define AR934X_NFC_TIMINGS_ASYN_DEFAULT 0x22
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#define AR934X_NFC_TIMINGS_SYN_DEFAULT 0xf
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#define AR934X_NFC_ID_BUF_SIZE 8
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#define AR934X_NFC_DEV_READY_TIMEOUT 25 /* msecs */
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#define AR934X_NFC_DMA_READY_TIMEOUT 25 /* msecs */
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#define AR934X_NFC_DONE_TIMEOUT 1000
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#define AR934X_NFC_DMA_RETRIES 20
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#define AR934X_NFC_IRQ_MASK AR934X_NFC_INT_DEV_RDY(0)
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#define AR934X_NFC_GENSEQ_SMALL_PAGE_READ 0x30043
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#endif /* __AR934X_NFCREG_H__ */
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