lio: Quiet set but unused warnings.
- Remove unused variables. - Mark a value only used in debug traces as unused. - Remove variables only used for device register reads with side-effects with void casts on the read.
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@ -776,7 +776,7 @@ lio_get_uboot_version(struct octeon_device *oct)
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struct lio_console *console;
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int32_t bytes_read, total_read, tries;
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uint32_t console_num = 0;
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int i, ret = 0;
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int i, ret __unused = 0;
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ret = lio_console_send_cmd(oct, "setenv stdout pci", 50);
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@ -860,7 +860,6 @@ lio_download_firmware(struct octeon_device *oct, const uint8_t * data,
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struct lio_firmware_file_header *h;
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uint64_t load_addr;
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uint32_t crc32_result, i, image_len, rem;
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int ret = 0;
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if (size < sizeof(struct lio_firmware_file_header)) {
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lio_dev_err(oct, "Firmware file too small (%d < %d).\n",
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@ -936,6 +935,6 @@ lio_download_firmware(struct octeon_device *oct, const uint8_t * data,
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lio_dev_info(oct, "Writing boot command: %s\n", h->bootcmd);
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/* Invoke the bootcmd */
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ret = lio_console_send_cmd(oct, h->bootcmd, 50);
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lio_console_send_cmd(oct, h->bootcmd, 50);
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return (0);
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}
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@ -905,7 +905,7 @@ uint64_t
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lio_pci_readq(struct octeon_device *oct, uint64_t addr)
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{
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uint64_t val64;
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volatile uint32_t val32, addrhi;
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volatile uint32_t addrhi;
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mtx_lock(&oct->pci_win_lock);
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@ -919,11 +919,11 @@ lio_pci_readq(struct octeon_device *oct, uint64_t addr)
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lio_write_csr32(oct, oct->reg_list.pci_win_rd_addr_hi, addrhi);
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/* Read back to preserve ordering of writes */
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val32 = lio_read_csr32(oct, oct->reg_list.pci_win_rd_addr_hi);
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(void)lio_read_csr32(oct, oct->reg_list.pci_win_rd_addr_hi);
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lio_write_csr32(oct, oct->reg_list.pci_win_rd_addr_lo,
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addr & 0xffffffff);
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val32 = lio_read_csr32(oct, oct->reg_list.pci_win_rd_addr_lo);
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(void)lio_read_csr32(oct, oct->reg_list.pci_win_rd_addr_lo);
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val64 = lio_read_csr64(oct, oct->reg_list.pci_win_rd_data);
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@ -935,7 +935,6 @@ lio_pci_readq(struct octeon_device *oct, uint64_t addr)
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void
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lio_pci_writeq(struct octeon_device *oct, uint64_t val, uint64_t addr)
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{
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volatile uint32_t val32;
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mtx_lock(&oct->pci_win_lock);
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@ -944,7 +943,7 @@ lio_pci_writeq(struct octeon_device *oct, uint64_t val, uint64_t addr)
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/* The write happens when the LSB is written. So write MSB first. */
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lio_write_csr32(oct, oct->reg_list.pci_win_wr_data_hi, val >> 32);
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/* Read the MSB to ensure ordering of writes. */
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val32 = lio_read_csr32(oct, oct->reg_list.pci_win_wr_data_hi);
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(void)lio_read_csr32(oct, oct->reg_list.pci_win_wr_data_hi);
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lio_write_csr32(oct, oct->reg_list.pci_win_wr_data_lo,
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val & 0xffffffff);
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@ -406,7 +406,6 @@ lio_process_iq_request_list(struct octeon_device *oct,
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{
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struct lio_soft_command *sc;
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struct octeon_instr_irh *irh = NULL;
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struct lio_mbuf_free_info *finfo;
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void *buf;
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uint32_t inst_count = 0;
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uint32_t old = iq->flush_index;
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@ -415,7 +414,6 @@ lio_process_iq_request_list(struct octeon_device *oct,
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while (old != iq->octeon_read_index) {
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reqtype = iq->request_list[old].reqtype;
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buf = iq->request_list[old].buf;
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finfo = buf;
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if (reqtype == LIO_REQTYPE_NONE)
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goto skip_this;
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@ -632,7 +630,6 @@ lio_prepare_soft_command(struct octeon_device *oct, struct lio_soft_command *sc,
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uint8_t opcode, uint8_t subcode, uint32_t irh_ossp,
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uint64_t ossp0, uint64_t ossp1)
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{
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struct lio_config *lio_cfg;
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struct octeon_instr_ih3 *ih3;
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struct octeon_instr_pki_ih3 *pki_ih3;
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struct octeon_instr_irh *irh;
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@ -641,8 +638,6 @@ lio_prepare_soft_command(struct octeon_device *oct, struct lio_soft_command *sc,
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KASSERT(opcode <= 15, ("%s, %d, opcode > 15", __func__, __LINE__));
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KASSERT(subcode <= 127, ("%s, %d, opcode > 127", __func__, __LINE__));
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lio_cfg = lio_get_conf(oct);
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if (LIO_CN23XX_PF(oct)) {
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ih3 = (struct octeon_instr_ih3 *)&sc->cmd.cmd3.ih3;
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@ -795,11 +795,10 @@ static int
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lio_chip_specific_setup(struct octeon_device *oct)
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{
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char *s;
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uint32_t dev_id, rev_id;
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uint32_t dev_id;
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int ret = 1;
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dev_id = lio_read_pci_cfg(oct, 0);
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rev_id = pci_get_revid(oct->device);
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oct->subdevice_id = pci_get_subdevice(oct->device);
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switch (dev_id) {
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