Import device-tree files from Linux 6.2

Sponsored by: Beckhoff Automation GmbH & Co. KG
2023-08-09 15:29:14 +02:00 · 2023-08-09 15:29:14 +02:00 · 8bab661a33
commit 8bab661a33
parent 7ef62cebc2 c227958a72
2054 changed files with 85012 additions and 15625 deletions
--- a/sys/contrib/device-tree/Bindings/.gitignore
+++ b/sys/contrib/device-tree/Bindings/.gitignore
@ -2,3 +2,8 @@
 *.example.dts
 /processed-schema*.yaml
 /processed-schema*.json
+
+#
+# We don't want to ignore the following even if they are dot-files
+#
+!.yamllint
--- a/sys/contrib/device-tree/Bindings/arm/amlogic.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/amlogic.yaml
@ -163,6 +163,7 @@ properties:
              - azw,gsking-x
              - azw,gtking
              - azw,gtking-pro
+              - hardkernel,odroid-go-ultra
              - hardkernel,odroid-n2
              - hardkernel,odroid-n2-plus
              - khadas,vim3
--- a/sys/contrib/device-tree/Bindings/arm/apple.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/apple.yaml
@ -19,12 +19,14 @@ description: |
  - MacBook Air (M1, 2020)
  - iMac (24-inch, M1, 2021)

-  And devices based on the "M1 Pro" and "M1 Max" SoCs:
+  And devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs:

  - MacBook Pro (14-inch, M1 Pro, 2021)
  - MacBook Pro (14-inch, M1 Max, 2021)
  - MacBook Pro (16-inch, M1 Pro, 2021)
  - MacBook Pro (16-inch, M1 Max, 2021)
+  - Mac Studio (M1 Max, 2022)
+  - Mac Studio (M1 Ultra, 2022)

  The compatible property should follow this format:

@ -67,6 +69,7 @@ properties:
              - apple,j457 # iMac (24-inch, 2x USB-C, M1, 2021)
          - const: apple,t8103
          - const: apple,arm-platform
+
      - description: Apple M1 Pro SoC based platforms
        items:
          - enum:
@ -74,14 +77,23 @@ properties:
              - apple,j316s # MacBook Pro (16-inch, M1 Pro, 2021)
          - const: apple,t6000
          - const: apple,arm-platform
+
      - description: Apple M1 Max SoC based platforms
        items:
          - enum:
              - apple,j314c # MacBook Pro (14-inch, M1 Max, 2021)
              - apple,j316c # MacBook Pro (16-inch, M1 Max, 2021)
+              - apple,j375c # Mac Studio (M1 Max, 2022)
          - const: apple,t6001
          - const: apple,arm-platform

+      - description: Apple M1 Ultra SoC based platforms
+        items:
+          - enum:
+              - apple,j375d # Mac Studio (M1 Ultra, 2022)
+          - const: apple,t6002
+          - const: apple,arm-platform
+
 additionalProperties: true

 ...
--- a/sys/contrib/device-tree/Bindings/arm/aspeed/aspeed.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/aspeed/aspeed.yaml
@ -17,6 +17,7 @@ properties:
      - description: AST2400 based boards
        items:
          - enum:
+              - delta,ahe50dc-bmc
              - facebook,galaxy100-bmc
              - facebook,wedge100-bmc
              - facebook,wedge40-bmc
@ -82,7 +83,7 @@ properties:
              - ibm,tacoma-bmc
              - inventec,transformer-bmc
              - jabil,rbp-bmc
-              - nuvia,dc-scm-bmc
+              - qcom,dc-scm-v1-bmc
              - quanta,s6q-bmc
          - const: aspeed,ast2600

--- a/sys/contrib/device-tree/Bindings/arm/bcm/bcm2835.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/bcm/bcm2835.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/bcm/bcm2835.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Broadcom BCM2711/BCM2835 Platforms Device Tree Bindings
+title: Broadcom BCM2711/BCM2835 Platforms

 maintainers:
  - Eric Anholt <eric@anholt.net>
--- a/sys/contrib/device-tree/Bindings/arm/bcm/brcm,bcm11351.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/bcm/brcm,bcm11351.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/bcm/brcm,bcm11351.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Broadcom BCM11351 device tree bindings
+title: Broadcom BCM11351

 maintainers:
  - Florian Fainelli <f.fainelli@gmail.com>
--- a/sys/contrib/device-tree/Bindings/arm/bcm/brcm,bcm21664.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/bcm/brcm,bcm21664.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/bcm/brcm,bcm21664.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Broadcom BCM21664 device tree bindings
+title: Broadcom BCM21664

 maintainers:
  - Florian Fainelli <f.fainelli@gmail.com>
--- a/sys/contrib/device-tree/Bindings/arm/bcm/brcm,bcm23550.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/bcm/brcm,bcm23550.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/bcm/brcm,bcm23550.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Broadcom BCM23550 device tree bindings
+title: Broadcom BCM23550

 maintainers:
  - Florian Fainelli <f.fainelli@gmail.com>
--- a/sys/contrib/device-tree/Bindings/arm/bcm/brcm,bcm4708.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/bcm/brcm,bcm4708.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4708.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Broadcom BCM4708 device tree bindings
+title: Broadcom BCM4708

 description:
  Broadcom BCM4708/47081/4709/47094/53012 Wi-Fi/network SoCs based
@ -66,6 +66,7 @@ properties:
          - enum:
              - asus,rt-ac88u
              - dlink,dir-885l
+              - dlink,dir-890l
              - linksys,panamera
              - luxul,abr-4500-v1
              - luxul,xap-1610-v1
@ -97,6 +98,7 @@ properties:
      - description: BCM53016 based boards
        items:
          - enum:
+              - dlink,dwl-8610ap
              - meraki,mr32
          - const: brcm,bcm53016
          - const: brcm,bcm4708
--- a/sys/contrib/device-tree/Bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/bcm/brcm,bcmbca.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/bcm/brcm,bcmbca.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Broadcom Broadband SoC device tree bindings
+title: Broadcom Broadband SoC

 description:
  Broadcom Broadband SoCs include family of high performance DSL/PON/Wireless
--- a/sys/contrib/device-tree/Bindings/arm/bcm/brcm,cygnus.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/bcm/brcm,cygnus.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/bcm/brcm,cygnus.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Broadcom Cygnus device tree bindings
+title: Broadcom Cygnus

 maintainers:
  - Ray Jui <rjui@broadcom.com>
--- a/sys/contrib/device-tree/Bindings/arm/bcm/brcm,hr2.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/bcm/brcm,hr2.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/bcm/brcm,hr2.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Broadcom Hurricane 2 device tree bindings
+title: Broadcom Hurricane 2

 description:
  Broadcom Hurricane 2 family of SoCs are used for switching control. These SoCs
--- a/sys/contrib/device-tree/Bindings/arm/bcm/brcm,ns2.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/bcm/brcm,ns2.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/bcm/brcm,ns2.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Broadcom North Star 2 (NS2) device tree bindings
+title: Broadcom North Star 2 (NS2)

 maintainers:
  - Ray Jui <rjui@broadcom.com>
--- a/sys/contrib/device-tree/Bindings/arm/bcm/brcm,nsp.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/bcm/brcm,nsp.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/bcm/brcm,nsp.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Broadcom Northstar Plus device tree bindings
+title: Broadcom Northstar Plus

 description:
  Broadcom Northstar Plus family of SoCs are used for switching control
--- a/sys/contrib/device-tree/Bindings/arm/bcm/brcm,stingray.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/bcm/brcm,stingray.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/bcm/brcm,stingray.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Broadcom Stingray device tree bindings
+title: Broadcom Stingray

 maintainers:
  - Ray Jui <rjui@broadcom.com>
--- a/sys/contrib/device-tree/Bindings/arm/bcm/brcm,vulcan-soc.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/bcm/brcm,vulcan-soc.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/bcm/brcm,vulcan-soc.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Broadcom Vulcan device tree bindings
+title: Broadcom Vulcan

 maintainers:
  - Robert Richter <rrichter@marvell.com>
--- a/sys/contrib/device-tree/Bindings/arm/cci-control-port.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/cci-control-port.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/cci-control-port.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: CCI Interconnect Bus Masters binding
+title: CCI Interconnect Bus Masters

 maintainers:
  - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
--- a/sys/contrib/device-tree/Bindings/arm/cpus.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/cpus.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/cpus.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: ARM CPUs bindings
+title: ARM CPUs

 maintainers:
  - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
@ -178,11 +178,13 @@ properties:
      - qcom,kryo250
      - qcom,kryo260
      - qcom,kryo280
+      - qcom,kryo360
      - qcom,kryo385
      - qcom,kryo468
      - qcom,kryo485
      - qcom,kryo560
      - qcom,kryo570
+      - qcom,kryo660
      - qcom,kryo685
      - qcom,kryo780
      - qcom,scorpion
--- a/sys/contrib/device-tree/Bindings/arm/firmware/linaro,optee-tz.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/firmware/linaro,optee-tz.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/firmware/linaro,optee-tz.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: OP-TEE Device Tree Bindings
+title: OP-TEE

 maintainers:
  - Jens Wiklander <jens.wiklander@linaro.org>
--- a/sys/contrib/device-tree/Bindings/arm/fsl.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/fsl.yaml
@ -520,6 +520,7 @@ properties:
        items:
          - enum:
              - fsl,imx6sl-evk            # i.MX6 SoloLite EVK Board
+              - kobo,aura2
              - kobo,tolino-shine2hd
              - kobo,tolino-shine3
              - kobo,tolino-vision5
@ -814,6 +815,7 @@ properties:
          - enum:
              - beacon,imx8mm-beacon-kit  # i.MX8MM Beacon Development Kit
              - boundary,imx8mm-nitrogen8mm  # i.MX8MM Nitrogen Board
+              - cloos,imx8mm-phg          # i.MX8MM Cloos PHG Board
              - dmo,imx8mm-data-modul-edm-sbc # i.MX8MM eDM SBC
              - emtrion,emcon-mx8mm-avari # emCON-MX8MM SoM on Avari Base
              - fsl,imx8mm-ddr4-evk       # i.MX8MM DDR4 EVK Board
@ -825,6 +827,7 @@ properties:
              - gw,imx8mm-gw7901          # i.MX8MM Gateworks Board
              - gw,imx8mm-gw7902          # i.MX8MM Gateworks Board
              - gw,imx8mm-gw7903          # i.MX8MM Gateworks Board
+              - innocomm,wb15-evk         # i.MX8MM Innocomm EVK board with WB15 SoM
              - kontron,imx8mm-sl         # i.MX8MM Kontron SL (N801X) SOM
              - kontron,imx8mm-osm-s      # i.MX8MM Kontron OSM-S (N802X) SOM
              - menlo,mx8menlo            # i.MX8MM Menlo board with Verdin SoM
@ -1067,6 +1070,18 @@ properties:
              - fsl,imx93-11x11-evk       # i.MX93 11x11 EVK Board
          - const: fsl,imx93

+      - description: i.MXRT1050 based Boards
+        items:
+          - enum:
+              - fsl,imxrt1050-evk         # i.MXRT1050 EVK Board
+          - const: fsl,imxrt1050
+
+      - description: i.MXRT1170 based Boards
+        items:
+          - enum:
+              - fsl,imxrt1170-evk         # i.MXRT1170 EVK Board
+          - const: fsl,imxrt1170
+
      - description:
          Freescale Vybrid Platform Device Tree Bindings

--- a/sys/contrib/device-tree/Bindings/arm/hisilicon/hisilicon.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/hisilicon/hisilicon.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/hisilicon/hisilicon.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Hisilicon Platforms Device Tree Bindings
+title: Hisilicon Platforms

 maintainers:
  - Wei Xu <xuwei5@hisilicon.com>
--- a/sys/contrib/device-tree/Bindings/arm/keystone/ti,k3-sci-common.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/keystone/ti,k3-sci-common.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/keystone/ti,k3-sci-common.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Common K3 TI-SCI bindings
+title: Common K3 TI-SCI

 maintainers:
  - Nishanth Menon <nm@ti.com>
--- a/sys/contrib/device-tree/Bindings/arm/keystone/ti,sci.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/keystone/ti,sci.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/keystone/ti,sci.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: TI-SCI controller device node bindings
+title: TI-SCI controller

 maintainers:
  - Nishanth Menon <nm@ti.com>
--- a/sys/contrib/device-tree/Bindings/arm/marvell/armada-7k-8k.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/marvell/armada-7k-8k.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/marvell/armada-7k-8k.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Marvell Armada 7K/8K Platforms Device Tree Bindings
+title: Marvell Armada 7K/8K Platforms

 maintainers:
  - Gregory CLEMENT <gregory.clement@bootlin.com>
--- a/sys/contrib/device-tree/Bindings/arm/mediatek.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/mediatek.yaml
@ -58,6 +58,7 @@ properties:
      - items:
          - enum:
              - mediatek,mt6795-evb
+              - sony,xperia-m5
          - const: mediatek,mt6795
      - items:
          - enum:
@ -83,6 +84,7 @@ properties:
          - const: mediatek,mt7629
      - items:
          - enum:
+              - bananapi,bpi-r3
              - mediatek,mt7986a-rfb
          - const: mediatek,mt7986a
      - items:
--- a/sys/contrib/device-tree/Bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/mediatek/mediatek,mmsys.yaml
@ -32,14 +32,26 @@ properties:
              - mediatek,mt8183-mmsys
              - mediatek,mt8186-mmsys
              - mediatek,mt8192-mmsys
-              - mediatek,mt8195-mmsys
              - mediatek,mt8365-mmsys
          - const: syscon
+
+      - description: vdosys0 and vdosys1 are 2 display HW pipelines,
+                     so mt8195 binding should be deprecated.
+        deprecated: true
+        items:
+          - const: mediatek,mt8195-mmsys
+          - const: syscon
+
      - items:
          - const: mediatek,mt7623-mmsys
          - const: mediatek,mt2701-mmsys
          - const: syscon

+      - items:
+          - const: mediatek,mt8195-vdosys0
+          - const: mediatek,mt8195-mmsys
+          - const: syscon
+
  reg:
    maxItems: 1

--- a/sys/contrib/device-tree/Bindings/arm/mediatek/mediatek,mt7622-wed.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/mediatek/mediatek,mt7622-wed.yaml
@ -29,6 +29,38 @@ properties:
  interrupts:
    maxItems: 1

+  memory-region:
+    items:
+      - description: firmware EMI region
+      - description: firmware ILM region
+      - description: firmware DLM region
+      - description: firmware CPU DATA region
+      - description: firmware BOOT region
+
+  memory-region-names:
+    items:
+      - const: wo-emi
+      - const: wo-ilm
+      - const: wo-dlm
+      - const: wo-data
+      - const: wo-boot
+
+  mediatek,wo-ccif:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: mediatek wed-wo controller interface.
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: mediatek,mt7622-wed
+    then:
+      properties:
+        memory-region-names: false
+        memory-region: false
+        mediatek,wo-ccif: false
+
 required:
  - compatible
  - reg
@ -49,3 +81,23 @@ examples:
        interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_LOW>;
      };
    };
+
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    soc {
+      #address-cells = <2>;
+      #size-cells = <2>;
+
+      wed@15010000 {
+        compatible = "mediatek,mt7986-wed", "syscon";
+        reg = <0 0x15010000 0 0x1000>;
+        interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
+
+        memory-region = <&wo_emi>, <&wo_ilm>, <&wo_dlm>,
+                        <&wo_data>, <&wo_boot>;
+        memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
+                              "wo-data", "wo-boot";
+        mediatek,wo-ccif = <&wo_ccif0>;
+      };
+    };
--- a/sys/contrib/device-tree/Bindings/arm/mrvl/mrvl.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/mrvl/mrvl.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/mrvl/mrvl.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Marvell Platforms Device Tree Bindings
+title: Marvell Platforms

 maintainers:
  - Lubomir Rintel <lkundrak@v3.sk>
--- a/sys/contrib/device-tree/Bindings/arm/msm/qcom,llcc.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/msm/qcom,llcc.yaml
@ -31,6 +31,7 @@ properties:
      - qcom,sm8250-llcc
      - qcom,sm8350-llcc
      - qcom,sm8450-llcc
+      - qcom,sm8550-llcc

  reg:
    items:
--- a/sys/contrib/device-tree/Bindings/arm/mstar/mstar.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/mstar/mstar.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/mstar/mstar.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: MStar platforms device tree bindings
+title: MStar platforms

 maintainers:
  - Daniel Palmer <daniel@thingy.jp>
--- a/sys/contrib/device-tree/Bindings/arm/npcm/npcm.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/npcm/npcm.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/npcm/npcm.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: NPCM Platforms Device Tree Bindings
+title: NPCM Platforms

 maintainers:
  - Jonathan Neuschäfer <j.neuschaefer@gmx.net>
--- a/sys/contrib/device-tree/Bindings/arm/nxp/lpc32xx.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/nxp/lpc32xx.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/nxp/lpc32xx.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: NXP LPC32xx Platforms Device Tree Bindings
+title: NXP LPC32xx Platforms

 maintainers:
  - Roland Stigge <stigge@antcom.de>
--- a/sys/contrib/device-tree/Bindings/arm/qcom-soc.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/qcom-soc.yaml
@ -0,0 +1,66 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/qcom-soc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SoC compatibles naming convention
+
+maintainers:
+  - Bjorn Andersson <andersson@kernel.org>
+
+description: |
+  Guidelines for new compatibles for SoC blocks/components.
+  When adding new compatibles in new bindings, use the format::
+    qcom,SoC-IP
+
+  For example::
+   qcom,sdm845-llcc-bwmon
+
+  When adding new compatibles to existing bindings, use the format in the
+  existing binding, even if it contradicts the above.
+
+select:
+  properties:
+    compatible:
+      pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
+  required:
+    - compatible
+
+properties:
+  compatible:
+    oneOf:
+      # Preferred naming style for compatibles of SoC components:
+      - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+-.*$"
+      - pattern: "^qcom,(sa|sc)8[0-9]+[a-z][a-z]?-.*$"
+
+      # Legacy namings - variations of existing patterns/compatibles are OK,
+      # but do not add completely new entries to these:
+      - pattern: "^qcom,[ak]pss-wdt-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
+      - pattern: "^qcom,gcc-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
+      - pattern: "^qcom,mmcc-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
+      - pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
+      - pattern: "^qcom,rpm-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
+      - pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
+      - enum:
+          - qcom,dsi-ctrl-6g-qcm2290
+          - qcom,gpucc-sdm630
+          - qcom,gpucc-sdm660
+          - qcom,lcc-apq8064
+          - qcom,lcc-ipq8064
+          - qcom,lcc-mdm9615
+          - qcom,lcc-msm8960
+          - qcom,lpass-cpu-apq8016
+          - qcom,usb-ss-ipq4019-phy
+          - qcom,usb-hs-ipq4019-phy
+          - qcom,vqmmc-ipq4019-regulator
+
+      # Legacy compatibles with wild-cards - list cannot grow with new bindings:
+      - enum:
+          - qcom,ipq806x-gmac
+          - qcom,ipq806x-nand
+          - qcom,ipq806x-sata-phy
+          - qcom,ipq806x-usb-phy-ss
+          - qcom,ipq806x-usb-phy-hs
+
+additionalProperties: true
--- a/sys/contrib/device-tree/Bindings/arm/qcom.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/qcom.yaml
@ -29,17 +29,22 @@ description: |
        apq8074
        apq8084
        apq8096
+        ipq4018
        ipq6018
        ipq8074
        mdm9615
        msm8226
        msm8916
+        msm8956
        msm8974
+        msm8976
        msm8992
        msm8994
        msm8996
        msm8998
        qcs404
+        qdu1000
+        qru1000
        sa8155p
        sa8540p
        sc7180
@ -51,11 +56,15 @@ description: |
        sdm632
        sdm636
        sdm660
+        sdm670
        sdm845
        sdx55
        sdx65
+        sm4250
+        sm6115
        sm6125
        sm6350
+        sm6375
        sm7225
        sm8150
        sm8250
@ -76,6 +85,7 @@ description: |
        mtp
        qrd
        sbc
+        x100

  The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor>
  where the minor number may be omitted when it's zero, i.e.  v1.0 is the same
@ -114,7 +124,9 @@ properties:
      - items:
          - enum:
              - asus,sparrow
+              - huawei,sturgeon
              - lg,lenok
+              - samsung,matisse-wifi
          - const: qcom,apq8026

      - items:
@ -148,6 +160,12 @@ properties:
              - samsung,s3ve3g
          - const: qcom,msm8226

+      - items:
+          - enum:
+              - sony,kugo-row
+              - sony,suzu-row
+          - const: qcom,msm8956
+
      - items:
          - enum:
              - qcom,msm8960-cdp
@ -155,14 +173,20 @@ properties:

      - items:
          - enum:
-              - fairphone,fp2
              - lge,hammerhead
-              - samsung,klte
              - sony,xperia-amami
-              - sony,xperia-castor
              - sony,xperia-honami
          - const: qcom,msm8974

+      - items:
+          - enum:
+              - fairphone,fp2
+              - oneplus,bacon
+              - samsung,klte
+              - sony,xperia-castor
+          - const: qcom,msm8974pro
+          - const: qcom,msm8974
+
      - items:
          - const: qcom,msm8916-mtp
          - const: qcom,msm8916-mtp/1
@ -221,13 +245,20 @@ properties:

      - items:
          - enum:
+              - oneplus,oneplus3
+              - oneplus,oneplus3t
              - qcom,msm8996-mtp
              - sony,dora-row
              - sony,kagura-row
              - sony,keyaki-row
              - xiaomi,gemini
+          - const: qcom,msm8996
+
+      - items:
+          - enum:
              - xiaomi,natrium
              - xiaomi,scorpio
+          - const: qcom,msm8996pro
          - const: qcom,msm8996

      - items:
@ -242,8 +273,15 @@ properties:
              - sony,xperia-lilac
              - sony,xperia-maple
              - sony,xperia-poplar
+              - xiaomi,sagit
          - const: qcom,msm8998

+      - items:
+          - enum:
+              - 8dev,jalapeno
+              - alfa-network,ap120c-ac
+          - const: qcom,ipq4018
+
      - items:
          - enum:
              - qcom,ipq4019-ap-dk01.1-c1
@ -255,6 +293,7 @@ properties:

      - items:
          - enum:
+              - mikrotik,rb3011
              - qcom,ipq8064-ap148
          - const: qcom,ipq8064

@ -265,6 +304,25 @@ properties:
              - qcom,ipq8074-hk10-c2
          - const: qcom,ipq8074

+      - description: Sierra Wireless MangOH Green with WP8548 Module
+        items:
+          - const: swir,mangoh-green-wp8548
+          - const: swir,wp8548
+          - const: qcom,mdm9615
+
+      - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform
+        items:
+          - enum:
+              - qcom,qdu1000-idp
+              - qcom,qdu1000-x100
+          - const: qcom,qdu1000
+
+      - description: Qualcomm Technologies, Inc. Radio Unit 1000 platform
+        items:
+          - enum:
+              - qcom,qru1000-idp
+          - const: qcom,qru1000
+
      - description: Qualcomm Technologies, Inc. SC7180 IDP
        items:
          - enum:
@ -463,6 +521,17 @@ properties:
          - const: google,pazquel-sku2
          - const: qcom,sc7180

+      - description: Google Pazquel360 with LTE (newest rev)
+        items:
+          - const: google,pazquel-sku22
+          - const: google,pazquel-sku20
+          - const: qcom,sc7180
+
+      - description: Google Pazquel360 with WiFi (newest rev)
+        items:
+          - const: google,pazquel-sku21
+          - const: qcom,sc7180
+
      - description: Sharp Dynabook Chromebook C1 (rev1)
        items:
          - const: google,pompom-rev1
@ -575,6 +644,11 @@ properties:
          - const: google,evoker
          - const: qcom,sc7280

+      - description: Google Evoker with LTE (newest rev)
+        items:
+          - const: google,evoker-sku512
+          - const: qcom,sc7280
+
      - description: Google Herobrine (newest rev)
        items:
          - const: google,herobrine
@ -595,6 +669,16 @@ properties:
          - const: google,villager-sku512
          - const: qcom,sc7280

+      - description: Google Zombie (newest rev)
+        items:
+          - const: google,zombie
+          - const: qcom,sc7280
+
+      - description: Google Zombie with LTE (newest rev)
+        items:
+          - const: google,zombie-sku512
+          - const: qcom,sc7280
+
      - items:
          - enum:
              - lenovo,flex-5g
@ -637,6 +721,11 @@ properties:
              - xiaomi,lavender
          - const: qcom,sdm660

+      - items:
+          - enum:
+              - google,sargo
+          - const: qcom,sdm670
+
      - items:
          - enum:
              - qcom,sdx55-mtp
@ -670,10 +759,14 @@ properties:
      - items:
          - enum:
              - qcom,sa8295p-adp
+              - qcom,sa8540p-ride
          - const: qcom,sa8540p

      - items:
          - enum:
+              - google,cheza
+              - google,cheza-rev1
+              - google,cheza-rev2
              - lenovo,yoga-c630
              - lg,judyln
              - lg,judyp
@ -681,15 +774,22 @@ properties:
              - oneplus,fajita
              - qcom,sdm845-mtp
              - shift,axolotl
+              - samsung,starqltechn
              - samsung,w737
              - sony,akari-row
              - sony,akatsuki-row
              - sony,apollo-row
              - thundercomm,db845c
              - xiaomi,beryllium
+              - xiaomi,beryllium-ebbg
              - xiaomi,polaris
          - const: qcom,sdm845

+      - items:
+          - enum:
+              - oneplus,billie2
+          - const: qcom,sm4250
+
      - items:
          - enum:
              - sony,pdx201
@ -700,6 +800,11 @@ properties:
              - sony,pdx213
          - const: qcom,sm6350

+      - items:
+          - enum:
+              - sony,pdx225
+          - const: qcom,sm6375
+
      - items:
          - enum:
              - fairphone,fp4
@ -737,8 +842,129 @@ properties:
              - qcom,sm8450-hdk
              - qcom,sm8450-qrd
              - sony,pdx223
+              - sony,pdx224
          - const: qcom,sm8450

+  # Board compatibles go above
+
+  qcom,msm-id:
+    $ref: /schemas/types.yaml#/definitions/uint32-matrix
+    minItems: 1
+    maxItems: 8
+    items:
+      items:
+        - description: |
+            MSM chipset ID - an exact match value consisting of two bitfields::
+             - bits 0-15  - The unique MSM chipset ID
+             - bits 16-31 - Reserved; should be 0
+        - description: |
+            Hardware revision ID - a chipset specific 32-bit ID representing
+            the version of the chipset.  It is best a match value - the
+            bootloader will look for the closest possible match.
+    deprecated: true
+    description:
+      The MSM chipset and hardware revision used Qualcomm bootloaders.  It
+      can optionally be an array of these to indicate multiple hardware that
+      use the same device tree.  It is expected that the bootloader will use
+      this information at boot-up to decide which device tree to use when given
+      multiple device trees, some of which may not be compatible with the
+      actual hardware.  It is the bootloader's responsibility to pass the
+      correct device tree to the kernel.
+      The property is deprecated.
+
+  qcom,board-id:
+    $ref: /schemas/types.yaml#/definitions/uint32-matrix
+    minItems: 1
+    maxItems: 8
+    oneOf:
+      - items:
+          - items:
+              - description: |
+                  Board ID consisting of three bitfields::
+                    - bits 31-24 - Unused
+                    - bits 23-16 - Platform Version Major
+                    - bits 15-8  - Platform Version Minor
+                    - bits 7-0   - Platform Type
+                  Platform Type field is an exact match value.  The
+                  Platform Major/Minor field is a best match.  The bootloader will
+                  look for the closest possible match.
+              - description: |
+                  Subtype ID unique to a Platform Type/Chipset ID.  For a given
+                  Platform Type, there will typically only be a single board and the
+                  subtype_id will be 0.  However in some cases board variants may
+                  need to be distinguished by different subtype_id values.
+      - items:
+          # OnePlus uses a variant of board-id with four elements:
+          - items:
+              - const: 8
+              - const: 0
+              - description: OnePlus board ID
+              - description: OnePlus subtype ID
+    deprecated: true
+    description:
+      The board type and revision information.  It can optionally be an array
+      of these to indicate multiple boards that use the same device tree.  It
+      is expected that the bootloader will use this information at boot-up to
+      decide which device tree to use when given multiple device trees, some of
+      which may not be compatible with the actual hardware.  It is the
+      bootloader's responsibility to pass the correct device tree to the
+      kernel
+      The property is deprecated.
+
+allOf:
+  # Explicit allow-list for older SoCs. The legacy properties are not allowed
+  # on newer SoCs.
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,apq8026
+              - qcom,apq8094
+              - qcom,apq8096
+              - qcom,msm8992
+              - qcom,msm8994
+              - qcom,msm8996
+              - qcom,msm8998
+              - qcom,sdm630
+              - qcom,sdm632
+              - qcom,sdm845
+              - qcom,sdx55
+              - qcom,sdx65
+              - qcom,sm6125
+              - qcom,sm6350
+              - qcom,sm7225
+              - qcom,sm8150
+              - qcom,sm8250
+    then:
+      properties:
+        qcom,board-id: true
+        qcom,msm-id: true
+    else:
+      properties:
+        qcom,board-id: false
+        qcom,msm-id: false
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - oneplus,cheeseburger
+              - oneplus,dumpling
+              - oneplus,enchilada
+              - oneplus,fajita
+    then:
+      properties:
+        qcom,board-id:
+          items:
+            minItems: 4
+    else:
+      properties:
+        qcom,board-id:
+          items:
+            maxItems: 2
+
 additionalProperties: true

 ...
--- a/sys/contrib/device-tree/Bindings/arm/rockchip.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/rockchip.yaml
@ -30,11 +30,26 @@ properties:
          - const: amarula,vyasa-rk3288
          - const: rockchip,rk3288

+      - description: Anbernic RG351M
+        items:
+          - const: anbernic,rg351m
+          - const: rockchip,rk3326
+
      - description: Anbernic RG353P
        items:
          - const: anbernic,rg353p
          - const: rockchip,rk3566

+      - description: Anbernic RG353V
+        items:
+          - const: anbernic,rg353v
+          - const: rockchip,rk3566
+
+      - description: Anbernic RG353VS
+        items:
+          - const: anbernic,rg353vs
+          - const: rockchip,rk3566
+
      - description: Anbernic RG503
        items:
          - const: anbernic,rg503
@ -468,6 +483,21 @@ properties:
          - const: hardkernel,rk3326-odroid-go2
          - const: rockchip,rk3326

+      - description: Hardkernel Odroid Go Advance Black Edition
+        items:
+          - const: hardkernel,rk3326-odroid-go2-v11
+          - const: rockchip,rk3326
+
+      - description: Hardkernel Odroid Go Super
+        items:
+          - const: hardkernel,rk3326-odroid-go3
+          - const: rockchip,rk3326
+
+      - description: Hardkernel Odroid M1
+        items:
+          - const: rockchip,rk3568-odroid-m1
+          - const: rockchip,rk3568
+
      - description: Hugsun X99 TV Box
        items:
          - const: hugsun,x99
@ -563,7 +593,9 @@ properties:
      - description: Pine64 SoQuartz SoM
        items:
          - enum:
+              - pine64,soquartz-blade
              - pine64,soquartz-cm4io
+              - pine64,soquartz-model-a
          - const: pine64,soquartz
          - const: rockchip,rk3566

@ -709,6 +741,11 @@ properties:
          - const: rockchip,rv1108-evb
          - const: rockchip,rv1108

+      - description: Theobroma Systems PX30-uQ7 with Haikou baseboard
+        items:
+          - const: tsd,px30-ringneck-haikou
+          - const: rockchip,px30
+
      - description: Theobroma Systems RK3368-uQ7 with Haikou baseboard
        items:
          - const: tsd,rk3368-lion-haikou
@ -729,6 +766,11 @@ properties:
          - const: zkmagic,a95x-z2
          - const: rockchip,rk3318

+      - description: Rockchip RK3566 BOX Evaluation Demo board
+        items:
+          - const: rockchip,rk3566-box-demo
+          - const: rockchip,rk3566
+
      - description: Rockchip RK3568 Evaluation board
        items:
          - const: rockchip,rk3568-evb1-v10
--- a/sys/contrib/device-tree/Bindings/arm/socionext/milbeaut.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/socionext/milbeaut.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/socionext/milbeaut.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Milbeaut platforms device tree bindings
+title: Milbeaut platforms

 maintainers:
  - Taichi Sugaya <sugaya.taichi@socionext.com>
--- a/sys/contrib/device-tree/Bindings/arm/socionext/uniphier.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/socionext/uniphier.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/socionext/uniphier.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Socionext UniPhier platform device tree bindings
+title: Socionext UniPhier platform

 maintainers:
  - Masahiro Yamada <yamada.masahiro@socionext.com>
@ -26,6 +26,12 @@ properties:
              - socionext,uniphier-pro4-ref
              - socionext,uniphier-pro4-sanji
          - const: socionext,uniphier-pro4
+      - description: Pro5 SoC boards
+        items:
+          - enum:
+              - socionext,uniphier-pro5-epcore
+              - socionext,uniphier-pro5-proex
+          - const: socionext,uniphier-pro5
      - description: sLD8 SoC boards
        items:
          - enum:
--- a/sys/contrib/device-tree/Bindings/arm/sp810.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/sp810.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/sp810.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: ARM Versatile Express SP810 System Controller bindings
+title: ARM Versatile Express SP810 System Controller

 maintainers:
  - Andre Przywara <andre.przywara@arm.com>
--- a/sys/contrib/device-tree/Bindings/arm/sprd/sprd.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/sprd/sprd.yaml
@ -5,7 +5,7 @@
 $id: http://devicetree.org/schemas/arm/sprd/sprd.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Unisoc platforms device tree bindings
+title: Unisoc platforms

 maintainers:
  - Orson Zhai <orsonzhai@gmail.com>
--- a/sys/contrib/device-tree/Bindings/arm/stm32/st,mlahb.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/stm32/st,mlahb.yaml
@ -4,7 +4,7 @@
 $id: "http://devicetree.org/schemas/arm/stm32/st,mlahb.yaml#"
 $schema: "http://devicetree.org/meta-schemas/core.yaml#"

-title: STMicroelectronics STM32 ML-AHB interconnect bindings
+title: STMicroelectronics STM32 ML-AHB interconnect

 maintainers:
  - Fabien Dessenne <fabien.dessenne@foss.st.com>
--- a/sys/contrib/device-tree/Bindings/arm/stm32/st,stm32-syscon.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/stm32/st,stm32-syscon.yaml
@ -4,7 +4,7 @@
 $id: "http://devicetree.org/schemas/arm/stm32/st,stm32-syscon.yaml#"
 $schema: "http://devicetree.org/meta-schemas/core.yaml#"

-title: STMicroelectronics STM32 Platforms System Controller bindings
+title: STMicroelectronics STM32 Platforms System Controller

 maintainers:
  - Alexandre Torgue <alexandre.torgue@foss.st.com>
--- a/sys/contrib/device-tree/Bindings/arm/stm32/stm32.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/stm32/stm32.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/stm32/stm32.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: STMicroelectronics STM32 Platforms Device Tree Bindings
+title: STMicroelectronics STM32 Platforms

 maintainers:
  - Alexandre Torgue <alexandre.torgue@foss.st.com>
@ -59,6 +59,12 @@ properties:
              - prt,prtt1s   # Protonic PRTT1S
          - const: st,stm32mp151

+      - description: DH STM32MP151 DHCOR SoM based Boards
+        items:
+          - const: dh,stm32mp151a-dhcor-testbench
+          - const: dh,stm32mp151a-dhcor-som
+          - const: st,stm32mp151
+
      - description: DH STM32MP153 DHCOM SoM based Boards
        items:
          - const: dh,stm32mp153c-dhcom-drc02
--- a/sys/contrib/device-tree/Bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Allwinner CPU Configuration Controller Device Tree Bindings
+title: Allwinner CPU Configuration Controller

 maintainers:
  - Chen-Yu Tsai <wens@csie.org>
--- a/sys/contrib/device-tree/Bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/sunxi/allwinner,sun9i-a80-prcm.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Allwinner A80 PRCM Device Tree Bindings
+title: Allwinner A80 PRCM

 maintainers:
  - Chen-Yu Tsai <wens@csie.org>
--- a/sys/contrib/device-tree/Bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
@ -4,7 +4,7 @@
 $id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml#"
 $schema: "http://devicetree.org/meta-schemas/core.yaml#"

-title: NVIDIA Tegra CPU COMPLEX CLUSTER area device tree bindings
+title: NVIDIA Tegra CPU COMPLEX CLUSTER area

 maintainers:
  - Sumit Gupta <sumitg@nvidia.com>
@ -47,5 +47,4 @@ examples:
      compatible = "nvidia,tegra234-ccplex-cluster";
      reg = <0x0e000000 0x5ffff>;
      nvidia,bpmp = <&bpmp>;
-      status = "okay";
    };
--- a/sys/contrib/device-tree/Bindings/arm/tegra/nvidia,tegra194-cbb.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/tegra/nvidia,tegra194-cbb.yaml
@ -4,7 +4,7 @@
 $id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-cbb.yaml#"
 $schema: "http://devicetree.org/meta-schemas/core.yaml#"

-title: NVIDIA Tegra194 CBB 1.0 bindings
+title: NVIDIA Tegra194 CBB 1.0

 maintainers:
  - Sumit Gupta <sumitg@nvidia.com>
--- a/sys/contrib/device-tree/Bindings/arm/tegra/nvidia,tegra20-pmc.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/tegra/nvidia,tegra20-pmc.yaml
@ -123,6 +123,33 @@ properties:
      some PLLs, clocks and then brings up CPU0 for resuming the
      system.

+  core-supply:
+    description:
+      Phandle to voltage regulator connected to the SoC Core power rail.
+
+  core-domain:
+    type: object
+    description: |
+      The vast majority of hardware blocks of Tegra SoC belong to a
+      Core power domain, which has a dedicated voltage rail that powers
+      the blocks.
+
+    properties:
+      operating-points-v2:
+        description:
+          Should contain level, voltages and opp-supported-hw property.
+          The supported-hw is a bitfield indicating SoC speedo or process
+          ID mask.
+
+      "#power-domain-cells":
+        const: 0
+
+    required:
+      - operating-points-v2
+      - "#power-domain-cells"
+
+    additionalProperties: false
+
  i2c-thermtrip:
    type: object
    description:
@ -300,33 +327,6 @@ patternProperties:

    additionalProperties: false

-  core-domain:
-    type: object
-    description: |
-      The vast majority of hardware blocks of Tegra SoC belong to a
-      Core power domain, which has a dedicated voltage rail that powers
-      the blocks.
-
-    properties:
-      operating-points-v2:
-        description:
-          Should contain level, voltages and opp-supported-hw property.
-          The supported-hw is a bitfield indicating SoC speedo or process
-          ID mask.
-
-      "#power-domain-cells":
-        const: 0
-
-    required:
-      - operating-points-v2
-      - "#power-domain-cells"
-
-    additionalProperties: false
-
-  core-supply:
-    description:
-      Phandle to voltage regulator connected to the SoC Core power rail.
-
 required:
  - compatible
  - reg
--- a/sys/contrib/device-tree/Bindings/arm/tegra/nvidia,tegra234-cbb.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/tegra/nvidia,tegra234-cbb.yaml
@ -4,7 +4,7 @@
 $id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml#"
 $schema: "http://devicetree.org/meta-schemas/core.yaml#"

-title: NVIDIA Tegra CBB 2.0 bindings
+title: NVIDIA Tegra CBB 2.0

 maintainers:
  - Sumit Gupta <sumitg@nvidia.com>
--- a/sys/contrib/device-tree/Bindings/arm/ti/k3.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/ti/k3.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/ti/k3.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Texas Instruments K3 Multicore SoC architecture device tree bindings
+title: Texas Instruments K3 Multicore SoC architecture

 maintainers:
  - Nishanth Menon <nm@ti.com>
@ -61,6 +61,7 @@ properties:
          - const: ti,j721e
          - items:
              - enum:
+                  - beagle,j721e-beagleboneai64
                  - ti,j721e-evm
                  - ti,j721e-sk
              - const: ti,j721e
--- a/sys/contrib/device-tree/Bindings/arm/ti/ti,davinci.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/ti/ti,davinci.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/ti/ti,davinci.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Texas Instruments DaVinci Platforms Device Tree Bindings
+title: Texas Instruments DaVinci Platforms

 maintainers:
  - Sekhar Nori <nsekhar@ti.com>
--- a/sys/contrib/device-tree/Bindings/arm/vexpress-config.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/vexpress-config.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/vexpress-config.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: ARM Versatile Express configuration bus bindings
+title: ARM Versatile Express configuration bus

 maintainers:
  - Andre Przywara <andre.przywara@arm.com>
--- a/sys/contrib/device-tree/Bindings/arm/vexpress-sysreg.yaml
+++ b/sys/contrib/device-tree/Bindings/arm/vexpress-sysreg.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/arm/vexpress-sysreg.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: ARM Versatile Express system registers bindings
+title: ARM Versatile Express system registers

 maintainers:
  - Andre Przywara <andre.przywara@arm.com>
--- a/sys/contrib/device-tree/Bindings/ata/allwinner,sun4i-a10-ahci.yaml
+++ b/sys/contrib/device-tree/Bindings/ata/allwinner,sun4i-a10-ahci.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/ata/allwinner,sun4i-a10-ahci.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Allwinner A10 AHCI SATA Controller bindings
+title: Allwinner A10 AHCI SATA Controller

 maintainers:
  - Chen-Yu Tsai <wens@csie.org>
--- a/sys/contrib/device-tree/Bindings/ata/allwinner,sun8i-r40-ahci.yaml
+++ b/sys/contrib/device-tree/Bindings/ata/allwinner,sun8i-r40-ahci.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/ata/allwinner,sun8i-r40-ahci.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Allwinner R40 AHCI SATA Controller bindings
+title: Allwinner R40 AHCI SATA Controller

 maintainers:
  - Chen-Yu Tsai <wens@csie.org>
--- a/sys/contrib/device-tree/Bindings/ata/ata-generic.yaml
+++ b/sys/contrib/device-tree/Bindings/ata/ata-generic.yaml
@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/ata-generic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Generic Parallel ATA Controller
+
+maintainers:
+  - Linus Walleij <linus.walleij@linaro.org>
+
+description:
+  Generic Parallel ATA controllers supporting PIO modes only.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - arm,vexpress-cf
+          - fsl,mpc8349emitx-pata
+      - const: ata-generic
+
+  reg:
+    items:
+      - description: Command interface registers
+      - description: Control interface registers
+
+  reg-shift:
+    enum: [ 1, 2 ]
+
+  interrupts:
+    maxItems: 1
+
+  ata-generic,use16bit:
+    type: boolean
+    description: Use 16-bit accesses instead of 32-bit for data transfers
+
+  pio-mode:
+    description: Maximum ATA PIO transfer mode
+    $ref: /schemas/types.yaml#/definitions/uint32
+    maximum: 6
+    default: 0
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    compact-flash@1a000 {
+        compatible = "arm,vexpress-cf", "ata-generic";
+        reg = <0x1a000 0x100>,
+              <0x1a100 0xf00>;
+        reg-shift = <2>;
+    };
+...
--- a/sys/contrib/device-tree/Bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml
+++ b/sys/contrib/device-tree/Bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml
@ -0,0 +1,232 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8qxp Pixel Link Medium Speed Interconnect (MSI) Bus
+
+maintainers:
+  - Liu Ying <victor.liu@nxp.com>
+
+description: |
+  i.MX8qxp pixel link MSI bus is used to control settings of PHYs, I/Os
+  sitting together with the PHYs.  It is not the same as the MSI bus coming
+  from i.MX8 System Controller Unit (SCU) which is used to control power,
+  clock and reset through the i.MX8 Distributed Slave System Controller (DSC).
+
+  i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks,
+  that is, MSI clock and AHB clock, need to be enabled so that peripherals
+  connected to the bus can be accessed. Also, the bus is part of a power
+  domain. The power domain needs to be enabled before the peripherals can
+  be accessed.
+
+  Peripherals in i.MX8qm/qxp imaging, LVDS, MIPI DSI and HDMI TX subsystems,
+  like I2C controller, PWM controller, MIPI DSI controller and Control and
+  Status Registers (CSR) module, are accessed through the bus.
+
+  The i.MX System Controller Firmware (SCFW) owns and uses the i.MX8qm/qxp
+  pixel link MSI bus controller and does not allow SCFW user to control it.
+  So, the controller's registers cannot be accessed by SCFW user. Hence,
+  the interrupts generated by the controller don't make any sense from SCFW
+  user's point of view.
+
+allOf:
+  - $ref: simple-pm-bus.yaml#
+
+# We need a select here so we don't match all nodes with 'simple-pm-bus'.
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - fsl,imx8qxp-display-pixel-link-msi-bus
+          - fsl,imx8qm-display-pixel-link-msi-bus
+  required:
+    - compatible
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - fsl,imx8qxp-display-pixel-link-msi-bus
+          - fsl,imx8qm-display-pixel-link-msi-bus
+      - const: simple-pm-bus
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: master gated clock from system
+      - description: AHB clock
+
+  clock-names:
+    items:
+      - const: msi
+      - const: ahb
+
+patternProperties:
+  "^.*@[0-9a-f]+$":
+    description: Devices attached to the bus
+    type: object
+    properties:
+      reg:
+        maxItems: 1
+
+    required:
+      - reg
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - power-domains
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8-lpcg.h>
+    #include <dt-bindings/firmware/imx/rsrc.h>
+    bus@56200000 {
+        compatible = "fsl,imx8qxp-display-pixel-link-msi-bus", "simple-pm-bus";
+        reg = <0x56200000 0x20000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        interrupt-parent = <&dc0_irqsteer>;
+        interrupts = <320>;
+        ranges;
+        clocks = <&dc0_disp_ctrl_link_mst0_lpcg IMX_LPCG_CLK_4>,
+                 <&dc0_disp_ctrl_link_mst0_lpcg IMX_LPCG_CLK_4>;
+        clock-names = "msi", "ahb";
+        power-domains = <&pd IMX_SC_R_DC_0>;
+
+        syscon@56221000 {
+            compatible = "fsl,imx8qxp-mipi-lvds-csr", "syscon", "simple-mfd";
+            reg = <0x56221000 0x1000>;
+            clocks = <&mipi_lvds_0_di_mipi_lvds_regs_lpcg IMX_LPCG_CLK_4>;
+            clock-names = "ipg";
+
+            pxl2dpi {
+                compatible = "fsl,imx8qxp-pxl2dpi";
+                fsl,sc-resource = <IMX_SC_R_MIPI_0>;
+                power-domains = <&pd IMX_SC_R_MIPI_0>;
+
+                ports {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+
+                    port@0 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0>;
+
+                        mipi_lvds_0_pxl2dpi_dc0_pixel_link0: endpoint@0 {
+                            reg = <0>;
+                            remote-endpoint = <&dc0_pixel_link0_mipi_lvds_0_pxl2dpi>;
+                        };
+
+                        mipi_lvds_0_pxl2dpi_dc0_pixel_link1: endpoint@1 {
+                            reg = <1>;
+                            remote-endpoint = <&dc0_pixel_link1_mipi_lvds_0_pxl2dpi>;
+                        };
+                    };
+
+                    port@1 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <1>;
+
+                        mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0: endpoint@0 {
+                            reg = <0>;
+                            remote-endpoint = <&mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi>;
+                        };
+
+                        mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1: endpoint@1 {
+                            reg = <1>;
+                            remote-endpoint = <&mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi>;
+                        };
+                    };
+                };
+            };
+
+            ldb {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,imx8qxp-ldb";
+                clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2>,
+                         <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>;
+                clock-names = "pixel", "bypass";
+                power-domains = <&pd IMX_SC_R_LVDS_0>;
+
+                channel@0 {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                    reg = <0>;
+                    phys = <&mipi_lvds_0_phy>;
+                    phy-names = "lvds_phy";
+
+                    port@0 {
+                        reg = <0>;
+
+                        mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi: endpoint {
+                            remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0>;
+                        };
+                    };
+
+                    port@1 {
+                        reg = <1>;
+
+                        /* ... */
+                    };
+                };
+
+                channel@1 {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                    reg = <1>;
+                    phys = <&mipi_lvds_0_phy>;
+                    phy-names = "lvds_phy";
+
+                    port@0 {
+                        reg = <0>;
+
+                        mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi: endpoint {
+                            remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1>;
+                        };
+                    };
+
+                    port@1 {
+                        reg = <1>;
+
+                        /* ... */
+                    };
+                };
+            };
+        };
+
+        clock-controller@56223004 {
+            compatible = "fsl,imx8qxp-lpcg";
+            reg = <0x56223004 0x4>;
+            #clock-cells = <1>;
+            clocks = <&mipi_lvds_0_ipg_clk>;
+            clock-indices = <IMX_LPCG_CLK_4>;
+            clock-output-names = "mipi_lvds_0_di_mipi_lvds_regs_lpcg_ipg_clk";
+            power-domains = <&pd IMX_SC_R_MIPI_0>;
+        };
+
+        phy@56228300 {
+            compatible = "fsl,imx8qxp-mipi-dphy";
+            reg = <0x56228300 0x100>;
+            clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_PHY>;
+            clock-names = "phy_ref";
+            #phy-cells = <0>;
+            fsl,syscon = <&mipi_lvds_0_csr>;
+            power-domains = <&pd IMX_SC_R_MIPI_0>;
+        };
+    };
--- a/sys/contrib/device-tree/Bindings/bus/ti-sysc.yaml
+++ b/sys/contrib/device-tree/Bindings/bus/ti-sysc.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/bus/ti-sysc.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Texas Instruments interconnect target module binding
+title: Texas Instruments interconnect target module

 maintainers:
  - Tony Lindgren <tony@atomide.com>
--- a/sys/contrib/device-tree/Bindings/chrome/google,cros-ec-typec.yaml
+++ b/sys/contrib/device-tree/Bindings/chrome/google,cros-ec-typec.yaml
@ -48,6 +48,7 @@ examples:
      cros_ec: ec@0 {
        compatible = "google,cros-ec-spi";
        reg = <0>;
+        interrupts = <35 0>;

        typec {
          compatible = "google,cros-ec-typec";
--- a/sys/contrib/device-tree/Bindings/chrome/google,cros-kbd-led-backlight.yaml
+++ b/sys/contrib/device-tree/Bindings/chrome/google,cros-kbd-led-backlight.yaml
@ -27,6 +27,7 @@ examples:
      cros_ec: ec@0 {
        compatible = "google,cros-ec-spi";
        reg = <0>;
+        interrupts = <15 0>;

        kbd-led-backlight {
          compatible = "google,cros-kbd-led-backlight";
--- a/sys/contrib/device-tree/Bindings/clock/adi,axi-clkgen.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/adi,axi-clkgen.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/adi,axi-clkgen.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Binding for Analog Devices AXI clkgen pcore clock generator
+title: Analog Devices AXI clkgen pcore clock generator

 maintainers:
  - Lars-Peter Clausen <lars@metafoo.de>
--- a/sys/contrib/device-tree/Bindings/clock/calxeda.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/calxeda.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/calxeda.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Device Tree Clock bindings for Calxeda highbank platform
+title: Calxeda highbank platform Clock Controller

 description: |
  This binding covers the Calxeda SoC internal peripheral and bus clocks
--- a/sys/contrib/device-tree/Bindings/clock/cirrus,cs2000-cp.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/cirrus,cs2000-cp.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/cirrus,cs2000-cp.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Binding CIRRUS LOGIC Fractional-N Clock Synthesizer & Clock Multiplier
+title: CIRRUS LOGIC Fractional-N Clock Synthesizer & Clock Multiplier

 maintainers:
  - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
--- a/sys/contrib/device-tree/Bindings/clock/fixed-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/fixed-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Binding for simple fixed-rate clock sources
+title: Simple fixed-rate clock sources

 maintainers:
  - Michael Turquette <mturquette@baylibre.com>
--- a/sys/contrib/device-tree/Bindings/clock/fixed-factor-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/fixed-factor-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/fixed-factor-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Binding for simple fixed factor rate clock sources
+title: Simple fixed factor rate clock sources

 maintainers:
  - Michael Turquette <mturquette@baylibre.com>
--- a/sys/contrib/device-tree/Bindings/clock/fixed-mmio-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/fixed-mmio-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/fixed-mmio-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Binding for simple memory mapped IO fixed-rate clock sources
+title: Simple memory mapped IO fixed-rate clock sources

 description:
  This binding describes a fixed-rate clock for which the frequency can
--- a/sys/contrib/device-tree/Bindings/clock/fsl,imx8m-anatop.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/fsl,imx8m-anatop.yaml
@ -0,0 +1,51 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/fsl,imx8m-anatop.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX8M Family Anatop Module
+
+maintainers:
+  - Peng Fan <peng.fan@nxp.com>
+
+description: |
+  NXP i.MX8M Family anatop PLL module which generates PLL to CCM root.
+
+properties:
+  compatible:
+    oneOf:
+      - enum:
+          - fsl,imx8mm-anatop
+          - fsl,imx8mq-anatop
+      - items:
+          - enum:
+              - fsl,imx8mn-anatop
+              - fsl,imx8mp-anatop
+          - const: fsl,imx8mm-anatop
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  '#clock-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    anatop: clock-controller@30360000 {
+        compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";
+        reg = <0x30360000 0x10000>;
+        #clock-cells = <1>;
+    };
+
+...
--- a/sys/contrib/device-tree/Bindings/clock/fsl,plldig.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/fsl,plldig.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/fsl,plldig.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: NXP QorIQ Layerscape LS1028A Display PIXEL Clock Binding
+title: NXP QorIQ Layerscape LS1028A Display PIXEL Clock

 maintainers:
  - Wen He <wen.he_1@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/fsl,sai-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/fsl,sai-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/fsl,sai-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Freescale SAI bitclock-as-a-clock binding
+title: Freescale SAI bitclock-as-a-clock

 maintainers:
  - Michael Walle <michael@walle.cc>
--- a/sys/contrib/device-tree/Bindings/clock/fsl,scu-clk.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/fsl,scu-clk.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: i.MX SCU Client Device Node - Clock bindings based on SCU Message Protocol
+title: i.MX SCU Client Device Node - Clock Controller Based on SCU Message Protocol

 maintainers:
  - Abel Vesa <abel.vesa@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/idt,versaclock5.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/idt,versaclock5.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Binding for IDT VersaClock 5 and 6 programmable I2C clock generators
+title: IDT VersaClock 5 and 6 programmable I2C clock generators

 description: |
  The IDT VersaClock 5 and VersaClock 6 are programmable I2C
--- a/sys/contrib/device-tree/Bindings/clock/imx1-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx1-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx1-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX1 CPUs
+title: Freescale i.MX1 CPUs Clock Controller

 maintainers:
  - Alexander Shiyan <shc_work@mail.ru>
--- a/sys/contrib/device-tree/Bindings/clock/imx21-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx21-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx21-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX21
+title: Freescale i.MX21 Clock Controller

 maintainers:
  - Alexander Shiyan <shc_work@mail.ru>
--- a/sys/contrib/device-tree/Bindings/clock/imx23-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx23-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx23-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX23
+title: Freescale i.MX23 Clock Controller

 maintainers:
  - Shawn Guo <shawnguo@kernel.org>
--- a/sys/contrib/device-tree/Bindings/clock/imx25-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx25-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx25-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX25
+title: Freescale i.MX25 Clock Controller

 maintainers:
  - Sascha Hauer <s.hauer@pengutronix.de>
--- a/sys/contrib/device-tree/Bindings/clock/imx27-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx27-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx27-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX27
+title: Freescale i.MX27 Clock Controller

 maintainers:
  - Fabio Estevam <festevam@gmail.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx28-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx28-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx28-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX28
+title: Freescale i.MX28 Clock Controller

 maintainers:
  - Shawn Guo <shawnguo@kernel.org>
--- a/sys/contrib/device-tree/Bindings/clock/imx31-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx31-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx31-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX31
+title: Freescale i.MX31 Clock Controller

 maintainers:
  - Fabio Estevam <festevam@gmail.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx35-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx35-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx35-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX35
+title: Freescale i.MX35 Clock Controller

 maintainers:
  - Steffen Trumtrar <s.trumtrar@pengutronix.de>
--- a/sys/contrib/device-tree/Bindings/clock/imx5-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx5-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx5-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX5
+title: Freescale i.MX5 Clock Controller

 maintainers:
  - Fabio Estevam <festevam@gmail.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx6q-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx6q-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx6q-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX6 Quad
+title: Freescale i.MX6 Quad Clock Controller

 maintainers:
  - Anson Huang <Anson.Huang@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx6sl-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx6sl-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx6sl-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX6 SoloLite
+title: Freescale i.MX6 SoloLite Clock Controller

 maintainers:
  - Anson Huang <Anson.Huang@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx6sll-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx6sll-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx6sll-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX6 SLL
+title: Freescale i.MX6 SLL Clock Controller

 maintainers:
  - Anson Huang <Anson.Huang@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx6sx-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx6sx-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx6sx-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX6 SoloX
+title: Freescale i.MX6 SoloX Clock Controller

 maintainers:
  - Anson Huang <Anson.Huang@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx6ul-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx6ul-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx6ul-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX6 UltraLite
+title: Freescale i.MX6 UltraLite Clock Controller

 maintainers:
  - Anson Huang <Anson.Huang@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx7d-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx7d-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx7d-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX7 Dual
+title: Freescale i.MX7 Dual Clock Controller

 maintainers:
  - Frank Li <Frank.Li@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx7ulp-pcc-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx7ulp-pcc-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx7ulp-pcc-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX7ULP Peripheral Clock Control (PCC) modules
+title: Freescale i.MX7ULP Peripheral Clock Control (PCC) modules Clock Controller

 maintainers:
  - A.s. Dong <aisheng.dong@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx7ulp-scg-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx7ulp-scg-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx7ulp-scg-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MX7ULP System Clock Generation (SCG) modules
+title: Freescale i.MX7ULP System Clock Generation (SCG) modules Clock Controller

 maintainers:
  - A.s. Dong <aisheng.dong@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx8m-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx8m-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: NXP i.MX8M Family Clock Control Module Binding
+title: NXP i.MX8M Family Clock Control Module

 maintainers:
  - Anson Huang <Anson.Huang@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx8qxp-lpcg.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx8qxp-lpcg.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock bindings
+title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock

 maintainers:
  - Aisheng Dong <aisheng.dong@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx8ulp-cgc-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx8ulp-cgc-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx8ulp-cgc-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: NXP i.MX8ULP Clock Generation & Control(CGC) Module Binding
+title: NXP i.MX8ULP Clock Generation & Control(CGC) Module

 maintainers:
  - Jacky Bai <ping.bai@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx8ulp-pcc-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx8ulp-pcc-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx8ulp-pcc-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: NXP i.MX8ULP Peripheral Clock Controller(PCC) Module Binding
+title: NXP i.MX8ULP Peripheral Clock Controller(PCC) Module

 maintainers:
  - Jacky Bai <ping.bai@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imx93-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imx93-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imx93-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: NXP i.MX93 Clock Control Module Binding
+title: NXP i.MX93 Clock Control Module

 maintainers:
  - Peng Fan <peng.fan@nxp.com>
--- a/sys/contrib/device-tree/Bindings/clock/imxrt1050-clock.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/imxrt1050-clock.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/imxrt1050-clock.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Clock bindings for Freescale i.MXRT
+title: Freescale i.MXRT Clock Controller

 maintainers:
  - Giulio Benetti <giulio.benetti@benettiengineering.com>
--- a/sys/contrib/device-tree/Bindings/clock/ingenic,cgu.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/ingenic,cgu.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/ingenic,cgu.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Ingenic SoCs CGU devicetree bindings
+title: Ingenic SoCs CGU

 description: |
  The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
@ -22,6 +22,7 @@ select:
        enum:
          - ingenic,jz4740-cgu
          - ingenic,jz4725b-cgu
+          - ingenic,jz4755-cgu
          - ingenic,jz4760-cgu
          - ingenic,jz4760b-cgu
          - ingenic,jz4770-cgu
@ -51,6 +52,7 @@ properties:
      - enum:
          - ingenic,jz4740-cgu
          - ingenic,jz4725b-cgu
+          - ingenic,jz4755-cgu
          - ingenic,jz4760-cgu
          - ingenic,jz4760b-cgu
          - ingenic,jz4770-cgu
--- a/sys/contrib/device-tree/Bindings/clock/intel,agilex.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/intel,agilex.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/intel,agilex.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Intel SoCFPGA Agilex platform clock controller binding
+title: Intel SoCFPGA Agilex platform clock controller

 maintainers:
  - Dinh Nguyen <dinguyen@kernel.org>
--- a/sys/contrib/device-tree/Bindings/clock/intel,cgu-lgm.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/intel,cgu-lgm.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/intel,cgu-lgm.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Intel Lightning Mountain SoC's Clock Controller(CGU) Binding
+title: Intel Lightning Mountain SoC's Clock Controller(CGU)

 maintainers:
  - Rahul Tanwar <rahul.tanwar@linux.intel.com>
--- a/sys/contrib/device-tree/Bindings/clock/intel,easic-n5x.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/intel,easic-n5x.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/intel,easic-n5x.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Intel SoCFPGA eASIC N5X platform clock controller binding
+title: Intel SoCFPGA eASIC N5X platform clock controller

 maintainers:
  - Dinh Nguyen <dinguyen@kernel.org>
--- a/sys/contrib/device-tree/Bindings/clock/intel,stratix10.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/intel,stratix10.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/intel,stratix10.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Intel SoCFPGA Stratix10 platform clock controller binding
+title: Intel SoCFPGA Stratix10 platform clock controller

 maintainers:
  - Dinh Nguyen <dinguyen@kernel.org>
--- a/sys/contrib/device-tree/Bindings/clock/mediatek,mt8186-fhctl.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/mediatek,mt8186-fhctl.yaml
@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/mediatek,mt8186-fhctl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek frequency hopping and spread spectrum clocking control
+
+maintainers:
+  - Edward-JW Yang <edward-jw.yang@mediatek.com>
+
+description: |
+  Frequency hopping control (FHCTL) is a piece of hardware that control
+  some PLLs to adopt "hopping" mechanism to adjust their frequency.
+  Spread spectrum clocking (SSC) is another function provided by this hardware.
+
+properties:
+  compatible:
+    const: mediatek,mt8186-fhctl
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    description: Phandles of the PLL with FHCTL hardware capability.
+    minItems: 1
+    maxItems: 30
+
+  mediatek,hopping-ssc-percent:
+    description: The percentage of spread spectrum clocking for one PLL.
+    minItems: 1
+    maxItems: 30
+    items:
+      default: 0
+      minimum: 0
+      maximum: 8
+
+required:
+  - compatible
+  - reg
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/mt8186-clk.h>
+    fhctl: fhctl@1000ce00 {
+        compatible = "mediatek,mt8186-fhctl";
+        reg = <0x1000ce00 0x200>;
+        clocks = <&apmixedsys CLK_APMIXED_MSDCPLL>;
+        mediatek,hopping-ssc-percent = <3>;
+    };
--- a/sys/contrib/device-tree/Bindings/clock/microchip,mpfs-clkcfg.yaml
+++ b/sys/contrib/device-tree/Bindings/clock/microchip,mpfs-clkcfg.yaml
@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/clock/microchip,mpfs-clkcfg.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Microchip PolarFire Clock Control Module Binding
+title: Microchip PolarFire Clock Control Module

 maintainers:
  - Daire McNamara <daire.mcnamara@microchip.com>
--- a/Show More
+++ b/Show More