d/freebsd-dev
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Disable 'C'-compressed ISA extension.

Browse Source 
It works excellent, but KDB disassembler and DTrace FBT provider for
RISC-V do lack support for it. They currently handle 4-byte instructions
only, while C-compressed ISA extension introduces 2-byte instructions
freely mixing them together.

So disable it for now.

Reviewed by:	markj@
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D16436
This commit is contained in:
Ruslan Bukin 2018-07-25 16:07:35 +00:00
parent 1d75e87b28
commit 8e8fbf193d
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=336716
3 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
share/mk/bsd.cpu.mk
View File

@ -367,9 +367,9 @@ CFLAGS += -mcpu=8540 -Wa,-me500 -mspe=yes -mabi=spe -mfloat-gprs=double
.if ${MACHINE_CPUARCH} == "riscv"
.if ${MACHINE_ARCH:Mriscv*sf}
CFLAGS += -march=rv64imac -mabi=lp64
CFLAGS += -march=rv64ima -mabi=lp64
.else
CFLAGS += -march=rv64imafdc -mabi=lp64d
CFLAGS += -march=rv64imafd -mabi=lp64d
.endif
.endif

2
stand/defs.mk
View File

@ -103,7 +103,7 @@ CFLAGS+= -ffreestanding ${CFLAGS_NO_SIMD}
.if ${MACHINE_CPUARCH} == "aarch64"
CFLAGS+= -mgeneral-regs-only -fPIC
.elif ${MACHINE_CPUARCH} == "riscv"
CFLAGS+= -march=rv64imac -mabi=lp64
CFLAGS+= -march=rv64ima -mabi=lp64
.else
CFLAGS+= -msoft-float
.endif

2
sys/conf/kern.mk
View File

@ -131,7 +131,7 @@ INLINE_LIMIT?= 8000
.endif
.if ${MACHINE_CPUARCH} == "riscv"
CFLAGS.gcc+= -mcmodel=medany -march=rv64imafdc -mabi=lp64
CFLAGS.gcc+= -mcmodel=medany -march=rv64imafd -mabi=lp64
INLINE_LIMIT?= 8000
.endif