With this commit our friend RMI will now compile. I have

not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
 making it run ;-)

sys/conf/files.mips

@@ -45,7 +45,6 @@ mips/mips/vm_machdep.c		standard
 # ----------------------------------------------------------------------
 # Phase 4
 # ----------------------------------------------------------------------
-mips/mips/tick.c		standard
 # ----------------------------------------------------------------------
 # Phase 5
 # ----------------------------------------------------------------------

sys/conf/options.mips

@@ -51,9 +51,11 @@ CFE_ENV_SIZE	opt_global.h
 KERNPHYSADDR	opt_global.h
 KERNVIRTADDR	opt_global.h
 PHYSADDR	opt_global.h
-
+PHYS_ADDR_64BIT	opt_global.h
+NOFPU		opt_global.h
 TARGET_OCTEON	opt_global.h
 TARGET_EMULATOR	opt_ddb.h
+TARGET_XLR_XLS  opt_global.h
 
 TICK_USE_YAMON_FREQ	opt_global.h
 TICK_USE_MALTA_RTC	opt_global.h

sys/mips/adm5120/adm5120_machdep.c

@@ -73,6 +73,12 @@ __FBSDID("$FreeBSD$");
 extern int	*edata;
 extern int	*end;
 
+void
+platform_cpu_init()
+{
+	/* Nothing special */
+}
+
 static void
 mips_init(void)
 {

sys/mips/adm5120/files.adm5120

@@ -10,3 +10,4 @@ mips/adm5120/uart_bus_adm5120.c	optional uart
 mips/adm5120/uart_cpu_adm5120.c	optional uart
 mips/adm5120/uart_dev_adm5120.c	optional uart
 mips/mips/intr_machdep.c        standard
+mips/mips/tick.c		standard

sys/mips/alchemy/alchemy_machdep.c

@@ -73,6 +73,12 @@ __FBSDID("$FreeBSD$");
 extern int	*edata;
 extern int	*end;
 
+void
+platform_cpu_init()
+{
+	/* Nothing special */
+}
+
 static void
 mips_init(void)
 {

sys/mips/alchemy/files.alchemy

@@ -6,3 +6,4 @@ mips/alchemy/obio.c		standard
 mips/alchemy/uart_bus_alchemy.c	optional uart
 mips/alchemy/uart_cpu_alchemy.c	optional uart
 mips/mips/intr_machdep.c        standard
+mips/mips/tick.c		standard

sys/mips/atheros/ar71xx_machdep.c

@@ -97,6 +97,12 @@ parse_argv(char *str)
 	}
 }
 
+void
+platform_cpu_init()
+{
+	/* Nothing special */
+}
+
 void
 platform_halt(void)
 {

sys/mips/atheros/files.ar71xx

@@ -13,3 +13,4 @@ mips/atheros/uart_bus_ar71xx.c	optional uart
 mips/atheros/uart_cpu_ar71xx.c	optional uart
 mips/atheros/ar71xx_bus_space_reversed.c	standard
 mips/mips/intr_machdep.c        standard
+mips/mips/tick.c		standard

sys/mips/idt/files.idt

@@ -7,3 +7,4 @@ mips/idt/obio.c			standard
 mips/idt/uart_cpu_rc32434.c	optional uart
 mips/idt/uart_bus_rc32434.c	optional uart
 mips/mips/intr_machdep.c        standard
+mips/mips/tick.c		standard

sys/mips/idt/idt_machdep.c

@@ -75,6 +75,12 @@ __FBSDID("$FreeBSD$");
 extern int	*edata;
 extern int	*end;
 
+void
+platform_cpu_init()
+{
+	/* Nothing special */
+}
+
 void
 platform_halt(void)
 {

sys/mips/include/fls64.h

@@ -0,0 +1,47 @@
+/*-
+ * Copyright (c) 2003-2009 RMI Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of RMI Corporation, nor the names of its contributors,
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * RMI_BSD */
+#ifndef _MIPS_FLS64_H_
+#define _MIPS_FLS64_H_
+
+/*
+ * Find Last Set bit (64 bit)
+ */
+static inline int
+fls64(__uint64_t mask)
+{
+	int bit;
+
+	if (mask == 0)
+		return (0);
+	for (bit = 1; ((mask & 0x1ULL) == 0); bit++)
+		mask = mask >> 1;
+	return (bit);
+}
+#endif

sys/mips/include/hwfunc.h

@@ -29,7 +29,7 @@
 #define	_MACHINE_HWFUNC_H_
 
 struct trapframe;
-
+struct timecounter;
 /*
  * Hooks downward into hardware functionality.
  */
@@ -39,4 +39,12 @@ void platform_intr(struct trapframe *);
 void platform_reset(void);
 void platform_start(__register_t, __register_t,  __register_t, __register_t);
 
+/* For clocks and ticks and such */
+void platform_initclocks(void);
+uint64_t platform_get_frequency(void);
+unsigned platform_get_timecount(struct timecounter *);
+
+/* For hardware specific CPU initialization */
+void platform_cpu_init(void);
+void platform_secondary_init(void);
 #endif /* !_MACHINE_HWFUNC_H_ */

sys/mips/include/intr_machdep.h

@@ -52,9 +52,9 @@ extern struct mips_intrhand mips_intr_handlers[];
 
 struct trapframe;
 
-void cpu_establish_hardintr(const char *, int (*)(void*), void (*)(void*), 
+void cpu_establish_hardintr(const char *, driver_filter_t *, driver_intr_t *, 
     void *, int, int, void **);
-void cpu_establish_softintr(const char *, int (*)(void*), void (*)(void*), 
+void cpu_establish_softintr(const char *, driver_filter_t *, void (*)(void*), 
     void *, int, int, void **);
 void cpu_intr(struct trapframe *);
 

sys/mips/include/kdb.h

@@ -47,4 +47,8 @@ kdb_cpu_trap(int vector, int _)
 {
 }
 
+static __inline void
+kdb_cpu_sync_icache(unsigned char *addr, size_t size)
+{
+}
 #endif /* _MACHINE_KDB_H_ */

sys/mips/malta/files.malta

@@ -8,3 +8,4 @@ dev/uart/uart_dev_ns8250.c		optional uart
 mips/malta/malta_machdep.c		standard
 mips/malta/yamon.c			standard
 mips/mips/intr_machdep.c		standard
+mips/mips/tick.c			standard

sys/mips/malta/malta_machdep.c

@@ -97,6 +97,12 @@ static int malta_lcd_offs[] = {
 	MALTA_ASCIIPOS7
 };
 
+void
+platform_cpu_init()
+{
+	/* Nothing special */
+}
+
 /*
  * Put character to Malta LCD at given position.
  */

sys/mips/mips/cpu.c

@@ -47,6 +47,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/intr_machdep.h>
 #include <machine/locore.h>
 #include <machine/pte.h>
+#include <machine/hwfunc.h>
 
 static struct mips_cpuinfo cpuinfo;
 
@@ -129,6 +130,7 @@ mips_get_identity(struct mips_cpuinfo *cpuinfo)
 void
 mips_cpu_init(void)
 {
+	platform_cpu_init();
 	mips_get_identity(&cpuinfo);
 	num_tlbentries = cpuinfo.tlb_nentries;
 	Mips_SetWIRED(0);

sys/mips/mips/machdep.c

@@ -112,8 +112,8 @@ int clocks_running = 0;
 vm_offset_t kstack0;
 
 #ifdef SMP
-struct pcpu __pcpu[32];
-char pcpu_boot_stack[KSTACK_PAGES * PAGE_SIZE * (MAXCPU-1)]; 
+struct pcpu __pcpu[MAXCPU];
+char pcpu_boot_stack[KSTACK_PAGES * PAGE_SIZE * MAXCPU]; 
 #else
 struct pcpu pcpu;
 struct pcpu *pcpup = &pcpu;
@@ -288,6 +288,12 @@ mips_proc0_init(void)
 	PCPU_SET(curpcb, thread0.td_pcb);
 }
 
+void
+cpu_initclocks(void)
+{
+  platform_initclocks();
+}
+
 struct msgbuf *msgbufp=0;
 
 /*

sys/mips/mips/tick.c

@@ -59,6 +59,8 @@ u_int32_t counter_upper = 0;
 u_int32_t counter_lower_last = 0;
 int	tick_started = 0;
 
+void platform_initclocks(void);
+
 struct clk_ticks
 {
 	u_long hard_ticks;
@@ -97,9 +99,8 @@ mips_timer_early_init(uint64_t clock_hz)
 }
 
 void
-cpu_initclocks(void)
+platform_initclocks(void)
 {
-
 	if (!tick_started) {
 	        tc_init(&counter_timecounter);
 		tick_started++;

sys/mips/octeon1/files.octeon1

@@ -14,3 +14,4 @@ mips/octeon1/uart_bus_octeonusart.c		optional uart
 mips/octeon1/uart_cpu_octeonusart.c		optional uart
 mips/octeon1/uart_dev_oct16550.c		optional uart
 mips/mips/intr_machdep.c			standard
+mips/mips/tick.c				standard

sys/mips/octeon1/octeon_machdep.c

@@ -80,6 +80,11 @@ __FBSDID("$FreeBSD$");
 extern int	*edata;
 extern int	*end;
 
+void
+platform_cpu_init()
+{
+	/* Nothing special yet */
+}
 
 /*
  * Perform a board-level soft-reset.

sys/mips/sentry5/files.sentry5

@@ -6,3 +6,4 @@
 # which just need to be tweaked for attachment to an SSB system bus.
 mips/sentry5/s5_machdep.c		standard
 mips/mips/intr_machdep.c		standard
+mips/mips/tick.c			standard

sys/mips/sentry5/s5_machdep.c

@@ -87,6 +87,12 @@ extern uint32_t cfe_vector;
 extern int *edata;
 extern int *end;
 
+void
+platform_cpu_init()
+{
+	/* Nothing special */
+}
+
 static void
 mips_init(void)
 {

sys/mips/sibyte/files.sibyte

@@ -7,3 +7,4 @@ mips/sibyte/sb_scd.c				standard
 mips/sibyte/ata_zbbus.c				standard
 mips/mips/intr_machdep.c			standard
 mips/sibyte/sb_asm.S				standard
+mips/mips/tick.c				standard

sys/mips/sibyte/sb_machdep.c

@@ -98,6 +98,12 @@ extern void cfe_env_init(void);
 extern int *edata;
 extern int *end;
 
+void
+platform_cpu_init()
+{
+	/* Nothing special */
+}
+
 static void
 mips_init(void)
 {