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Generalize AT91 NAND support a bit. Be more flexible about ALE and CLE

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address line assignment. Provide convenince function to set these things.
This commit is contained in:
Warner Losh 2014-01-19 17:53:51 +00:00
parent 7b94bdc970
commit 90a9a51875
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=260885
2 changed files with 81 additions and 11 deletions
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42
sys/dev/nand/nfc_at91.c
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@ -54,23 +54,29 @@ __FBSDID("$FreeBSD$");
#include <dev/nand/nandbus.h>
#include "nfc_if.h"
#include <dev/nand/nfc_at91.h>
#include <arm/at91/at91_smc.h>
/*
* Data cycles are triggered by access to any address within the EBI CS3 region
* that has A21 and A22 clear. Command cycles are any access with bit A21
* asserted. Address cycles are any access with bit A22 asserted.
*
* XXX The atmel docs say that any address bits can be used instead of A21 and
* A22; these values should be configurable.
* asserted. Address cycles are any access with bit A22 asserted. Or vice versa.
* We get these parameters from the nand_param that the board is required to
* call at91_enable_nand, and enable the GPIO lines properly (that will be moved
* into at91_enable_nand when the great GPIO pin renumbering happens). We use
* ale (Address Latch Enable) and cle (Comand Latch Enable) to match the hardware
* names used in NAND.
*/
#define AT91_NAND_DATA 0
#define AT91_NAND_COMMAND (1 << 21)
#define AT91_NAND_ADDRESS (1 << 22)
struct at91_nand_softc {
struct nand_softc nand_sc;
struct resource *res;
struct at91_nand_params *nand_param;
};
static struct at91_nand_params nand_param;
static int at91_nand_attach(device_t);
static int at91_nand_probe(device_t);
static uint8_t at91_nand_read_byte(device_t);
@ -81,6 +87,12 @@ static int at91_nand_send_command(device_t, uint8_t);
static int at91_nand_send_address(device_t, uint8_t);
static void at91_nand_write_buf(device_t, void *, uint32_t);
void
at91_enable_nand(const struct at91_nand_params *np)
{
nand_param = *np;
}
static inline u_int8_t
dev_read_1(struct at91_nand_softc *sc, bus_size_t offset)
{
@ -108,6 +120,14 @@ at91_nand_attach(device_t dev)
int err, rid;
sc = device_get_softc(dev);
sc->nand_param = &nand_param;
if (sc->nand_param->width != 8 && sc->nand_param->width != 16) {
device_printf(dev, "Bad bus width (%d) defaulting to 8 bits\n",
sc->nand_param->width);
sc->nand_param->width = 8;
}
at91_ebi_enable(sc->nand_param->cs);
rid = 0;
sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
RF_ACTIVE);
@ -128,10 +148,10 @@ at91_nand_send_command(device_t dev, uint8_t command)
{
struct at91_nand_softc *sc;
/* nand_debug(NDBG_DRV,"at91_nand_send_command: 0x%02x", command); */
nand_debug(NDBG_DRV,"at91_nand_send_command: 0x%02x", command);
sc = device_get_softc(dev);
dev_write_1(sc, AT91_NAND_COMMAND, command);
dev_write_1(sc, sc->nand_param->cle, command);
return (0);
}
@ -140,10 +160,10 @@ at91_nand_send_address(device_t dev, uint8_t addr)
{
struct at91_nand_softc *sc;
/* nand_debug(NDBG_DRV,"at91_nand_send_address: x%02x", addr); */
nand_debug(NDBG_DRV,"at91_nand_send_address: x%02x", addr);
sc = device_get_softc(dev);
dev_write_1(sc, AT91_NAND_ADDRESS, addr);
dev_write_1(sc, sc->nand_param->ale, addr);
return (0);
}
@ -156,7 +176,7 @@ at91_nand_read_byte(device_t dev)
sc = device_get_softc(dev);
data = dev_read_1(sc, AT91_NAND_DATA);
/* nand_debug(NDBG_DRV,"at91_nand_read_byte: 0x%02x", data); */
nand_debug(NDBG_DRV,"at91_nand_read_byte: 0x%02x", data);
return (data);
}

50
sys/dev/nand/nfc_at91.h Normal file
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@ -0,0 +1,50 @@
/*-
* Copyright (C) 2014 Warner Losh.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* Atmel at91-family integrated NAND controller driver.
*
* Interface to board setup code to set parameters.
*/
#ifndef DEV_NAND_NFC_AT91_H
#define DEV_NAND_NFC_AT91_H 1
struct at91_nand_params
{
uint32_t ale; /* Address for ALE (address) NAND cycles */
uint32_t cle; /* Address for CLE (command) NAND cycles */
uint32_t width; /* 8 or 16 bits (specify in bits) */
uint32_t cs; /* Chip Select NAND is connected to */
uint32_t rnb_pin; /* GPIO pin # for Read/notBusy */
uint32_t nce_pin; /* GPIO pin # for CE (active low) */
};
void at91_enable_nand(const struct at91_nand_params *);
#endif /* DEV_NAND_NFC_AT91_H */