Also update est(4) as r360162 and r360164
MFC after: 3 days
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parent
62d12eab90
commit
9157ca0fb4
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=360165
@ -25,7 +25,7 @@
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.\"
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.\" $FreeBSD$
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.\"
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.Dd October 18, 2012
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.Dd April 21, 2020
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.Dt EST 4
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.Os
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.Sh NAME
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@ -66,7 +66,7 @@ Attempt to infer information from direct probing of the msr.
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Should only be used in diagnostic cases.
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.Pq default 0
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.It hw.est.strict
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Validate frequency requested is accepted by the cpu when set.
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Validate frequency requested is accepted by the CPU when set.
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It appears that this will only work on single core cpus.
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.Pq default 0
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.El
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@ -75,17 +75,17 @@ The following
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.Xr sysctl 8
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values are available
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.Bl -tag -width indent
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.It Va dev.est.%d.\%desc
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.It Va dev.est.%d.%desc
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Description of support, almost always Enhanced SpeedStep Frequency Control.
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.It dev.est.0.%desc: Enhanced SpeedStep Frequency Control
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.It Va dev.est.%d.\%driver
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.It Va dev.est.%d.%driver
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Driver in use, always est.
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.It dev.est.0.%driver: est
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.It Va dev.est.%d.\%parent
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.It dev.est.0.%parent: cpu0
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The cpu that is exposing these frequencies.
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.It Va dev.est.%d.%parent
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The CPU that is exposing these frequencies.
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For example
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.Va cpu0 .
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.It dev.est.0.%parent: cpu0
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.It Va dev.est.%d.freq_settings .
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The valid frequencies that are allowed by this CPU and their step values.
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.It dev.est.0.freq_settings: 2201/45000 2200/45000 2000/39581 1900/37387
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