Merge r196200. Add firmware definitions needed by mfiutil
Approved by: re
This commit is contained in:
Scott Long
parent
75f5a2286d
commit
91fa948790
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/stable/8/; revision=196284
@ -27,6 +27,8 @@
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <dev/mfi/mfireg.h>
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#if defined(__amd64__) /* Assume amd64 wants 32 bit Linux */
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struct iovec32 {
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u_int32_t iov_base;
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@ -89,7 +89,7 @@ __FBSDID("$FreeBSD$");
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#define MFI_ODCR0 0xa0 /* outbound doorbell clear register0 */
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#define MFI_OSP0 0xb0 /* outbound scratch pad0 */
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#define MFI_1078_EIM 0x80000004 /* 1078 enable intrrupt mask */
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#define MFI_RMI 0x2 /* reply message interrupt */
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#define MFI_RMI 0x2 /* reply message interrupt */
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#define MFI_1078_RM 0x80000000 /* reply 1078 message interrupt */
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#define MFI_ODC 0x4 /* outbound doorbell change interrupt */
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@ -151,15 +151,41 @@ typedef enum {
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MFI_DCMD_CTRL_EVENT_GETINFO = 0x01040100,
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MFI_DCMD_CTRL_EVENT_GET = 0x01040300,
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MFI_DCMD_CTRL_EVENT_WAIT = 0x01040500,
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MFI_DCMD_PR_GET_STATUS = 0x01070100,
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MFI_DCMD_PR_GET_PROPERTIES = 0x01070200,
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MFI_DCMD_PR_SET_PROPERTIES = 0x01070300,
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MFI_DCMD_PR_START = 0x01070400,
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MFI_DCMD_PR_STOP = 0x01070500,
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MFI_DCMD_TIME_SECS_GET = 0x01080201,
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MFI_DCMD_FLASH_FW_OPEN = 0x010f0100,
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MFI_DCMD_FLASH_FW_DOWNLOAD = 0x010f0200,
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MFI_DCMD_FLASH_FW_FLASH = 0x010f0300,
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MFI_DCMD_FLASH_FW_CLOSE = 0x010f0400,
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MFI_DCMD_PD_GET_LIST = 0x02010000,
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MFI_DCMD_PD_GET_INFO = 0x02020000,
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MFI_DCMD_PD_STATE_SET = 0x02030100,
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MFI_DCMD_PD_REBUILD_START = 0x02040100,
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MFI_DCMD_PD_REBUILD_ABORT = 0x02040200,
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MFI_DCMD_PD_CLEAR_START = 0x02050100,
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MFI_DCMD_PD_CLEAR_ABORT = 0x02050200,
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MFI_DCMD_PD_GET_PROGRESS = 0x02060000,
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MFI_DCMD_PD_LOCATE_START = 0x02070100,
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MFI_DCMD_PD_LOCATE_STOP = 0x02070200,
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MFI_DCMD_LD_GET_LIST = 0x03010000,
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MFI_DCMD_LD_GET_INFO = 0x03020000,
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MFI_DCMD_LD_GET_PROP = 0x03030000,
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MFI_DCMD_LD_SET_PROP = 0x03040000,
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MFI_DCMD_LD_INIT_START = 0x03060100,
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MFI_DCMD_LD_DELETE = 0x03090000,
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MFI_DCMD_CFG_READ = 0x04010000,
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MFI_DCMD_CFG_ADD = 0x04020000,
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MFI_DCMD_CFG_CLEAR = 0x04030000,
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MFI_DCMD_CFG_MAKE_SPARE = 0x04040000,
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MFI_DCMD_CFG_REMOVE_SPARE = 0x04050000,
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MFI_DCMD_CFG_FOREIGN_IMPORT = 0x04060400,
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MFI_DCMD_BBU_GET_STATUS = 0x05010000,
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MFI_DCMD_BBU_GET_CAPACITY_INFO =0x05020000,
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MFI_DCMD_BBU_GET_DESIGN_INFO = 0x05030000,
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MFI_DCMD_CLUSTER = 0x08000000,
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MFI_DCMD_CLUSTER_RESET_ALL = 0x08010100,
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MFI_DCMD_CLUSTER_RESET_LD = 0x08010200
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@ -245,6 +271,9 @@ typedef enum {
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MFI_STAT_RESERVATION_IN_PROGRESS,
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MFI_STAT_I2C_ERRORS_DETECTED,
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MFI_STAT_PCI_ERRORS_DETECTED,
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MFI_STAT_DIAG_FAILED,
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MFI_STAT_BOOT_MSG_PENDING,
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MFI_STAT_FOREIGN_CONFIG_INCOMPLETE,
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MFI_STAT_INVALID_STATUS = 0xFF
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} mfi_status_t;
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@ -303,6 +332,17 @@ typedef enum {
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MR_LD_CACHE_ALLOW_WRITE_CACHE = 0x20,
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MR_LD_CACHE_ALLOW_READ_CACHE = 0x40
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} mfi_ld_cache;
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#define MR_LD_CACHE_MASK 0x7f
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#define MR_LD_CACHE_POLICY_READ_AHEAD_NONE 0
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#define MR_LD_CACHE_POLICY_READ_AHEAD_ALWAYS MR_LD_CACHE_READ_AHEAD
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#define MR_LD_CACHE_POLICY_READ_AHEAD_ADAPTIVE \
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(MR_LD_CACHE_READ_AHEAD | MR_LD_CACHE_READ_ADAPTIVE)
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#define MR_LD_CACHE_POLICY_WRITE_THROUGH 0
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#define MR_LD_CACHE_POLICY_WRITE_BACK MR_LD_CACHE_WRITE_BACK
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#define MR_LD_CACHE_POLICY_IO_CACHED \
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(MR_LD_CACHE_ALLOW_WRITE_CACHE | MR_LD_CACHE_ALLOW_READ_CACHE)
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#define MR_LD_CACHE_POLICY_IO_DIRECT 0
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typedef enum {
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MR_PD_CACHE_UNCHANGED = 0,
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@ -320,6 +360,7 @@ typedef enum {
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#define MFI_DEFAULT_ID -1
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#define MFI_MAX_LUN 8
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#define MFI_MAX_LD 64
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#define MFI_MAX_PD 256
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#define MFI_FRAME_SIZE 64
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#define MFI_MBOX_SIZE 12
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@ -866,12 +907,10 @@ union mfi_pd_ddf_type {
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} __packed;
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struct mfi_pd_progress {
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struct {
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uint32_t rbld : 1;
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uint32_t patrol : 1;
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uint32_t clear : 1;
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uint32_t reserved: 29;
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} active;
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uint32_t active;
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#define MFI_PD_PROGRESS_REBUILD (1<<0)
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#define MFI_PD_PROGRESS_PATROL (1<<1)
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#define MFI_PD_PROGRESS_CLEAR (1<<2)
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struct mfi_progress rbld;
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struct mfi_progress patrol;
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struct mfi_progress clear;
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@ -890,8 +929,8 @@ struct mfi_pd_info {
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uint32_t other_err_count;
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uint32_t pred_fail_count;
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uint32_t last_pred_fail_event_seq_num;
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uint16_t fw_state;
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uint8_t disable_for_removal;
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uint16_t fw_state; /* MFI_PD_STATE_* */
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uint8_t disabled_for_removal;
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uint8_t link_speed;
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union mfi_pd_ddf_type state;
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struct {
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@ -918,7 +957,7 @@ struct mfi_pd_address {
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uint16_t encl_device_id;
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uint8_t encl_index;
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uint8_t slot_number;
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uint8_t scsi_dev_type;
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uint8_t scsi_dev_type; /* 0 = disk */
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uint8_t connect_port_bitmap;
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uint64_t sas_addr[2];
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} __packed;
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@ -926,12 +965,19 @@ struct mfi_pd_address {
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struct mfi_pd_list {
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uint32_t size;
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uint32_t count;
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uint8_t data;
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/*
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struct mfi_pd_address addr[];
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*/
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struct mfi_pd_address addr[0];
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} __packed;
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enum mfi_pd_state {
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MFI_PD_STATE_UNCONFIGURED_GOOD = 0x00,
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MFI_PD_STATE_UNCONFIGURED_BAD = 0x01,
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MFI_PD_STATE_HOT_SPARE = 0x02,
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MFI_PD_STATE_OFFLINE = 0x10,
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MFI_PD_STATE_FAILED = 0x11,
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MFI_PD_STATE_REBUILD = 0x14,
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MFI_PD_STATE_ONLINE = 0x18
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};
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union mfi_ld_ref {
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struct {
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uint8_t target_id;
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@ -986,6 +1032,9 @@ struct mfi_ld_params {
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uint8_t span_depth;
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uint8_t state;
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uint8_t init_state;
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#define MFI_LD_PARAMS_INIT_NO 0
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#define MFI_LD_PARAMS_INIT_QUICK 1
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#define MFI_LD_PARAMS_INIT_FULL 2
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uint8_t is_consistent;
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uint8_t reserved[23];
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} __packed;
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@ -995,7 +1044,7 @@ struct mfi_ld_progress {
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#define MFI_LD_PROGRESS_CC (1<<0)
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#define MFI_LD_PROGRESS_BGI (1<<1)
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#define MFI_LD_PROGRESS_FGI (1<<2)
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#define MFI_LD_PORGRESS_RECON (1<<3)
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#define MFI_LD_PROGRESS_RECON (1<<3)
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struct mfi_progress cc;
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struct mfi_progress bgi;
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struct mfi_progress fgi;
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@ -1028,26 +1077,18 @@ struct mfi_ld_info {
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uint8_t reserved2[16];
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} __packed;
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union mfi_spare_type {
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struct {
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uint8_t is_dedicate :1;
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uint8_t is_revertable :1;
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uint8_t is_encl_affinity :1;
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uint8_t reserved :5;
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} v;
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uint8_t type;
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} __packed;
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#define MAX_ARRAYS 16
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struct mfi_spare {
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union mfi_pd_ref ref;
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union mfi_spare_type spare_type;
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uint8_t spare_type;
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#define MFI_SPARE_DEDICATED (1 << 0)
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#define MFI_SPARE_REVERTIBLE (1 << 1)
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#define MFI_SPARE_ENCL_AFFINITY (1 << 2)
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uint8_t reserved[2];
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uint8_t array_count;
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uint16_t array_refd[MAX_ARRAYS];
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uint16_t array_ref[MAX_ARRAYS];
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} __packed;
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#define MAX_ROW_SIZE 32
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struct mfi_array {
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uint64_t size;
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uint8_t num_drives;
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@ -1055,13 +1096,13 @@ struct mfi_array {
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uint16_t array_ref;
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uint8_t pad[20];
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struct {
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union mfi_pd_ref ref;
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uint16_t fw_state;
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union mfi_pd_ref ref; /* 0xffff == missing drive */
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uint16_t fw_state; /* MFI_PD_STATE_* */
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struct {
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uint8_t pd;
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uint8_t slot;
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} encl;
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} pd[MAX_ROW_SIZE];
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} pd[0];
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} __packed;
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struct mfi_config_data {
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@ -1073,14 +1114,118 @@ struct mfi_config_data {
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uint16_t spares_count;
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uint16_t spares_size;
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uint8_t reserved[16];
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uint8_t data;
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/*
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struct mfi_array array[];
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struct mfi_ld_config ld[];
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struct mfi_spare spare[];
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*/
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struct mfi_array array[0];
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struct mfi_ld_config ld[0];
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struct mfi_spare spare[0];
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} __packed;
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struct mfi_bbu_capacity_info {
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uint16_t relative_charge;
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uint16_t absolute_charge;
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uint16_t remaining_capacity;
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uint16_t full_charge_capacity;
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uint16_t run_time_to_empty;
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uint16_t average_time_to_empty;
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uint16_t average_time_to_full;
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uint16_t cycle_count;
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uint16_t max_error;
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uint16_t remaining_capacity_alarm;
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uint16_t remaining_time_alarm;
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uint8_t reserved[26];
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} __packed;
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struct mfi_bbu_design_info {
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uint32_t mfg_date;
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uint16_t design_capacity;
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uint16_t design_voltage;
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uint16_t spec_info;
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uint16_t serial_number;
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uint16_t pack_stat_config;
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uint8_t mfg_name[12];
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uint8_t device_name[8];
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uint8_t device_chemistry[8];
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uint8_t mfg_data[8];
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uint8_t reserved[17];
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} __packed;
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struct mfi_ibbu_state {
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uint16_t gas_guage_status;
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uint16_t relative_charge;
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uint16_t charger_system_state;
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uint16_t charger_system_ctrl;
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uint16_t charging_current;
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uint16_t absolute_charge;
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uint16_t max_error;
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uint8_t reserved[18];
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} __packed;
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struct mfi_bbu_state {
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uint16_t gas_guage_status;
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uint16_t relative_charge;
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uint16_t charger_status;
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uint16_t remaining_capacity;
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uint16_t full_charge_capacity;
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uint8_t is_SOH_good;
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uint8_t reserved[21];
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} __packed;
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union mfi_bbu_status_detail {
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struct mfi_ibbu_state ibbu;
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struct mfi_bbu_state bbu;
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};
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struct mfi_bbu_status {
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uint8_t battery_type;
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#define MFI_BBU_TYPE_NONE 0
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#define MFI_BBU_TYPE_IBBU 1
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#define MFI_BBU_TYPE_BBU 2
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uint8_t reserved;
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uint16_t voltage;
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int16_t current;
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uint16_t temperature;
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uint32_t fw_status;
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#define MFI_BBU_STATE_PACK_MISSING (1 << 0)
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#define MFI_BBU_STATE_VOLTAGE_LOW (1 << 1)
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#define MFI_BBU_STATE_TEMPERATURE_HIGH (1 << 2)
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#define MFI_BBU_STATE_CHARGE_ACTIVE (1 << 0)
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#define MFI_BBU_STATE_DISCHARGE_ACTIVE (1 << 0)
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uint8_t pad[20];
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union mfi_bbu_status_detail detail;
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} __packed;
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enum mfi_pr_state {
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MFI_PR_STATE_STOPPED = 0,
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MFI_PR_STATE_READY = 1,
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MFI_PR_STATE_ACTIVE = 2,
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MFI_PR_STATE_ABORTED = 0xff
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};
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struct mfi_pr_status {
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uint32_t num_iteration;
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uint8_t state;
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uint8_t num_pd_done;
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uint8_t reserved[10];
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};
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enum mfi_pr_opmode {
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MFI_PR_OPMODE_AUTO = 0,
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MFI_PR_OPMODE_MANUAL = 1,
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MFI_PR_OPMODE_DISABLED = 2
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};
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struct mfi_pr_properties {
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uint8_t op_mode;
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uint8_t max_pd;
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uint8_t reserved;
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uint8_t exclude_ld_count;
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uint16_t excluded_ld[MFI_MAX_LD];
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uint8_t cur_pd_map[MFI_MAX_PD / 8];
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uint8_t last_pd_map[MFI_MAX_PD / 8];
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uint32_t next_exec;
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uint32_t exec_freq;
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uint32_t clear_freq;
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};
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#define MFI_SCSI_MAX_TARGETS 128
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#define MFI_SCSI_MAX_LUNS 8
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#define MFI_SCSI_INITIATOR_ID 255
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