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MFC r200655:

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Serverworks OSB4 has no 0x4a (piomode) register, do not touch it.
Also OSB4 has some problems with UDMA transfers, limit it to WDMA2.
This commit is contained in:
Alexander Motin 2010-01-19 13:07:25 +00:00
parent b136f43d44
commit 928e4114fe
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/stable/8/; revision=202617
1 changed files with 4 additions and 2 deletions
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6
sys/dev/ata/chipsets/ata-serverworks.c
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@ -80,7 +80,7 @@ ata_serverworks_probe(device_t dev)
{
struct ata_pci_controller *ctlr = device_get_softc(dev);
static struct ata_chip_id ids[] =
{{ ATA_ROSB4, 0x00, SWKS_33, 0, ATA_UDMA2, "ROSB4" },
{{ ATA_ROSB4, 0x00, SWKS_33, 0, ATA_WDMA2, "ROSB4" },
{ ATA_CSB5, 0x92, SWKS_100, 0, ATA_UDMA5, "CSB5" },
{ ATA_CSB5, 0x00, SWKS_66, 0, ATA_UDMA4, "CSB5" },
{ ATA_CSB6, 0x00, SWKS_100, 0, ATA_UDMA5, "CSB6" },
@ -388,10 +388,12 @@ ata_serverworks_setmode(device_t dev, int target, int mode)
piomode = mode;
}
/* Set PIO mode and timings, calculated above. */
pci_write_config(parent, 0x4a,
if (ctlr->chip->cfg1 != SWKS_33) {
pci_write_config(parent, 0x4a,
(pci_read_config(parent, 0x4a, 2) &
~(0xf << (devno << 2))) |
((piomode - ATA_PIO0) << (devno<<2)),2);
}
pci_write_config(parent, 0x40,
(pci_read_config(parent, 0x40, 4) &
~(0xff << offset)) |