o Try to do 3.3V support better for the 6722 and 6729/30.

o Bite the bullet and create controller types for the 6729 and also for
  the 673x.  Rename the 672x to 6722.
o Define minimal extended register info (just register 0xa for reading VS[12]).

# I think the last version may have broken 673x controllers, but this should
# fix them.

Tested on the 6722, but not the 6729.

Ideas from: Chiharu Shibata-san's article in bsd-nomads:15866
This commit is contained in:
Warner Losh 2001-11-09 07:33:54 +00:00
parent 3761b249c9
commit 93da209126
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=86207
4 changed files with 57 additions and 26 deletions

View File

@ -39,8 +39,8 @@
#define PCIC_I82365 0 /* Intel i82365SL-A/B or clone */
#define PCIC_IBM 1 /* IBM clone */
#define PCIC_VLSI 2 /* VLSI chip */
#define PCIC_PD672X 3 /* Cirrus logic 672x */
#define PCIC_PD6710 4 /* Cirrus logic 6710 */
#define PCIC_PD6722 3 /* Cirrus logic PD6722 */
#define PCIC_PD6710 4 /* Cirrus logic PD6710 */
#define PCIC_VG365 5 /* Vadem 365 */
#define PCIC_VG465 6 /* Vadem 465 */
#define PCIC_VG468 7 /* Vadem 468 */
@ -49,6 +49,8 @@
#define PCIC_RF5C396 10 /* Ricoh RF5C396 */
#define PCIC_IBM_KING 11 /* IBM KING PCMCIA Controller */
#define PCIC_I82365SL_DF 12 /* Intel i82365sl-DF step */
#define PCIC_PD6729 13 /* Cirrus Logic PD6729 */
#define PCIC_PD673X 14 /* Cirrus Logic PD673x */
/*
* Address of the controllers. Each controller can manage
@ -81,10 +83,12 @@
#define PCIC_IO1 0x0c /* I/O Address 1 */
#define PCIC_MEMBASE 0x10 /* Base of memory window registers */
#define PCIC_CDGC 0x16 /* Card Detect and General Control */
#define PCIC_MISC1 0x16 /* PD672x: Misc control register 1 per slot */
#define PCIC_MISC1 0x16 /* PD67xx: Misc control register 1 per slot */
#define PCIC_GLO_CTRL 0x1e /* Global Control Register */
#define PCIC_MISC2 0x1e /* PD672x: Misc control register 2 per chip */
#define PCIC_MISC2 0x1e /* PD67xx: Misc control register 2 per chip */
#define PCIC_CLCHIP 0x1f /* PD67xx: Chip I/D */
#define PCIC_EXT_IND 0x2e /* PD67xx: Extended Index */
#define PCIC_EXTENDED 0x2f /* PD67xx: Extended register */
#define PCIC_CVSR 0x2f /* Vadem: Voltage select register */
#define PCIC_RICOH_MCR2 0x2f /* Ricoh: Mode Control Register 2 */
@ -248,6 +252,15 @@
#define PCIC_CLC_TOGGLE 0xc0 /* These bits toggle 1 -> 0 */
#define PCIC_CLC_DUAL 0x20 /* Single/dual socket version */
/* Cirrus Logic: Extended Registers (PCIC_EXT_IND) */
#define PCIC_EXT_DATA 0x0a /* External Data */
/* EXT_DATA */
#define PCIC_VS1A 0x01
#define PCIC_VS2A 0x02
#define PCIC_VS1B 0x04
#define PCIC_VS2B 0x08
/* Vadem: Card Voltage Select register (PCIC_CVSR) */
#define PCIC_CVSR_VS 0x03 /* Voltage select */
#define PCIC_CVSR_VS_5 0x00 /* 5.0 V */

View File

@ -558,6 +558,7 @@ pcic_power(struct slot *slt)
unsigned char c;
unsigned char reg = PCIC_DISRST | PCIC_PCPWRE;
struct pcic_slot *sp = slt->cdata;
struct pcic_slot *sp2;
struct pcic_softc *sc = sp->sc;
/*
@ -577,19 +578,36 @@ pcic_power(struct slot *slt)
}
if (sc->flags & PCIC_PD_POWER) {
/*
* Datasheets indicate that this is only supported on
* the CL-PD6710. However, my 6722 seems to support
* it as well. The datasheet for the '22 talks about
* the need to read this from register 0x6f.0xa (both
* slots are read from the same register). The
* datasheet is a little vauge. The '29 datasheet is
* clear and spells out the recommends way on the '22
* is the way on the '29. Note: PCIC_MISC1_5V_DETECT
* is definitely not defined on the '29.
* The 6710 does it one way, and the '22 and '29 do it
* another. And it appears that the '32 and '33 yet
* another way (which I don't know).
*/
c = sp->getb(sp, PCIC_MISC1);
if ((c & PCIC_MISC1_5V_DETECT) == 0)
slt->pwr.vcc = 33;
switch (sp->controller) {
case PCIC_PD6710:
c = sp->getb(sp, PCIC_MISC1);
if ((c & PCIC_MISC1_5V_DETECT) == 0)
slt->pwr.vcc = 33;
break;
case PCIC_PD6722:
case PCIC_PD6729:
/*
* VS[12] signals are in slot1's extended reg 0xa.
*/
sp2 = &sc->slots[1];
sp2->putb(sp2, PCIC_EXT_IND, PCIC_EXT_DATA);
c = sp2->getb(sp2, PCIC_EXTENDED);
if (sp == sp2) { /* slot 1 */
if ((c & PCIC_VS1B) == 0)
slt->pwr.vcc = 33;
} else {
if ((c & PCIC_VS1A) == 0)
slt->pwr.vcc = 33;
}
break;
default:
/* I have no idea how do do this for others */
break;
}
/*
* Regardless of the above, setting the Auto Power Switch
@ -757,7 +775,7 @@ pcic_reset(void *chan)
}
}
slt->insert_seq = 0;
if (sp->controller == PCIC_PD672X || sp->controller == PCIC_PD6710) {
if (sp->controller == PCIC_PD6722 || sp->controller == PCIC_PD6710) {
sp->putb(sp, PCIC_TIME_SETUP0, 0x1);
sp->putb(sp, PCIC_TIME_CMD0, 0x6);
sp->putb(sp, PCIC_TIME_RECOV0, 0x0);
@ -790,7 +808,7 @@ pcic_resume(struct slot *slt)
struct pcic_slot *sp = slt->cdata;
pcic_do_mgt_irq(sp, slt->irq);
if (sp->controller == PCIC_PD672X) {
if (sp->controller == PCIC_PD6722) {
pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_SPEAKER);
pcic_setb(sp, PCIC_MISC2, PCIC_LPDM_EN);
}

View File

@ -63,7 +63,7 @@ static struct {
{ "Intel i82365SL-A/B", PCIC_AB_POWER},
{ "IBM PCIC", PCIC_AB_POWER},
{ "VLSI 82C146", PCIC_AB_POWER},
{ "Cirrus logic 672x", PCIC_PD_POWER},
{ "Cirrus logic 6722", PCIC_PD_POWER},
{ "Cirrus logic 6710", PCIC_PD_POWER},
{ "Vadem 365", PCIC_VG_POWER},
{ "Vadem 465", PCIC_VG_POWER},
@ -251,7 +251,7 @@ pcic_isa_probe(device_t dev)
c = sp->getb(sp, PCIC_CLCHIP);
if ((c & PCIC_CLC_TOGGLE) == 0) {
if (c & PCIC_CLC_DUAL)
sp->controller = PCIC_PD672X;
sp->controller = PCIC_PD6722;
else
sp->controller = PCIC_PD6710;
sp->revision = 8 - ((c & 0x1F) >> 2);
@ -272,7 +272,7 @@ pcic_isa_probe(device_t dev)
* that claims to reduce power consumption by 30%, so
* enable it and hope for the best.
*/
if (sp->controller == PCIC_PD672X) {
if (sp->controller == PCIC_PD6722) {
pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_SPEAKER);
pcic_setb(sp, PCIC_MISC2, PCIC_LPDM_EN);
}

View File

@ -196,16 +196,16 @@ struct pcic_pci_table
} pcic_pci_devs[] = {
{ PCI_DEVICE_ID_PCIC_CLPD6729,
"Cirrus Logic PD6729/6730 PC-Card Controller",
PCIC_PD672X, PCIC_PD_POWER, &pcic_pci_pd67xx_chip },
PCIC_PD6729, PCIC_PD_POWER, &pcic_pci_pd67xx_chip },
{ PCI_DEVICE_ID_PCIC_CLPD6832,
"Cirrus Logic PD6832 PCI-CardBus Bridge",
PCIC_PD672X, PCIC_PD_POWER, &pcic_pci_pd68xx_chip },
PCIC_PD673X, PCIC_PD_POWER, &pcic_pci_pd68xx_chip },
{ PCI_DEVICE_ID_PCIC_CLPD6833,
"Cirrus Logic PD6833 PCI-CardBus Bridge",
PCIC_PD672X, PCIC_PD_POWER, &pcic_pci_pd68xx_chip },
PCIC_PD673X, PCIC_PD_POWER, &pcic_pci_pd68xx_chip },
{ PCI_DEVICE_ID_PCIC_CLPD6834,
"Cirrus Logic PD6834 PCI-CardBus Bridge",
PCIC_PD672X, PCIC_PD_POWER, &pcic_pci_pd68xx_chip },
PCIC_PD673X, PCIC_PD_POWER, &pcic_pci_pd68xx_chip },
{ PCI_DEVICE_ID_PCIC_OZ6729,
"O2micro OZ6729 PC-Card Bridge",
PCIC_I82365, PCIC_AB_POWER, &pcic_pci_oz67xx_chip },
@ -1185,7 +1185,7 @@ pcic_pci_attach(device_t dev)
sp[i].getb = pcic_getb_io;
sp[i].putb = pcic_putb_io;
sp[i].offset = i * PCIC_SLOT_SIZE;
sp[i].controller = PCIC_PD672X;
sp[i].controller = PCIC_PD6729;
if ((sp[i].getb(&sp[i], PCIC_ID_REV) & 0xc0) == 0x80)
sp[i].slt = (struct slot *) 1;
}