From 96f3c2adbe557a242a6b0dd0b665fdc852976155 Mon Sep 17 00:00:00 2001 From: Justin Hibbits Date: Thu, 16 Jul 2015 05:13:08 +0000 Subject: [PATCH] Fix userland program exception handling for powerpc64. It appears that the linker will not handle 64-bit relocations at addresses that are not aligned to 8-byte boundaries. Prior to this change the line: .llong generictrap was aligned to a 4-byte address, and the linker replaced that with an 8-byte 0x0. Aligning that address to 8 bytes caused the linker to generate the proper relocation. As a follow-through, the dblow from trap_subr33.S used the code sequence 'lwz %r1, TRAP_GENTRAP(0)', so this reproduces the analogue of that for 64-bit. --- sys/powerpc/aim/trap_subr64.S | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/sys/powerpc/aim/trap_subr64.S b/sys/powerpc/aim/trap_subr64.S index 5f531551b344..7ad0a7039ea2 100644 --- a/sys/powerpc/aim/trap_subr64.S +++ b/sys/powerpc/aim/trap_subr64.S @@ -842,11 +842,7 @@ CNAME(dblow): mflr %r1 /* save LR */ mtsprg2 %r1 /* And then in SPRG2 */ - nop /* Begin branching to generictrap */ - bl 9f - .llong generictrap -9: mflr %r1 - ld %r1,0(%r1) + ld %r1, TRAP_GENTRAP(0) /* Get branch address */ mtlr %r1 li %r1, 0 /* How to get the vector from LR */ blrl /* Branch to generictrap */