Update build glue for a minimal build of the clang executable.
This commit is contained in:
parent
38b6f45657
commit
9771cac291
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/projects/clang1000-import/; revision=357127
@ -5,14 +5,11 @@
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.PATH: ${CLANG_SRCS}/lib/Headers
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INCSGROUPS= INCS CUDA FUZZ OMP PPC PROF SAN
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INCSGROUPS= INCS CUDA OMP PPC
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INCSDIR= ${LIBDIR}/clang/10.0.0/include
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CUDADIR= ${INCSDIR}/cuda_wrappers
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FUZZDIR= ${INCSDIR}/fuzzer
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OMPDIR= ${INCSDIR}/openmp_wrappers
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PPCDIR= ${INCSDIR}/ppc_wrappers
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PROFDIR= ${INCSDIR}/profile
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SANDIR= ${INCSDIR}/sanitizer
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GENINCS+= arm_fp16.h
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GENINCS+= arm_mve.h
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@ -149,8 +146,6 @@ CUDA+= cuda_wrappers/algorithm
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CUDA+= cuda_wrappers/complex
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CUDA+= cuda_wrappers/new
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FUZZ+= fuzzer/FuzzedDataProvider.h
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OMP+= openmp_wrappers/__clang_openmp_math.h
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OMP+= openmp_wrappers/__clang_openmp_math_declares.h
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OMP+= openmp_wrappers/cmath
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@ -164,27 +159,6 @@ PPC+= ppc_wrappers/smmintrin.h
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PPC+= ppc_wrappers/tmmintrin.h
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PPC+= ppc_wrappers/xmmintrin.h
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PROF+= profile/InstrProfData.inc
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SAN+= sanitizer/allocator_interface.h
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SAN+= sanitizer/asan_interface.h
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SAN+= sanitizer/common_interface_defs.h
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SAN+= sanitizer/coverage_interface.h
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SAN+= sanitizer/dfsan_interface.h
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SAN+= sanitizer/hwasan_interface.h
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SAN+= sanitizer/linux_syscall_hooks.h
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SAN+= sanitizer/lsan_interface.h
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SAN+= sanitizer/msan_interface.h
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SAN+= sanitizer/netbsd_syscall_hooks.h
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SAN+= sanitizer/scudo_interface.h
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SAN+= sanitizer/tsan_interface.h
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SAN+= sanitizer/tsan_interface_atomic.h
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SAN+= sanitizer/ubsan_interface.h
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XRAY+= xray/xray_interface.h
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XRAY+= xray/xray_log_interface.h
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XRAY+= xray/xray_records.h
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arm_fp16.h: ${CLANG_SRCS}/include/clang/Basic/arm_fp16.td
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${CLANG_TBLGEN} -gen-arm-fp16 \
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-I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \
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3
lib/clang/include/llvm/Support/Extension.def
Normal file
3
lib/clang/include/llvm/Support/Extension.def
Normal file
@ -0,0 +1,3 @@
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// $FreeBSD$
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//extension handlers
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#undef HANDLE_EXTENSION
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@ -47,6 +47,7 @@ SRCS_FUL+= ARCMigrate/TransZeroOutPropsInDealloc.cpp
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SRCS_FUL+= ARCMigrate/TransformActions.cpp
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SRCS_FUL+= ARCMigrate/Transforms.cpp
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SRCS_MIN+= AST/APValue.cpp
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SRCS_MIN+= AST/ASTConcept.cpp
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SRCS_MIN+= AST/ASTConsumer.cpp
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SRCS_MIN+= AST/ASTContext.cpp
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SRCS_MIN+= AST/ASTDiagnostic.cpp
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@ -78,12 +79,33 @@ SRCS_MIN+= AST/DeclarationName.cpp
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SRCS_MIN+= AST/Expr.cpp
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SRCS_MIN+= AST/ExprCXX.cpp
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SRCS_MIN+= AST/ExprClassification.cpp
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SRCS_MIN+= AST/ExprConcepts.cpp
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SRCS_MIN+= AST/ExprConstant.cpp
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SRCS_MIN+= AST/ExprObjC.cpp
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SRCS_LDB+= AST/ExternalASTMerger.cpp
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SRCS_MIN+= AST/ExternalASTSource.cpp
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SRCS_MIN+= AST/FormatString.cpp
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SRCS_MIN+= AST/InheritViz.cpp
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SRCS_MIN+= AST/Interp/Block.cpp
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SRCS_MIN+= AST/Interp/ByteCodeEmitter.cpp
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SRCS_MIN+= AST/Interp/ByteCodeExprGen.cpp
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SRCS_MIN+= AST/Interp/ByteCodeGenError.cpp
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SRCS_MIN+= AST/Interp/ByteCodeStmtGen.cpp
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SRCS_MIN+= AST/Interp/Context.cpp
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SRCS_MIN+= AST/Interp/Descriptor.cpp
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SRCS_MIN+= AST/Interp/EvalEmitter.cpp
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SRCS_MIN+= AST/Interp/Frame.cpp
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SRCS_MIN+= AST/Interp/Function.cpp
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SRCS_MIN+= AST/Interp/Interp.cpp
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SRCS_MIN+= AST/Interp/InterpFrame.cpp
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SRCS_MIN+= AST/Interp/InterpStack.cpp
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SRCS_MIN+= AST/Interp/InterpState.cpp
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SRCS_MIN+= AST/Interp/Pointer.cpp
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SRCS_MIN+= AST/Interp/PrimType.cpp
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SRCS_MIN+= AST/Interp/Program.cpp
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SRCS_MIN+= AST/Interp/Record.cpp
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SRCS_MIN+= AST/Interp/Source.cpp
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SRCS_MIN+= AST/Interp/State.cpp
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SRCS_MIN+= AST/ItaniumCXXABI.cpp
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SRCS_MIN+= AST/ItaniumMangle.cpp
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SRCS_MIN+= AST/JSONNodeDumper.cpp
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@ -159,6 +181,7 @@ SRCS_MIN+= Basic/FileSystemStatCache.cpp
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SRCS_MIN+= Basic/FixedPoint.cpp
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SRCS_MIN+= Basic/IdentifierTable.cpp
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SRCS_MIN+= Basic/LangOptions.cpp
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SRCS_MIN+= Basic/LangStandards.cpp
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SRCS_MIN+= Basic/Module.cpp
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SRCS_MIN+= Basic/ObjCRuntime.cpp
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SRCS_MIN+= Basic/OpenMPKinds.cpp
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@ -168,6 +191,7 @@ SRCS_MIN+= Basic/SanitizerSpecialCaseList.cpp
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SRCS_MIN+= Basic/Sanitizers.cpp
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SRCS_MIN+= Basic/SourceLocation.cpp
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SRCS_MIN+= Basic/SourceManager.cpp
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SRCS_MIN+= Basic/Stack.cpp
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SRCS_MIN+= Basic/TargetInfo.cpp
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SRCS_MIN+= Basic/Targets.cpp
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SRCS_MIN+= Basic/Targets/AArch64.cpp
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@ -262,10 +286,12 @@ SRCS_MIN+= Driver/Driver.cpp
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SRCS_MIN+= Driver/DriverOptions.cpp
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SRCS_MIN+= Driver/Job.cpp
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SRCS_MIN+= Driver/Multilib.cpp
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SRCS_MIN+= Driver/OptionUtils.cpp
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SRCS_MIN+= Driver/Phases.cpp
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SRCS_MIN+= Driver/SanitizerArgs.cpp
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SRCS_MIN+= Driver/Tool.cpp
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SRCS_MIN+= Driver/ToolChain.cpp
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SRCS_MIN+= Driver/ToolChains/AIX.cpp
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SRCS_MIN+= Driver/ToolChains/AMDGPU.cpp
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SRCS_MIN+= Driver/ToolChains/AVR.cpp
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SRCS_MIN+= Driver/ToolChains/Ananas.cpp
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@ -286,6 +312,7 @@ SRCS_MIN+= Driver/ToolChains/CrossWindows.cpp
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SRCS_MIN+= Driver/ToolChains/Cuda.cpp
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SRCS_MIN+= Driver/ToolChains/Darwin.cpp
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SRCS_MIN+= Driver/ToolChains/DragonFly.cpp
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SRCS_MIN+= Driver/ToolChains/Flang.cpp
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SRCS_MIN+= Driver/ToolChains/FreeBSD.cpp
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SRCS_MIN+= Driver/ToolChains/Fuchsia.cpp
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SRCS_MIN+= Driver/ToolChains/Gnu.cpp
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@ -293,6 +320,7 @@ SRCS_MIN+= Driver/ToolChains/HIP.cpp
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SRCS_MIN+= Driver/ToolChains/Haiku.cpp
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SRCS_MIN+= Driver/ToolChains/Hexagon.cpp
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SRCS_MIN+= Driver/ToolChains/Hurd.cpp
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SRCS_MIN+= Driver/ToolChains/InterfaceStubs.cpp
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SRCS_MIN+= Driver/ToolChains/Linux.cpp
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SRCS_MIN+= Driver/ToolChains/MSP430.cpp
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SRCS_MIN+= Driver/ToolChains/MSVC.cpp
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@ -348,7 +376,6 @@ SRCS_MIN+= Frontend/HeaderIncludeGen.cpp
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SRCS_MIN+= Frontend/InitHeaderSearch.cpp
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SRCS_MIN+= Frontend/InitPreprocessor.cpp
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SRCS_MIN+= Frontend/InterfaceStubFunctionsConsumer.cpp
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SRCS_MIN+= Frontend/LangStandards.cpp
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SRCS_MIN+= Frontend/LayoutOverrideSource.cpp
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SRCS_MIN+= Frontend/LogDiagnosticPrinter.cpp
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SRCS_MIN+= Frontend/ModuleDependencyCollector.cpp
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@ -437,6 +464,7 @@ SRCS_MIN+= Sema/SemaCXXScopeSpec.cpp
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SRCS_MIN+= Sema/SemaCast.cpp
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SRCS_MIN+= Sema/SemaChecking.cpp
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SRCS_MIN+= Sema/SemaCodeComplete.cpp
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SRCS_MIN+= Sema/SemaConcept.cpp
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SRCS_MIN+= Sema/SemaConsumer.cpp
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SRCS_MIN+= Sema/SemaCoroutine.cpp
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SRCS_MIN+= Sema/SemaDecl.cpp
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@ -477,7 +505,7 @@ SRCS_MIN+= Serialization/ASTWriterStmt.cpp
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SRCS_MIN+= Serialization/GeneratePCH.cpp
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SRCS_MIN+= Serialization/GlobalModuleIndex.cpp
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SRCS_MIN+= Serialization/InMemoryModuleCache.cpp
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SRCS_MIN+= Serialization/Module.cpp
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SRCS_MIN+= Serialization/ModuleFile.cpp
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SRCS_MIN+= Serialization/ModuleFileExtension.cpp
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SRCS_MIN+= Serialization/ModuleManager.cpp
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SRCS_MIN+= Serialization/PCHContainerOperations.cpp
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@ -519,7 +547,6 @@ SRCS_FUL+= StaticAnalyzer/Checkers/GTestChecker.cpp
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SRCS_FUL+= StaticAnalyzer/Checkers/GenericTaintChecker.cpp
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SRCS_FUL+= StaticAnalyzer/Checkers/IdenticalExprChecker.cpp
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SRCS_FUL+= StaticAnalyzer/Checkers/InnerPointerChecker.cpp
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SRCS_FUL+= StaticAnalyzer/Checkers/IteratorChecker.cpp
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SRCS_FUL+= StaticAnalyzer/Checkers/IvarInvalidationChecker.cpp
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SRCS_FUL+= StaticAnalyzer/Checkers/LLVMConventionsChecker.cpp
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SRCS_FUL+= StaticAnalyzer/Checkers/LocalizationChecker.cpp
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@ -601,7 +628,6 @@ SRCS_FUL+= StaticAnalyzer/Core/CheckerManager.cpp
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SRCS_FUL+= StaticAnalyzer/Core/CommonBugCategories.cpp
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SRCS_FUL+= StaticAnalyzer/Core/ConstraintManager.cpp
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SRCS_FUL+= StaticAnalyzer/Core/CoreEngine.cpp
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SRCS_FUL+= StaticAnalyzer/Core/DynamicTypeMap.cpp
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SRCS_FUL+= StaticAnalyzer/Core/Environment.cpp
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SRCS_FUL+= StaticAnalyzer/Core/ExplodedGraph.cpp
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SRCS_FUL+= StaticAnalyzer/Core/ExprEngine.cpp
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@ -615,7 +641,6 @@ SRCS_FUL+= StaticAnalyzer/Core/IssueHash.cpp
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SRCS_FUL+= StaticAnalyzer/Core/LoopUnrolling.cpp
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SRCS_FUL+= StaticAnalyzer/Core/LoopWidening.cpp
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SRCS_FUL+= StaticAnalyzer/Core/MemRegion.cpp
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SRCS_FUL+= StaticAnalyzer/Core/PathDiagnostic.cpp
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SRCS_FUL+= StaticAnalyzer/Core/PlistDiagnostics.cpp
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SRCS_FUL+= StaticAnalyzer/Core/ProgramState.cpp
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SRCS_FUL+= StaticAnalyzer/Core/RangeConstraintManager.cpp
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@ -662,6 +687,34 @@ SRCS_ALL+= ${SRCS_LDB}
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.endif
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SRCS+= ${SRCS_ALL:O}
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clang/AST/AbstractBasicReader.inc: \
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${CLANG_SRCS}/include/clang/AST/PropertiesBase.td
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${CLANG_TBLGEN} -gen-clang-basic-reader \
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-I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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${CLANG_SRCS}/include/clang/AST/PropertiesBase.td
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TGHDRS+= clang/AST/AbstractBasicReader.inc
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clang/AST/AbstractBasicWriter.inc: \
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${CLANG_SRCS}/include/clang/AST/PropertiesBase.td
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${CLANG_TBLGEN} -gen-clang-basic-writer \
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-I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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${CLANG_SRCS}/include/clang/AST/PropertiesBase.td
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TGHDRS+= clang/AST/AbstractBasicWriter.inc
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clang/AST/AbstractTypeReader.inc: \
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${CLANG_SRCS}/include/clang/AST/TypeProperties.td
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${CLANG_TBLGEN} -gen-clang-type-reader \
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-I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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${CLANG_SRCS}/include/clang/AST/TypeProperties.td
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TGHDRS+= clang/AST/AbstractTypeReader.inc
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clang/AST/AbstractTypeWriter.inc: \
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${CLANG_SRCS}/include/clang/AST/TypeProperties.td
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${CLANG_TBLGEN} -gen-clang-type-writer \
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-I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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${CLANG_SRCS}/include/clang/AST/TypeProperties.td
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TGHDRS+= clang/AST/AbstractTypeWriter.inc
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clang/AST/AttrImpl.inc: ${CLANG_SRCS}/include/clang/Basic/Attr.td
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${CLANG_TBLGEN} -gen-clang-attr-impl \
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-I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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@ -729,17 +782,18 @@ TGHDRS+= clang/AST/CommentHTMLTagsProperties.inc
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clang/AST/CommentNodes.inc: ${CLANG_SRCS}/include/clang/Basic/CommentNodes.td
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${CLANG_TBLGEN} -gen-clang-comment-nodes \
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-d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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-I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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${CLANG_SRCS}/include/clang/Basic/CommentNodes.td
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TGHDRS+= clang/AST/CommentNodes.inc
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clang/AST/DeclNodes.inc: ${CLANG_SRCS}/include/clang/Basic/DeclNodes.td
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${CLANG_TBLGEN} -gen-clang-decl-nodes \
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-d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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-I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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${CLANG_SRCS}/include/clang/Basic/DeclNodes.td
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TGHDRS+= clang/AST/DeclNodes.inc
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clang/AST/StmtDataCollectors.inc: ${CLANG_SRCS}/include/clang/AST/StmtDataCollectors.td
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clang/AST/StmtDataCollectors.inc: \
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${CLANG_SRCS}/include/clang/AST/StmtDataCollectors.td
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${CLANG_TBLGEN} -gen-clang-data-collectors \
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-d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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${CLANG_SRCS}/include/clang/AST/StmtDataCollectors.td
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@ -747,10 +801,16 @@ TGHDRS+= clang/AST/StmtDataCollectors.inc
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clang/AST/StmtNodes.inc: ${CLANG_SRCS}/include/clang/Basic/StmtNodes.td
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${CLANG_TBLGEN} -gen-clang-stmt-nodes \
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-d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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-I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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${CLANG_SRCS}/include/clang/Basic/StmtNodes.td
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TGHDRS+= clang/AST/StmtNodes.inc
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clang/AST/TypeNodes.inc: ${CLANG_SRCS}/include/clang/Basic/TypeNodes.td
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${CLANG_TBLGEN} -gen-clang-type-nodes \
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-I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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${CLANG_SRCS}/include/clang/Basic/TypeNodes.td
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TGHDRS+= clang/AST/TypeNodes.inc
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clang/Basic/AttrHasAttributeImpl.inc: ${CLANG_SRCS}/include/clang/Basic/Attr.td
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${CLANG_TBLGEN} -gen-clang-attr-has-attribute-impl \
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-I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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@ -806,6 +866,32 @@ clang/Basic/arm_neon.inc: ${CLANG_SRCS}/include/clang/Basic/arm_neon.td
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-o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_neon.td
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TGHDRS+= clang/Basic/arm_neon.inc
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clang/Basic/arm_mve_builtins.inc: ${CLANG_SRCS}/include/clang/Basic/arm_mve.td
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${CLANG_TBLGEN} -gen-arm-mve-builtin-def \
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-I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \
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-o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_mve.td
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TGHDRS+= clang/Basic/arm_mve_builtins.inc
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clang/Basic/arm_mve_builtin_aliases.inc: \
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${CLANG_SRCS}/include/clang/Basic/arm_mve.td
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${CLANG_TBLGEN} -gen-arm-mve-builtin-aliases \
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-I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \
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-o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_mve.td
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TGHDRS+= clang/Basic/arm_mve_builtin_aliases.inc
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clang/Basic/arm_mve_builtin_cg.inc: ${CLANG_SRCS}/include/clang/Basic/arm_mve.td
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${CLANG_TBLGEN} -gen-arm-mve-builtin-codegen \
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-I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \
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-o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_mve.td
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TGHDRS+= clang/Basic/arm_mve_builtin_cg.inc
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clang/Basic/arm_mve_builtin_sema.inc: \
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${CLANG_SRCS}/include/clang/Basic/arm_mve.td
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${CLANG_TBLGEN} -gen-arm-mve-builtin-sema \
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-I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \
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-o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_mve.td
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TGHDRS+= clang/Basic/arm_mve_builtin_sema.inc
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clang/Driver/Options.inc: ${CLANG_SRCS}/include/clang/Driver/Options.td
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${LLVM_TBLGEN} -gen-opt-parser-defs \
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-I ${LLVM_SRCS}/include -I ${CLANG_SRCS}/include/clang/Driver \
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@ -878,6 +964,12 @@ clang/StaticAnalyzer/Checkers/Checkers.inc: \
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${CLANG_SRCS}/include/clang/StaticAnalyzer/Checkers/Checkers.td
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TGHDRS+= clang/StaticAnalyzer/Checkers/Checkers.inc
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Opcodes.inc: ${CLANG_SRCS}/lib/AST/Interp/Opcodes.td
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${CLANG_TBLGEN} -gen-clang-opcodes \
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-I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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${CLANG_SRCS}/lib/AST/Interp/Opcodes.td
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TGHDRS+= Opcodes.inc
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OpenCLBuiltins.inc: ${CLANG_SRCS}/lib/Sema/OpenCLBuiltins.td
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${CLANG_TBLGEN} -gen-clang-opencl-builtins \
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-d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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@ -60,9 +60,11 @@ SRCS_MIN+= Analysis/CmpInstAnalysis.cpp
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SRCS_MIN+= Analysis/CodeMetrics.cpp
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SRCS_MIN+= Analysis/ConstantFolding.cpp
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SRCS_MIN+= Analysis/CostModel.cpp
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SRCS_MIN+= Analysis/DDG.cpp
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SRCS_MIN+= Analysis/Delinearization.cpp
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SRCS_MIN+= Analysis/DemandedBits.cpp
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SRCS_MIN+= Analysis/DependenceAnalysis.cpp
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SRCS_MIN+= Analysis/DependenceGraphBuilder.cpp
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SRCS_MIN+= Analysis/DivergenceAnalysis.cpp
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SRCS_MIN+= Analysis/DomPrinter.cpp
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SRCS_MIN+= Analysis/DomTreeUpdater.cpp
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@ -88,6 +90,7 @@ SRCS_MIN+= Analysis/Lint.cpp
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SRCS_MIN+= Analysis/Loads.cpp
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SRCS_MIN+= Analysis/LoopAccessAnalysis.cpp
|
||||
SRCS_MIN+= Analysis/LoopAnalysisManager.cpp
|
||||
SRCS_MIN+= Analysis/LoopCacheAnalysis.cpp
|
||||
SRCS_MIN+= Analysis/LoopInfo.cpp
|
||||
SRCS_MIN+= Analysis/LoopPass.cpp
|
||||
SRCS_MIN+= Analysis/LoopUnrollAnalyzer.cpp
|
||||
@ -127,6 +130,7 @@ SRCS_MIN+= Analysis/TargetLibraryInfo.cpp
|
||||
SRCS_MIN+= Analysis/TargetTransformInfo.cpp
|
||||
SRCS_MIN+= Analysis/TypeBasedAliasAnalysis.cpp
|
||||
SRCS_MIN+= Analysis/TypeMetadataUtils.cpp
|
||||
SRCS_MIN+= Analysis/VFABIDemangling.cpp
|
||||
SRCS_MIN+= Analysis/ValueLattice.cpp
|
||||
SRCS_MIN+= Analysis/ValueLatticeUtils.cpp
|
||||
SRCS_MIN+= Analysis/ValueTracking.cpp
|
||||
@ -137,6 +141,7 @@ SRCS_MIN+= AsmParser/Parser.cpp
|
||||
SRCS_MIN+= BinaryFormat/Dwarf.cpp
|
||||
SRCS_MIN+= BinaryFormat/Magic.cpp
|
||||
SRCS_MIN+= BinaryFormat/Wasm.cpp
|
||||
SRCS_MIN+= BinaryFormat/XCOFF.cpp
|
||||
SRCS_MIN+= Bitcode/Reader/BitReader.cpp
|
||||
SRCS_EXT+= Bitcode/Reader/BitcodeAnalyzer.cpp
|
||||
SRCS_MIN+= Bitcode/Reader/BitcodeReader.cpp
|
||||
@ -180,6 +185,7 @@ SRCS_MIN+= CodeGen/BranchFolding.cpp
|
||||
SRCS_MIN+= CodeGen/BranchRelaxation.cpp
|
||||
SRCS_MIN+= CodeGen/BreakFalseDeps.cpp
|
||||
SRCS_EXT+= CodeGen/BuiltinGCs.cpp
|
||||
SRCS_MIN+= CodeGen/CFGuardLongjmp.cpp
|
||||
SRCS_MIN+= CodeGen/CFIInstrInserter.cpp
|
||||
SRCS_MIN+= CodeGen/CalcSpillWeights.cpp
|
||||
SRCS_MIN+= CodeGen/CallingConvLower.cpp
|
||||
@ -210,6 +216,7 @@ SRCS_MIN+= CodeGen/GlobalISel/Combiner.cpp
|
||||
SRCS_MIN+= CodeGen/GlobalISel/CombinerHelper.cpp
|
||||
SRCS_MIN+= CodeGen/GlobalISel/CallLowering.cpp
|
||||
SRCS_MIN+= CodeGen/GlobalISel/GISelChangeObserver.cpp
|
||||
SRCS_MIN+= CodeGen/GlobalISel/GISelKnownBits.cpp
|
||||
SRCS_MIN+= CodeGen/GlobalISel/GlobalISel.cpp
|
||||
SRCS_MIN+= CodeGen/GlobalISel/IRTranslator.cpp
|
||||
SRCS_MIN+= CodeGen/GlobalISel/InstructionSelect.cpp
|
||||
@ -257,11 +264,13 @@ SRCS_MIN+= CodeGen/LoopTraversal.cpp
|
||||
SRCS_MIN+= CodeGen/LowLevelType.cpp
|
||||
SRCS_MIN+= CodeGen/LowerEmuTLS.cpp
|
||||
SRCS_MIN+= CodeGen/MIRCanonicalizerPass.cpp
|
||||
SRCS_MIN+= CodeGen/MIRNamerPass.cpp
|
||||
SRCS_EXT+= CodeGen/MIRParser/MILexer.cpp
|
||||
SRCS_EXT+= CodeGen/MIRParser/MIParser.cpp
|
||||
SRCS_EXT+= CodeGen/MIRParser/MIRParser.cpp
|
||||
SRCS_MIN+= CodeGen/MIRPrinter.cpp
|
||||
SRCS_MIN+= CodeGen/MIRPrintingPass.cpp
|
||||
SRCS_MIN+= CodeGen/MIRVRegNamerUtils.cpp
|
||||
SRCS_MIN+= CodeGen/MachineBasicBlock.cpp
|
||||
SRCS_MIN+= CodeGen/MachineBlockFrequencyInfo.cpp
|
||||
SRCS_MIN+= CodeGen/MachineBlockPlacement.cpp
|
||||
@ -279,6 +288,7 @@ SRCS_MIN+= CodeGen/MachineInstr.cpp
|
||||
SRCS_MIN+= CodeGen/MachineInstrBundle.cpp
|
||||
SRCS_MIN+= CodeGen/MachineLICM.cpp
|
||||
SRCS_MIN+= CodeGen/MachineLoopInfo.cpp
|
||||
SRCS_MIN+= CodeGen/MachineLoopUtils.cpp
|
||||
SRCS_MIN+= CodeGen/MachineModuleInfo.cpp
|
||||
SRCS_MIN+= CodeGen/MachineModuleInfoImpls.cpp
|
||||
SRCS_MIN+= CodeGen/MachineOperand.cpp
|
||||
@ -291,9 +301,11 @@ SRCS_MIN+= CodeGen/MachineRegisterInfo.cpp
|
||||
SRCS_MIN+= CodeGen/MachineSSAUpdater.cpp
|
||||
SRCS_MIN+= CodeGen/MachineScheduler.cpp
|
||||
SRCS_MIN+= CodeGen/MachineSink.cpp
|
||||
SRCS_MIN+= CodeGen/MachineSizeOpts.cpp
|
||||
SRCS_MIN+= CodeGen/MachineTraceMetrics.cpp
|
||||
SRCS_MIN+= CodeGen/MachineVerifier.cpp
|
||||
SRCS_MIN+= CodeGen/MacroFusion.cpp
|
||||
SRCS_MIN+= CodeGen/ModuloSchedule.cpp
|
||||
SRCS_MIN+= CodeGen/OptimizePHIs.cpp
|
||||
SRCS_MIN+= CodeGen/PHIElimination.cpp
|
||||
SRCS_MIN+= CodeGen/PHIEliminationUtils.cpp
|
||||
@ -379,6 +391,7 @@ SRCS_MIN+= CodeGen/TargetRegisterInfo.cpp
|
||||
SRCS_MIN+= CodeGen/TargetSchedule.cpp
|
||||
SRCS_MIN+= CodeGen/TargetSubtargetInfo.cpp
|
||||
SRCS_MIN+= CodeGen/TwoAddressInstructionPass.cpp
|
||||
SRCS_MIN+= CodeGen/TypePromotion.cpp
|
||||
SRCS_MIN+= CodeGen/UnreachableBlockElim.cpp
|
||||
SRCS_MIN+= CodeGen/ValueTypes.cpp
|
||||
SRCS_MIN+= CodeGen/VirtRegMap.cpp
|
||||
@ -567,9 +580,7 @@ SRCS_EXT+= ExecutionEngine/Orc/Legacy.cpp
|
||||
SRCS_EXT+= ExecutionEngine/Orc/NullResolver.cpp
|
||||
SRCS_EXT+= ExecutionEngine/Orc/OrcABISupport.cpp
|
||||
SRCS_EXT+= ExecutionEngine/Orc/OrcCBindings.cpp
|
||||
SRCS_EXT+= ExecutionEngine/Orc/OrcError.cpp
|
||||
SRCS_EXT+= ExecutionEngine/Orc/OrcMCJITReplacement.cpp
|
||||
SRCS_EXT+= ExecutionEngine/Orc/RPCUtils.cpp
|
||||
SRCS_EXT+= ExecutionEngine/Orc/RTDyldObjectLinkingLayer.cpp
|
||||
SRCS_EXT+= ExecutionEngine/Orc/ThreadSafeModule.cpp
|
||||
SRCS_XDB+= ExecutionEngine/RuntimeDyld/JITSymbol.cpp
|
||||
@ -582,6 +593,8 @@ SRCS_XDB+= ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp
|
||||
SRCS_XDB+= ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldELFMips.cpp
|
||||
SRCS_XDB+= ExecutionEngine/SectionMemoryManager.cpp
|
||||
SRCS_XDB+= ExecutionEngine/TargetSelect.cpp
|
||||
SRCS_MIN+= Frontend/OpenMP/OMPConstants.cpp
|
||||
SRCS_MIN+= Frontend/OpenMP/OMPIRBuilder.cpp
|
||||
SRCS_MIN+= IR/AbstractCallSite.cpp
|
||||
SRCS_MIN+= IR/AsmWriter.cpp
|
||||
SRCS_MIN+= IR/Attributes.cpp
|
||||
@ -601,6 +614,7 @@ SRCS_MIN+= IR/DiagnosticHandler.cpp
|
||||
SRCS_MIN+= IR/DiagnosticInfo.cpp
|
||||
SRCS_MIN+= IR/DiagnosticPrinter.cpp
|
||||
SRCS_MIN+= IR/Dominators.cpp
|
||||
SRCS_MIN+= IR/FPEnv.cpp
|
||||
SRCS_MIN+= IR/Function.cpp
|
||||
SRCS_MIN+= IR/GVMaterializer.cpp
|
||||
SRCS_MIN+= IR/Globals.cpp
|
||||
@ -660,7 +674,6 @@ SRCS_MIN+= MC/MCAsmMacro.cpp
|
||||
SRCS_MIN+= MC/MCAsmStreamer.cpp
|
||||
SRCS_MIN+= MC/MCAssembler.cpp
|
||||
SRCS_MIN+= MC/MCCodeEmitter.cpp
|
||||
SRCS_MIN+= MC/MCCodePadder.cpp
|
||||
SRCS_MIN+= MC/MCCodeView.cpp
|
||||
SRCS_MIN+= MC/MCContext.cpp
|
||||
SRCS_XDL+= MC/MCDisassembler/Disassembler.cpp
|
||||
@ -779,7 +792,7 @@ SRCS_MIN+= Option/OptTable.cpp
|
||||
SRCS_MIN+= Option/Option.cpp
|
||||
SRCS_MIN+= Passes/PassBuilder.cpp
|
||||
SRCS_MIN+= Passes/PassPlugin.cpp
|
||||
SRCS_EXT+= Passes/StandardInstrumentations.cpp
|
||||
SRCS_MIN+= Passes/StandardInstrumentations.cpp
|
||||
SRCS_MIN+= ProfileData/Coverage/CoverageMapping.cpp
|
||||
SRCS_MIN+= ProfileData/Coverage/CoverageMappingReader.cpp
|
||||
SRCS_MIN+= ProfileData/Coverage/CoverageMappingWriter.cpp
|
||||
@ -791,7 +804,9 @@ SRCS_MIN+= ProfileData/ProfileSummaryBuilder.cpp
|
||||
SRCS_MIN+= ProfileData/SampleProf.cpp
|
||||
SRCS_MIN+= ProfileData/SampleProfReader.cpp
|
||||
SRCS_MIN+= ProfileData/SampleProfWriter.cpp
|
||||
SRCS_MIN+= Remarks/BitstreamRemarkSerializer.cpp
|
||||
SRCS_MIN+= Remarks/RemarkFormat.cpp
|
||||
SRCS_MIN+= Remarks/RemarkSerializer.cpp
|
||||
SRCS_MIN+= Remarks/RemarkStringTable.cpp
|
||||
SRCS_MIN+= Remarks/YAMLRemarkSerializer.cpp
|
||||
SRCS_MIN+= Support/AArch64TargetParser.cpp
|
||||
@ -830,7 +845,7 @@ SRCS_MIN+= Support/Errno.cpp
|
||||
SRCS_MIN+= Support/Error.cpp
|
||||
SRCS_MIN+= Support/ErrorHandling.cpp
|
||||
SRCS_EXL+= Support/FileOutputBuffer.cpp
|
||||
SRCS_EXT+= Support/FileUtilities.cpp
|
||||
SRCS_MIN+= Support/FileUtilities.cpp
|
||||
SRCS_MIN+= Support/FoldingSet.cpp
|
||||
SRCS_MIN+= Support/FormatVariadic.cpp
|
||||
SRCS_MIN+= Support/FormattedStream.cpp
|
||||
@ -843,7 +858,6 @@ SRCS_MIN+= Support/IntEqClasses.cpp
|
||||
SRCS_MIN+= Support/IntervalMap.cpp
|
||||
SRCS_MIN+= Support/ItaniumManglingCanonicalizer.cpp
|
||||
SRCS_MIN+= Support/JSON.cpp
|
||||
SRCS_MIN+= Support/JamCRC.cpp
|
||||
SRCS_MIN+= Support/KnownBits.cpp
|
||||
SRCS_MIN+= Support/LEB128.cpp
|
||||
SRCS_MIN+= Support/LineIterator.cpp
|
||||
@ -960,6 +974,7 @@ SRCS_MIN+= Target/AArch64/AArch64SIMDInstrOpt.cpp
|
||||
SRCS_MIN+= Target/AArch64/AArch64SelectionDAGInfo.cpp
|
||||
SRCS_MIN+= Target/AArch64/AArch64SpeculationHardening.cpp
|
||||
SRCS_MIN+= Target/AArch64/AArch64StackTagging.cpp
|
||||
SRCS_MIN+= Target/AArch64/AArch64StackTaggingPreRA.cpp
|
||||
SRCS_MIN+= Target/AArch64/AArch64StorePairSuppress.cpp
|
||||
SRCS_MIN+= Target/AArch64/AArch64Subtarget.cpp
|
||||
SRCS_MIN+= Target/AArch64/AArch64TargetMachine.cpp
|
||||
@ -991,7 +1006,6 @@ SRCS_MIN+= Target/ARM/ARMBaseRegisterInfo.cpp
|
||||
SRCS_MIN+= Target/ARM/ARMBasicBlockInfo.cpp
|
||||
SRCS_MIN+= Target/ARM/ARMCallLowering.cpp
|
||||
SRCS_MIN+= Target/ARM/ARMCallingConv.cpp
|
||||
SRCS_MIN+= Target/ARM/ARMCodeGenPrepare.cpp
|
||||
SRCS_MIN+= Target/ARM/ARMConstantIslandPass.cpp
|
||||
SRCS_MIN+= Target/ARM/ARMConstantPoolValue.cpp
|
||||
SRCS_MIN+= Target/ARM/ARMExpandPseudoInsts.cpp
|
||||
@ -1034,6 +1048,9 @@ SRCS_MIN+= Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp
|
||||
SRCS_MIN+= Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
|
||||
SRCS_MIN+= Target/ARM/MCTargetDesc/ARMWinCOFFStreamer.cpp
|
||||
SRCS_MIN+= Target/ARM/MLxExpansionPass.cpp
|
||||
SRCS_MIN+= Target/ARM/MVEGatherScatterLowering.cpp
|
||||
SRCS_MIN+= Target/ARM/MVETailPredication.cpp
|
||||
SRCS_MIN+= Target/ARM/MVEVPTBlockPass.cpp
|
||||
SRCS_MIN+= Target/ARM/TargetInfo/ARMTargetInfo.cpp
|
||||
SRCS_MIN+= Target/ARM/Thumb1FrameLowering.cpp
|
||||
SRCS_MIN+= Target/ARM/Thumb1InstrInfo.cpp
|
||||
@ -1153,7 +1170,8 @@ SRCS_MIN+= Target/PowerPC/PPCHazardRecognizers.cpp
|
||||
SRCS_MIN+= Target/PowerPC/PPCISelDAGToDAG.cpp
|
||||
SRCS_MIN+= Target/PowerPC/PPCISelLowering.cpp
|
||||
SRCS_MIN+= Target/PowerPC/PPCInstrInfo.cpp
|
||||
SRCS_MIN+= Target/PowerPC/PPCLoopPreIncPrep.cpp
|
||||
SRCS_MIN+= Target/PowerPC/PPCLoopInstrFormPrep.cpp
|
||||
SRCS_MIN+= Target/PowerPC/PPCLowerMASSVEntries.cpp
|
||||
SRCS_MIN+= Target/PowerPC/PPCMCInstLower.cpp
|
||||
SRCS_MIN+= Target/PowerPC/PPCMIPeephole.cpp
|
||||
SRCS_MIN+= Target/PowerPC/PPCMachineFunctionInfo.cpp
|
||||
@ -1186,13 +1204,17 @@ SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
|
||||
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
|
||||
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVAsmPrinter.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVCallLowering.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVExpandPseudoInsts.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVFrameLowering.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVInstrInfo.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVInstructionSelector.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVISelDAGToDAG.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVISelLowering.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVLegalizerInfo.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVMCInstLower.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVMergeBaseOffset.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVRegisterBankInfo.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVRegisterInfo.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVSubtarget.cpp
|
||||
SRCS_MIN+= Target/RISCV/RISCVTargetMachine.cpp
|
||||
@ -1235,7 +1257,6 @@ SRCS_MIN+= Target/TargetMachineC.cpp
|
||||
.if ${MK_LLVM_TARGET_X86} != "no"
|
||||
SRCS_MIN+= Target/X86/AsmParser/X86AsmParser.cpp
|
||||
SRCS_XDW+= Target/X86/Disassembler/X86Disassembler.cpp
|
||||
SRCS_XDW+= Target/X86/Disassembler/X86DisassemblerDecoder.cpp
|
||||
SRCS_MIN+= Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
|
||||
SRCS_MIN+= Target/X86/MCTargetDesc/X86AsmBackend.cpp
|
||||
SRCS_MIN+= Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
|
||||
@ -1253,6 +1274,7 @@ SRCS_MIN+= Target/X86/TargetInfo/X86TargetInfo.cpp
|
||||
SRCS_MIN+= Target/X86/Utils/X86ShuffleDecode.cpp
|
||||
SRCS_MIN+= Target/X86/X86AsmPrinter.cpp
|
||||
SRCS_MIN+= Target/X86/X86AvoidStoreForwardingBlocks.cpp
|
||||
SRCS_MIN+= Target/X86/X86AvoidTrailingCall.cpp
|
||||
SRCS_MIN+= Target/X86/X86CallFrameOptimization.cpp
|
||||
SRCS_MIN+= Target/X86/X86CallLowering.cpp
|
||||
SRCS_MIN+= Target/X86/X86CallingConv.cpp
|
||||
@ -1302,6 +1324,7 @@ SRCS_MIN+= ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
|
||||
SRCS_MIW+= ToolDrivers/llvm-lib/LibDriver.cpp
|
||||
SRCS_MIN+= Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
|
||||
SRCS_MIN+= Transforms/AggressiveInstCombine/TruncInstCombine.cpp
|
||||
SRCS_MIN+= Transforms/CFGuard/CFGuard.cpp
|
||||
SRCS_MIN+= Transforms/Coroutines/CoroCleanup.cpp
|
||||
SRCS_MIN+= Transforms/Coroutines/CoroEarly.cpp
|
||||
SRCS_MIN+= Transforms/Coroutines/CoroElide.cpp
|
||||
@ -1376,6 +1399,7 @@ SRCS_MIN+= Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
|
||||
SRCS_MIN+= Transforms/Instrumentation/PoisonChecking.cpp
|
||||
SRCS_MIN+= Transforms/Instrumentation/SanitizerCoverage.cpp
|
||||
SRCS_MIN+= Transforms/Instrumentation/ThreadSanitizer.cpp
|
||||
SRCS_MIN+= Transforms/Instrumentation/ValueProfileCollector.cpp
|
||||
SRCS_MIN+= Transforms/ObjCARC/DependencyAnalysis.cpp
|
||||
SRCS_EXT+= Transforms/ObjCARC/ObjCARC.cpp
|
||||
SRCS_MIN+= Transforms/ObjCARC/ObjCARCAPElim.cpp
|
||||
@ -1430,8 +1454,10 @@ SRCS_MIN+= Transforms/Scalar/LoopUnrollAndJamPass.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LoopUnswitch.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LoopVersioningLICM.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LowerAtomic.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LowerConstantIntrinsics.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LowerExpectIntrinsic.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LowerGuardIntrinsic.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LowerMatrixIntrinsics.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LowerWidenableCondition.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/MakeGuardsExplicit.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/MemCpyOptimizer.cpp
|
||||
@ -1469,6 +1495,7 @@ SRCS_MIN+= Transforms/Utils/CanonicalizeAliases.cpp
|
||||
SRCS_MIN+= Transforms/Utils/CloneFunction.cpp
|
||||
SRCS_MIN+= Transforms/Utils/CloneModule.cpp
|
||||
SRCS_MIN+= Transforms/Utils/CodeExtractor.cpp
|
||||
SRCS_MIN+= Transforms/Utils/CodeMoverUtils.cpp
|
||||
SRCS_MIN+= Transforms/Utils/CtorUtils.cpp
|
||||
SRCS_MIN+= Transforms/Utils/DemoteRegToStack.cpp
|
||||
SRCS_MIN+= Transforms/Utils/EntryExitInstrumenter.cpp
|
||||
@ -1480,6 +1507,7 @@ SRCS_MIN+= Transforms/Utils/FunctionImportUtils.cpp
|
||||
SRCS_MIN+= Transforms/Utils/GlobalStatus.cpp
|
||||
SRCS_MIN+= Transforms/Utils/GuardUtils.cpp
|
||||
SRCS_MIN+= Transforms/Utils/ImportedFunctionsInliningStatistics.cpp
|
||||
SRCS_MIN+= Transforms/Utils/InjectTLIMappings.cpp
|
||||
SRCS_MIN+= Transforms/Utils/InlineFunction.cpp
|
||||
SRCS_MIN+= Transforms/Utils/InstructionNamer.cpp
|
||||
SRCS_MIN+= Transforms/Utils/IntegerDivision.cpp
|
||||
@ -1498,6 +1526,7 @@ SRCS_MIN+= Transforms/Utils/LowerInvoke.cpp
|
||||
SRCS_MIN+= Transforms/Utils/LowerSwitch.cpp
|
||||
SRCS_MIN+= Transforms/Utils/Mem2Reg.cpp
|
||||
SRCS_MIN+= Transforms/Utils/MetaRenamer.cpp
|
||||
SRCS_MIN+= Transforms/Utils/MisExpect.cpp
|
||||
SRCS_MIN+= Transforms/Utils/ModuleUtils.cpp
|
||||
SRCS_MIN+= Transforms/Utils/NameAnonGlobals.cpp
|
||||
SRCS_MIN+= Transforms/Utils/PredicateInfo.cpp
|
||||
@ -1522,8 +1551,8 @@ SRCS_MIN+= Transforms/Vectorize/LoopVectorize.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/SLPVectorizer.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/VPlan.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/VPlanHCFGBuilder.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/VPlanHCFGTransforms.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/VPlanPredicator.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/VPlanTransforms.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/VPlanVerifier.cpp
|
||||
SRCS_EXT+= Transforms/Vectorize/Vectorize.cpp
|
||||
SRCS_EXT+= XRay/BlockIndexer.cpp
|
||||
@ -1585,6 +1614,17 @@ llvm/IR/IntrinsicImpl.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
|
||||
${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
|
||||
TGHDRS+= llvm/IR/IntrinsicImpl.inc
|
||||
|
||||
.for arch in \
|
||||
AArch64/aarch64 AMDGPU/amdgcn ARM/arm BPF/bpf Hexagon/hexagon \
|
||||
Mips/mips NVPTX/nvvm PowerPC/ppc R600/r600 RISCV/riscv S390/s390 \
|
||||
WebAssembly/wasm X86/x86 XCore/xcore
|
||||
llvm/IR/Intrinsics${arch:H}.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
|
||||
${LLVM_TBLGEN} -gen-intrinsic-enums -intrinsic-prefix=${arch:T} \
|
||||
-I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
|
||||
${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
|
||||
TGHDRS+= llvm/IR/Intrinsics${arch:H}.h
|
||||
.endfor
|
||||
|
||||
AttributesCompatFunc.inc: ${LLVM_SRCS}/lib/IR/AttributesCompatFunc.td
|
||||
${LLVM_TBLGEN} -gen-attrs \
|
||||
-I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
|
||||
@ -1636,6 +1676,7 @@ beforebuild:
|
||||
DisassemblerTables/-gen-disassembler \
|
||||
EVEX2VEXTables/-gen-x86-EVEX2VEX-tables \
|
||||
FastISel/-gen-fast-isel \
|
||||
GICombiner/-gen-global-isel-combiner,-combiners=${arch:H}PreLegalizerCombinerHelper \
|
||||
GlobalISel/-gen-global-isel \
|
||||
InstrInfo/-gen-instr-info \
|
||||
MCCodeEmitter/-gen-emitter \
|
||||
@ -1660,6 +1701,7 @@ TGHDRS+= AArch64GenCallingConv.inc
|
||||
TGHDRS+= AArch64GenDAGISel.inc
|
||||
TGHDRS+= AArch64GenDisassemblerTables.inc
|
||||
TGHDRS+= AArch64GenFastISel.inc
|
||||
TGHDRS+= AArch64GenGICombiner.inc
|
||||
TGHDRS+= AArch64GenGlobalISel.inc
|
||||
TGHDRS+= AArch64GenInstrInfo.inc
|
||||
TGHDRS+= AArch64GenMCCodeEmitter.inc
|
||||
@ -1731,9 +1773,11 @@ TGHDRS+= RISCVGenCompressInstEmitter.inc
|
||||
TGHDRS+= RISCVGenDAGISel.inc
|
||||
TGHDRS+= RISCVGenDisassemblerTables.inc
|
||||
TGHDRS+= RISCVGenDAGISel.inc
|
||||
TGHDRS+= RISCVGenGlobalISel.inc
|
||||
TGHDRS+= RISCVGenInstrInfo.inc
|
||||
TGHDRS+= RISCVGenMCCodeEmitter.inc
|
||||
TGHDRS+= RISCVGenMCPseudoLowering.inc
|
||||
TGHDRS+= RISCVGenRegisterBank.inc
|
||||
TGHDRS+= RISCVGenRegisterInfo.inc
|
||||
TGHDRS+= RISCVGenSubtargetInfo.inc
|
||||
TGHDRS+= RISCVGenSystemOperands.inc
|
||||
|
Loading…
Reference in New Issue
Block a user