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This commit gives support for the Rise mP6 CPU. It has two changes:

Browse Source 
1. Rise is recognized in identdcpu.c.
	2. The TSC is not written to. A workaround for the CPU bug is being
	   applied to clock.c (the bug being that the mP6 has TSC enabled
	   in its CPUID-capabilities, but it only supports reading it. If we
	   try to write to it (MSR 16), a GPF occurs.) The new behavior is that
	   FreeBSD will _not_ zero the TSC. Instead, we do a bit of 64-bit
	   arithmetic.

Reviewed by:	msmith
Obtained from:	unfurl & msmith
This commit is contained in:
Brian Feldman 1999-06-24 03:48:25 +00:00
parent 7ab6ba975d
commit 9840e7cb5a
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=48160
7 changed files with 59 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
sys/amd64/amd64/identcpu.c
View File

@ -36,7 +36,7 @@
* SUCH DAMAGE.
*
* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
* $Id: identcpu.c,v 1.62 1999/05/10 10:51:25 bde Exp $
* $Id: identcpu.c,v 1.63 1999/05/29 06:57:38 phk Exp $
*/
#include "opt_cpu.h"
@ -458,7 +458,16 @@ printcpuinfo(void)
}
break;
}
} else if (strcmp(cpu_vendor,"IBM") == 0)
} else if (strcmp(cpu_vendor, "RiseRiseRise") == 0) {
strcpy(cpu_model, "Rise ");
switch (cpu_id & 0xff0) {
case 0x500:
strcat(cpu_model, "mP6");
break;
default:
strcat(cpu_model, "Unknown");
}
} else if (strcmp(cpu_vendor, "IBM") == 0)
strcpy(cpu_model, "Blue Lightning CPU");
#endif
@ -510,6 +519,7 @@ printcpuinfo(void)
if (strcmp(cpu_vendor, "GenuineIntel") == 0 ||
strcmp(cpu_vendor, "AuthenticAMD") == 0 ||
strcmp(cpu_vendor, "RiseRiseRise") == 0 ||
((strcmp(cpu_vendor, "CyrixInstead") == 0) &&
((cpu_id & 0xf00) > 0x500))) {
printf(" Stepping=%u", cpu_id & 0xf);

12
sys/amd64/amd64/tsc.c
View File

@ -34,7 +34,7 @@
* SUCH DAMAGE.
*
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
* $Id: clock.c,v 1.135 1999/05/29 06:57:55 phk Exp $
* $Id: clock.c,v 1.136 1999/05/31 18:35:59 dfr Exp $
*/
/*
@ -585,6 +585,7 @@ readrtc(int port)
static u_int
calibrate_clocks(void)
{
u_int64_t old_tsc;
u_int count, prev_count, tot_count;
int sec, start_sec, timeout;
@ -623,7 +624,7 @@ calibrate_clocks(void)
tot_count = 0;
if (tsc_present)
wrmsr(0x10, 0LL); /* XXX 0x10 is the MSR for the TSC */
old_tsc = rdtsc();
/*
* Wait for the mc146818A seconds counter to change. Read the i8254
@ -658,7 +659,7 @@ calibrate_clocks(void)
* similar to those for the i8254 clock.
*/
if (tsc_present)
tsc_freq = rdtsc();
tsc_freq = rdtsc() - old_tsc;
if (bootverbose) {
if (tsc_present)
@ -762,9 +763,10 @@ startrtclock()
* clock failed. Do a less accurate calibration relative
* to the i8254 clock.
*/
wrmsr(0x10, 0LL); /* XXX */
u_int64_t old_tsc = rdtsc();
DELAY(1000000);
tsc_freq = rdtsc();
tsc_freq = rdtsc() - old_tsc;
#ifdef CLK_USE_TSC_CALIBRATION
if (bootverbose)
printf("TSC clock: %u Hz (Method B)\n", tsc_freq);

12
sys/amd64/isa/clock.c
View File

@ -34,7 +34,7 @@
* SUCH DAMAGE.
*
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
* $Id: clock.c,v 1.135 1999/05/29 06:57:55 phk Exp $
* $Id: clock.c,v 1.136 1999/05/31 18:35:59 dfr Exp $
*/
/*
@ -585,6 +585,7 @@ readrtc(int port)
static u_int
calibrate_clocks(void)
{
u_int64_t old_tsc;
u_int count, prev_count, tot_count;
int sec, start_sec, timeout;
@ -623,7 +624,7 @@ calibrate_clocks(void)
tot_count = 0;
if (tsc_present)
wrmsr(0x10, 0LL); /* XXX 0x10 is the MSR for the TSC */
old_tsc = rdtsc();
/*
* Wait for the mc146818A seconds counter to change. Read the i8254
@ -658,7 +659,7 @@ calibrate_clocks(void)
* similar to those for the i8254 clock.
*/
if (tsc_present)
tsc_freq = rdtsc();
tsc_freq = rdtsc() - old_tsc;
if (bootverbose) {
if (tsc_present)
@ -762,9 +763,10 @@ startrtclock()
* clock failed. Do a less accurate calibration relative
* to the i8254 clock.
*/
wrmsr(0x10, 0LL); /* XXX */
u_int64_t old_tsc = rdtsc();
DELAY(1000000);
tsc_freq = rdtsc();
tsc_freq = rdtsc() - old_tsc;
#ifdef CLK_USE_TSC_CALIBRATION
if (bootverbose)
printf("TSC clock: %u Hz (Method B)\n", tsc_freq);

14
sys/i386/i386/identcpu.c
View File

@ -36,7 +36,7 @@
* SUCH DAMAGE.
*
* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
* $Id: identcpu.c,v 1.62 1999/05/10 10:51:25 bde Exp $
* $Id: identcpu.c,v 1.63 1999/05/29 06:57:38 phk Exp $
*/
#include "opt_cpu.h"
@ -458,7 +458,16 @@ printcpuinfo(void)
}
break;
}
} else if (strcmp(cpu_vendor,"IBM") == 0)
} else if (strcmp(cpu_vendor, "RiseRiseRise") == 0) {
strcpy(cpu_model, "Rise ");
switch (cpu_id & 0xff0) {
case 0x500:
strcat(cpu_model, "mP6");
break;
default:
strcat(cpu_model, "Unknown");
}
} else if (strcmp(cpu_vendor, "IBM") == 0)
strcpy(cpu_model, "Blue Lightning CPU");
#endif
@ -510,6 +519,7 @@ printcpuinfo(void)
if (strcmp(cpu_vendor, "GenuineIntel") == 0 ||
strcmp(cpu_vendor, "AuthenticAMD") == 0 ||
strcmp(cpu_vendor, "RiseRiseRise") == 0 ||
((strcmp(cpu_vendor, "CyrixInstead") == 0) &&
((cpu_id & 0xf00) > 0x500))) {
printf(" Stepping=%u", cpu_id & 0xf);

12
sys/i386/i386/tsc.c
View File

@ -34,7 +34,7 @@
* SUCH DAMAGE.
*
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
* $Id: clock.c,v 1.135 1999/05/29 06:57:55 phk Exp $
* $Id: clock.c,v 1.136 1999/05/31 18:35:59 dfr Exp $
*/
/*
@ -585,6 +585,7 @@ readrtc(int port)
static u_int
calibrate_clocks(void)
{
u_int64_t old_tsc;
u_int count, prev_count, tot_count;
int sec, start_sec, timeout;
@ -623,7 +624,7 @@ calibrate_clocks(void)
tot_count = 0;
if (tsc_present)
wrmsr(0x10, 0LL); /* XXX 0x10 is the MSR for the TSC */
old_tsc = rdtsc();
/*
* Wait for the mc146818A seconds counter to change. Read the i8254
@ -658,7 +659,7 @@ calibrate_clocks(void)
* similar to those for the i8254 clock.
*/
if (tsc_present)
tsc_freq = rdtsc();
tsc_freq = rdtsc() - old_tsc;
if (bootverbose) {
if (tsc_present)
@ -762,9 +763,10 @@ startrtclock()
* clock failed. Do a less accurate calibration relative
* to the i8254 clock.
*/
wrmsr(0x10, 0LL); /* XXX */
u_int64_t old_tsc = rdtsc();
DELAY(1000000);
tsc_freq = rdtsc();
tsc_freq = rdtsc() - old_tsc;
#ifdef CLK_USE_TSC_CALIBRATION
if (bootverbose)
printf("TSC clock: %u Hz (Method B)\n", tsc_freq);

12
sys/i386/isa/clock.c
View File

@ -34,7 +34,7 @@
* SUCH DAMAGE.
*
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
* $Id: clock.c,v 1.135 1999/05/29 06:57:55 phk Exp $
* $Id: clock.c,v 1.136 1999/05/31 18:35:59 dfr Exp $
*/
/*
@ -585,6 +585,7 @@ readrtc(int port)
static u_int
calibrate_clocks(void)
{
u_int64_t old_tsc;
u_int count, prev_count, tot_count;
int sec, start_sec, timeout;
@ -623,7 +624,7 @@ calibrate_clocks(void)
tot_count = 0;
if (tsc_present)
wrmsr(0x10, 0LL); /* XXX 0x10 is the MSR for the TSC */
old_tsc = rdtsc();
/*
* Wait for the mc146818A seconds counter to change. Read the i8254
@ -658,7 +659,7 @@ calibrate_clocks(void)
* similar to those for the i8254 clock.
*/
if (tsc_present)
tsc_freq = rdtsc();
tsc_freq = rdtsc() - old_tsc;
if (bootverbose) {
if (tsc_present)
@ -762,9 +763,10 @@ startrtclock()
* clock failed. Do a less accurate calibration relative
* to the i8254 clock.
*/
wrmsr(0x10, 0LL); /* XXX */
u_int64_t old_tsc = rdtsc();
DELAY(1000000);
tsc_freq = rdtsc();
tsc_freq = rdtsc() - old_tsc;
#ifdef CLK_USE_TSC_CALIBRATION
if (bootverbose)
printf("TSC clock: %u Hz (Method B)\n", tsc_freq);

12
sys/isa/atrtc.c
View File

@ -34,7 +34,7 @@
* SUCH DAMAGE.
*
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
* $Id: clock.c,v 1.135 1999/05/29 06:57:55 phk Exp $
* $Id: clock.c,v 1.136 1999/05/31 18:35:59 dfr Exp $
*/
/*
@ -585,6 +585,7 @@ readrtc(int port)
static u_int
calibrate_clocks(void)
{
u_int64_t old_tsc;
u_int count, prev_count, tot_count;
int sec, start_sec, timeout;
@ -623,7 +624,7 @@ calibrate_clocks(void)
tot_count = 0;
if (tsc_present)
wrmsr(0x10, 0LL); /* XXX 0x10 is the MSR for the TSC */
old_tsc = rdtsc();
/*
* Wait for the mc146818A seconds counter to change. Read the i8254
@ -658,7 +659,7 @@ calibrate_clocks(void)
* similar to those for the i8254 clock.
*/
if (tsc_present)
tsc_freq = rdtsc();
tsc_freq = rdtsc() - old_tsc;
if (bootverbose) {
if (tsc_present)
@ -762,9 +763,10 @@ startrtclock()
* clock failed. Do a less accurate calibration relative
* to the i8254 clock.
*/
wrmsr(0x10, 0LL); /* XXX */
u_int64_t old_tsc = rdtsc();
DELAY(1000000);
tsc_freq = rdtsc();
tsc_freq = rdtsc() - old_tsc;
#ifdef CLK_USE_TSC_CALIBRATION
if (bootverbose)
printf("TSC clock: %u Hz (Method B)\n", tsc_freq);