Add the SDHCI Address Decoder registers and routines for ARMADA 38X.
Tested on: ClearFog Pro Reviewed by: Marcin Wojtas <mw at semihalf.com> Sponsored by: Rubicon Communications, LLC (Netgate) Differential Revision: https://reviews.freebsd.org/D10601
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=318336
@ -82,6 +82,7 @@ static int decode_win_usb3_valid(void);
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static int decode_win_eth_valid(void);
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static int decode_win_pcie_valid(void);
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static int decode_win_sata_valid(void);
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static int decode_win_sdhci_valid(void);
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static int decode_win_idma_valid(void);
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static int decode_win_xor_valid(void);
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@ -95,6 +96,7 @@ static void decode_win_usb3_setup(u_long);
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static void decode_win_eth_setup(u_long);
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static void decode_win_sata_setup(u_long);
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static void decode_win_ahci_setup(u_long);
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static void decode_win_sdhci_setup(u_long);
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static void decode_win_idma_setup(u_long);
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static void decode_win_xor_setup(u_long);
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@ -105,6 +107,7 @@ static void decode_win_eth_dump(u_long base);
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static void decode_win_idma_dump(u_long base);
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static void decode_win_xor_dump(u_long base);
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static void decode_win_ahci_dump(u_long base);
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static void decode_win_sdhci_dump(u_long);
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static int fdt_get_ranges(const char *, void *, int, int *, int *);
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#ifdef SOC_MV_ARMADA38X
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@ -138,6 +141,7 @@ static struct soc_node_spec soc_nodes[] = {
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{ "mrvl,usb-ehci", &decode_win_usb_setup, &decode_win_usb_dump },
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{ "marvell,armada-380-xhci", &decode_win_usb3_setup, &decode_win_usb3_dump },
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{ "marvell,armada-380-ahci", &decode_win_ahci_setup, &decode_win_ahci_dump },
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{ "marvell,armada-380-sdhci", &decode_win_sdhci_setup, &decode_win_sdhci_dump },
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{ "mrvl,sata", &decode_win_sata_setup, NULL },
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{ "mrvl,xor", &decode_win_xor_setup, &decode_win_xor_dump },
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{ "mrvl,idma", &decode_win_idma_setup, &decode_win_idma_dump },
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@ -568,7 +572,8 @@ soc_decode_win(void)
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if (!decode_win_cpu_valid() || !decode_win_usb_valid() ||
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!decode_win_eth_valid() || !decode_win_idma_valid() ||
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!decode_win_pcie_valid() || !decode_win_sata_valid() ||
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!decode_win_xor_valid() || !decode_win_usb3_valid())
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!decode_win_xor_valid() || !decode_win_usb3_valid() ||
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!decode_win_sdhci_valid())
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return (EINVAL);
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decode_win_cpu_setup();
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@ -659,6 +664,11 @@ WIN_REG_BASE_IDX_RD(win_sata, sz, MV_WIN_SATA_SIZE);
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WIN_REG_BASE_IDX_WR(win_sata, sz, MV_WIN_SATA_SIZE);
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#endif
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WIN_REG_BASE_IDX_RD(win_sdhci, cr, MV_WIN_SDHCI_CTRL);
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WIN_REG_BASE_IDX_RD(win_sdhci, br, MV_WIN_SDHCI_BASE);
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WIN_REG_BASE_IDX_WR(win_sdhci, cr, MV_WIN_SDHCI_CTRL);
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WIN_REG_BASE_IDX_WR(win_sdhci, br, MV_WIN_SDHCI_BASE);
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#ifndef SOC_MV_DOVE
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WIN_REG_IDX_RD(ddr, br, MV_WIN_DDR_BASE, MV_DDR_CADR_BASE)
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WIN_REG_IDX_RD(ddr, sz, MV_WIN_DDR_SIZE, MV_DDR_CADR_BASE)
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@ -2073,6 +2083,60 @@ decode_win_sata_valid(void)
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return (decode_win_can_cover_ddr(MV_WIN_SATA_MAX));
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}
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static void
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decode_win_sdhci_setup(u_long base)
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{
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uint32_t cr, br;
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int i, j;
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for (i = 0; i < MV_WIN_SDHCI_MAX; i++) {
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win_sdhci_cr_write(base, i, 0);
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win_sdhci_br_write(base, i, 0);
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}
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for (i = 0; i < MV_WIN_DDR_MAX; i++)
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if (ddr_is_active(i)) {
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br = ddr_base(i);
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cr = (((ddr_size(i) - 1) &
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(IO_WIN_SIZE_MASK << IO_WIN_SIZE_SHIFT)) |
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(ddr_attr(i) << IO_WIN_ATTR_SHIFT) |
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(ddr_target(i) << IO_WIN_TGT_SHIFT) |
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IO_WIN_ENA_MASK);
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/* Use the first available SDHCI window */
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for (j = 0; j < MV_WIN_SDHCI_MAX; j++) {
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if (win_sdhci_cr_read(base, j) & IO_WIN_ENA_MASK)
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continue;
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win_sdhci_cr_write(base, j, cr);
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win_sdhci_br_write(base, j, br);
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break;
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}
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}
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}
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static void
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decode_win_sdhci_dump(u_long base)
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{
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int i;
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for (i = 0; i < MV_WIN_SDHCI_MAX; i++)
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printf("SDHCI window#%d: c 0x%08x, b 0x%08x\n", i,
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win_sdhci_cr_read(base, i), win_sdhci_br_read(base, i));
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}
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static int
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decode_win_sdhci_valid(void)
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{
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#ifdef SOC_MV_ARMADA38X
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return (decode_win_can_cover_ddr(MV_WIN_SDHCI_MAX));
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#endif
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/* Satisfy platforms not equipped with this controller. */
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return (1);
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}
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/**************************************************************************
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* FDT parsing routines.
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**************************************************************************/
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@ -296,6 +296,10 @@
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#define MV_WIN_SATA_MAX 4
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#endif
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#define MV_WIN_SDHCI_CTRL(n) (0x8 * (n) + 0x4080)
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#define MV_WIN_SDHCI_BASE(n) (0x8 * (n) + 0x4084)
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#define MV_WIN_SDHCI_MAX 8
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#if defined(SOC_MV_ARMADA38X)
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#define MV_BOOTROM_MEM_ADDR 0xFFF00000
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#define MV_BOOTROM_WIN_SIZE 0xF
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