Add definition for Intel Speculative Store Bypass Disable MSR bits

Security:	CVE-2018-3639
Sponsored by:	The FreeBSD Foundation
MFC after:	3 days
This commit is contained in:
Konstantin Belousov 2018-05-21 21:07:13 +00:00
parent 2320153fcc
commit 9be4bbbb21
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=334004
2 changed files with 4 additions and 0 deletions

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@ -428,10 +428,12 @@
#define CPUID_STDEXT3_IBPB 0x04000000
#define CPUID_STDEXT3_STIBP 0x08000000
#define CPUID_STDEXT3_ARCH_CAP 0x20000000
#define CPUID_STDEXT3_SSBD 0x80000000
/* MSR IA32_ARCH_CAP(ABILITIES) bits */
#define IA32_ARCH_CAP_RDCL_NO 0x00000001
#define IA32_ARCH_CAP_IBRS_ALL 0x00000002
#define IA32_ARCH_CAP_SSBD_NO 0x00000004
/*
* CPUID manufacturers identifiers
@ -704,6 +706,7 @@
/* MSR IA32_SPEC_CTRL */
#define IA32_SPEC_CTRL_IBRS 0x00000001
#define IA32_SPEC_CTRL_STIBP 0x00000002
#define IA32_SPEC_CTRL_SSBD 0x00000004
/* MSR IA32_PRED_CMD */
#define IA32_PRED_CMD_IBPB_BARRIER 0x0000000000000001ULL

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@ -990,6 +990,7 @@ printcpuinfo(void)
"\033IBPB"
"\034STIBP"
"\036ARCH_CAP"
"\040SSBD"
);
}