Add definition for Intel Speculative Store Bypass Disable MSR bits
Security: CVE-2018-3639 Sponsored by: The FreeBSD Foundation MFC after: 3 days
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=334004
@ -428,10 +428,12 @@
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#define CPUID_STDEXT3_IBPB 0x04000000
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#define CPUID_STDEXT3_STIBP 0x08000000
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#define CPUID_STDEXT3_ARCH_CAP 0x20000000
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#define CPUID_STDEXT3_SSBD 0x80000000
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/* MSR IA32_ARCH_CAP(ABILITIES) bits */
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#define IA32_ARCH_CAP_RDCL_NO 0x00000001
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#define IA32_ARCH_CAP_IBRS_ALL 0x00000002
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#define IA32_ARCH_CAP_SSBD_NO 0x00000004
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/*
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* CPUID manufacturers identifiers
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@ -704,6 +706,7 @@
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/* MSR IA32_SPEC_CTRL */
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#define IA32_SPEC_CTRL_IBRS 0x00000001
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#define IA32_SPEC_CTRL_STIBP 0x00000002
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#define IA32_SPEC_CTRL_SSBD 0x00000004
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/* MSR IA32_PRED_CMD */
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#define IA32_PRED_CMD_IBPB_BARRIER 0x0000000000000001ULL
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@ -990,6 +990,7 @@ printcpuinfo(void)
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"\033IBPB"
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"\034STIBP"
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"\036ARCH_CAP"
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"\040SSBD"
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);
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}
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