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This is the solution that ISC committed after 9.6.1-release for

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the gcc warning issue. It should be included in the next upstream
release.
This commit is contained in:
Doug Barton 2009-06-25 19:52:45 +00:00
parent 91292be73f
commit 9d0520c4b2
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=195000
1 changed files with 9 additions and 0 deletions
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9
contrib/bind9/lib/isc/ia64/include/isc/atomic.h
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@ -31,6 +31,9 @@
* (e.g., 1 and -1)?
*/
static inline isc_int32_t
#ifdef __GNUC__
__attribute__ ((unused))
#endif
isc_atomic_xadd(isc_int32_t *p, isc_int32_t val)
{
isc_int32_t prev, swapped;
@ -54,6 +57,9 @@ isc_atomic_xadd(isc_int32_t *p, isc_int32_t val)
* This routine atomically stores the value 'val' in 'p'.
*/
static inline void
#ifdef __GNUC__
__attribute__ ((unused))
#endif
isc_atomic_store(isc_int32_t *p, isc_int32_t val)
{
__asm__ volatile(
@ -70,6 +76,9 @@ isc_atomic_store(isc_int32_t *p, isc_int32_t val)
* case.
*/
static inline isc_int32_t
#ifdef __GNUC__
__attribute__ ((unused))
#endif
isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val)
{
isc_int32_t ret;