Introduce support for cpufreq on PowerPC with the dynamic frequency
switching capabilities of the MPC7447A and MPC7448.
This commit is contained in:
parent
f436f17508
commit
9eb9db93da
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=193156
@ -97,6 +97,7 @@ powerpc/booke/pmap.c optional e500
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powerpc/booke/swtch.S optional e500
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powerpc/booke/trap.c optional e500
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powerpc/booke/vm_machdep.c optional e500
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powerpc/cpufreq/dfs.c optional cpufreq
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powerpc/fpu/fpu_add.c optional fpu_emu
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powerpc/fpu/fpu_compare.c optional fpu_emu
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powerpc/fpu/fpu_div.c optional fpu_emu
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@ -114,6 +115,7 @@ powerpc/mpc85xx/nexus.c optional mpc85xx
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powerpc/mpc85xx/ocpbus.c optional mpc85xx
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powerpc/mpc85xx/opic.c optional mpc85xx
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powerpc/mpc85xx/pci_ocp.c optional pci mpc85xx
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powerpc/ofw/ofw_cpu.c optional aim
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powerpc/ofw/ofw_pcibus.c optional pci aim
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powerpc/ofw/ofw_pcib_pci.c optional pci aim
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powerpc/ofw/ofw_real.c optional aim
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@ -133,6 +135,7 @@ powerpc/powermac/cuda.c optional powermac cuda
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powerpc/powermac/pmu.c optional powermac pmu
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powerpc/powermac/macgpio.c optional powermac pci
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powerpc/powermac/cpcht.c optional powermac pci
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powerpc/powermac/vcoregpio.c optional powermac
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powerpc/powerpc/altivec.c optional aim
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powerpc/powerpc/atomic.S standard
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powerpc/powerpc/autoconf.c standard
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@ -576,6 +576,7 @@ _xe= xe
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.if ${MACHINE_ARCH} == "powerpc"
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_an= an
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_bm= bm
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_cpufreq= cpufreq
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_nvram= powermac_nvram
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_smbfs= smbfs
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_sound= sound
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@ -19,4 +19,9 @@ SRCS+= est.c hwpstate.c p4tcc.c powernow.c
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SRCS+= smist.c
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.endif
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.if ${MACHINE} == "powerpc"
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.PATH: ${.CURDIR}/../../powerpc/cpufreq
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SRCS+= dfs.c
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.endif
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.include <bsd.kmod.mk>
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@ -881,14 +881,6 @@ cpu_initclocks(void)
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decr_tc_init();
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}
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/* Get current clock frequency for the given cpu id. */
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int
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cpu_est_clockrate(int cpu_id, uint64_t *rate)
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{
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return (ENXIO);
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}
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/*
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* Shutdown the CPU as much as possible.
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*/
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@ -587,14 +587,6 @@ cpu_flush_dcache(void *ptr, size_t len)
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/* TBD */
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}
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/* Get current clock frequency for the given cpu id. */
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int
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cpu_est_clockrate(int cpu_id, uint64_t *rate)
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{
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return (ENXIO);
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}
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/*
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* Construct a PCB from a trapframe. This is called from kdb_trap() where
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* we want to start a backtrace from the function that caused us to enter
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@ -76,6 +76,9 @@ options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed
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# To make an SMP kernel, the next line is needed
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#options SMP # Symmetric MultiProcessor Kernel
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# CPU frequency control
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device cpufreq
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# Standard busses
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device pci
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@ -21,6 +21,9 @@ options PSIM #GDB PSIM ppc simulator
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options SC_OFWFB # OFW frame buffer
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# The cpufreq(4) driver provides support for CPU frequency control
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device cpufreq
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# Standard busses
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device pci
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230
sys/powerpc/cpufreq/dfs.c
Normal file
230
sys/powerpc/cpufreq/dfs.c
Normal file
@ -0,0 +1,230 @@
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/*-
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* Copyright (c) 2009 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include "cpufreq_if.h"
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struct dfs_softc {
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device_t dev;
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int dfs4;
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};
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static void dfs_identify(driver_t *driver, device_t parent);
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static int dfs_probe(device_t dev);
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static int dfs_attach(device_t dev);
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static int dfs_settings(device_t dev, struct cf_setting *sets, int *count);
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static int dfs_set(device_t dev, const struct cf_setting *set);
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static int dfs_get(device_t dev, struct cf_setting *set);
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static int dfs_type(device_t dev, int *type);
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static device_method_t dfs_methods[] = {
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/* Device interface */
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DEVMETHOD(device_identify, dfs_identify),
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DEVMETHOD(device_probe, dfs_probe),
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DEVMETHOD(device_attach, dfs_attach),
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/* cpufreq interface */
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DEVMETHOD(cpufreq_drv_set, dfs_set),
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DEVMETHOD(cpufreq_drv_get, dfs_get),
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DEVMETHOD(cpufreq_drv_type, dfs_type),
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DEVMETHOD(cpufreq_drv_settings, dfs_settings),
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{0, 0}
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};
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static driver_t dfs_driver = {
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"dfs",
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dfs_methods,
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sizeof(struct dfs_softc)
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};
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static devclass_t dfs_devclass;
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DRIVER_MODULE(dfs, cpu, dfs_driver, dfs_devclass, 0, 0);
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/*
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* Bits of the HID1 register to enable DFS. See page 2-24 of "MPC7450
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* RISC Microprocessor Family Reference Manual", rev. 5.
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*/
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#define HID1_DFS2 (1UL << 22)
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#define HID1_DFS4 (1UL << 23)
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static void
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dfs_identify(driver_t *driver, device_t parent)
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{
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uint16_t vers;
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vers = mfpvr() >> 16;
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/* Check for an MPC 7447A or 7448 CPU */
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switch (vers) {
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case MPC7447A:
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case MPC7448:
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break;
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default:
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return;
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}
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/* Make sure we're not being doubly invoked. */
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if (device_find_child(parent, "dfs", -1) != NULL)
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return;
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/*
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* We attach a child for every CPU since settings need to
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* be performed on every CPU in the SMP case.
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*/
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if (BUS_ADD_CHILD(parent, 10, "dfs", -1) == NULL)
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device_printf(parent, "add dfs child failed\n");
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}
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static int
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dfs_probe(device_t dev)
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{
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if (resource_disabled("dfs", 0))
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return (ENXIO);
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device_set_desc(dev, "Dynamic Frequency Switching");
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return (0);
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}
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static int
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dfs_attach(device_t dev)
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{
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struct dfs_softc *sc;
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uint16_t vers;
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sc = device_get_softc(dev);
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sc->dev = dev;
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sc->dfs4 = 0;
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vers = mfpvr() >> 16;
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/* The 7448 supports divide-by-four as well */
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if (vers == MPC7448)
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sc->dfs4 = 1;
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cpufreq_register(dev);
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return (0);
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}
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static int
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dfs_settings(device_t dev, struct cf_setting *sets, int *count)
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{
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struct dfs_softc *sc;
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int states;
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sc = device_get_softc(dev);
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states = sc->dfs4 ? 3 : 2;
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if (sets == NULL || count == NULL)
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return (EINVAL);
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if (*count < states)
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return (E2BIG);
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/* Return a list of valid settings for this driver. */
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memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * states);
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sets[0].freq = 10000; sets[0].dev = dev;
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sets[1].freq = 5000; sets[1].dev = dev;
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if (sc->dfs4)
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sets[2].freq = 2500; sets[2].dev = dev;
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*count = states;
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return (0);
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}
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static int
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dfs_set(device_t dev, const struct cf_setting *set)
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{
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struct dfs_softc *sc;
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register_t hid1;
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if (set == NULL)
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return (EINVAL);
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sc = device_get_softc(dev);
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hid1 = mfspr(SPR_HID1);
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hid1 &= ~(HID1_DFS2 | HID1_DFS4);
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if (set->freq == 5000)
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hid1 |= HID1_DFS2;
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else if (set->freq == 2500)
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hid1 |= HID1_DFS4;
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/*
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* Now set the HID1 register with new values. Calling sequence
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* taken from page 2-26 of the MPC7450 family CPU manual.
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*/
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powerpc_sync();
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mtspr(SPR_HID1, hid1);
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powerpc_sync(); isync();
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return (0);
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}
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static int
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dfs_get(device_t dev, struct cf_setting *set)
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{
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struct dfs_softc *sc;
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register_t hid1;
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if (set == NULL)
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return (EINVAL);
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sc = device_get_softc(dev);
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memset(set, CPUFREQ_VAL_UNKNOWN, sizeof(*set));
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hid1 = mfspr(SPR_HID1);
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set->freq = 10000;
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if (hid1 & HID1_DFS2)
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set->freq = 5000;
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else if (sc->dfs4 && (hid1 & HID1_DFS4))
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set->freq = 2500;
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set->dev = dev;
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return (0);
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}
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static int
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dfs_type(device_t dev, int *type)
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{
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if (type == NULL)
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return (EINVAL);
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*type = CPUFREQ_TYPE_RELATIVE;
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return (0);
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}
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206
sys/powerpc/ofw/ofw_cpu.c
Normal file
206
sys/powerpc/ofw/ofw_cpu.c
Normal file
@ -0,0 +1,206 @@
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/*-
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* Copyright (C) 2009 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
|
||||
* are met:
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* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
|
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <machine/bus.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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static int ofw_cpulist_probe(device_t);
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static int ofw_cpulist_attach(device_t);
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static const struct ofw_bus_devinfo *ofw_cpulist_get_devinfo(device_t dev,
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device_t child);
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static MALLOC_DEFINE(M_OFWCPU, "ofwcpu", "OFW CPU device information");
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static device_method_t ofw_cpulist_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ofw_cpulist_probe),
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DEVMETHOD(device_attach, ofw_cpulist_attach),
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/* Bus interface */
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DEVMETHOD(bus_driver_added, bus_generic_driver_added),
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DEVMETHOD(bus_add_child, bus_generic_add_child),
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_devinfo, ofw_cpulist_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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{ 0, 0 }
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};
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static driver_t ofw_cpulist_driver = {
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"cpulist",
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ofw_cpulist_methods,
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0
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};
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static devclass_t ofw_cpulist_devclass;
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DRIVER_MODULE(ofw_cpulist, nexus, ofw_cpulist_driver, ofw_cpulist_devclass,
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0, 0);
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static int
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ofw_cpulist_probe(device_t dev)
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{
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const char *name;
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name = ofw_bus_get_name(dev);
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if (name == NULL || strcmp(name, "cpus") != 0)
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return (ENXIO);
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device_set_desc(dev, "Open Firmware CPU Group");
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return (0);
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}
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static int
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ofw_cpulist_attach(device_t dev)
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{
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phandle_t root, child;
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device_t cdev;
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struct ofw_bus_devinfo *dinfo;
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root = ofw_bus_get_node(dev);
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for (child = OF_child(root); child != 0; child = OF_peer(child)) {
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dinfo = malloc(sizeof(*dinfo), M_OFWCPU, M_WAITOK | M_ZERO);
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if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) {
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free(dinfo, M_OFWCPU);
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continue;
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}
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cdev = device_add_child(dev, NULL, -1);
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if (cdev == NULL) {
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device_printf(dev, "<%s>: device_add_child failed\n",
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dinfo->obd_name);
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ofw_bus_gen_destroy_devinfo(dinfo);
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free(dinfo, M_OFWCPU);
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continue;
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}
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device_set_ivars(cdev, dinfo);
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}
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return (bus_generic_attach(dev));
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}
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static const struct ofw_bus_devinfo *
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ofw_cpulist_get_devinfo(device_t dev, device_t child)
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{
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return (device_get_ivars(child));
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}
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static int ofw_cpu_probe(device_t);
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static int ofw_cpu_attach(device_t);
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static int ofw_cpu_read_ivar(device_t dev, device_t child, int index,
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uintptr_t *result);
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static device_method_t ofw_cpu_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ofw_cpu_probe),
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DEVMETHOD(device_attach, ofw_cpu_attach),
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/* Bus interface */
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DEVMETHOD(bus_driver_added, bus_generic_driver_added),
|
||||
DEVMETHOD(bus_add_child, bus_generic_add_child),
|
||||
DEVMETHOD(bus_print_child, bus_generic_print_child),
|
||||
DEVMETHOD(bus_read_ivar, ofw_cpu_read_ivar),
|
||||
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
|
||||
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
|
||||
DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
|
||||
DEVMETHOD(bus_release_resource, bus_generic_release_resource),
|
||||
DEVMETHOD(bus_activate_resource,bus_generic_activate_resource),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t ofw_cpu_driver = {
|
||||
"cpu",
|
||||
ofw_cpu_methods,
|
||||
0
|
||||
};
|
||||
|
||||
static devclass_t ofw_cpu_devclass;
|
||||
|
||||
DRIVER_MODULE(ofw_cpu, cpulist, ofw_cpu_driver, ofw_cpu_devclass, 0, 0);
|
||||
|
||||
static int
|
||||
ofw_cpu_probe(device_t dev)
|
||||
{
|
||||
const char *type = ofw_bus_get_type(dev);
|
||||
|
||||
if (strcmp(type, "cpu") != 0)
|
||||
return (ENXIO);
|
||||
|
||||
device_set_desc(dev, "Open Firmware CPU");
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
ofw_cpu_attach(device_t dev)
|
||||
{
|
||||
bus_generic_probe(dev);
|
||||
return (bus_generic_attach(dev));
|
||||
}
|
||||
|
||||
static int
|
||||
ofw_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
|
||||
{
|
||||
uint32_t cell;
|
||||
|
||||
switch (index) {
|
||||
case CPU_IVAR_PCPU:
|
||||
OF_getprop(ofw_bus_get_node(dev), "reg", &cell, sizeof(cell));
|
||||
*result = (uintptr_t)(pcpu_find(cell));
|
||||
return (0);
|
||||
case CPU_IVAR_NOMINAL_MHZ:
|
||||
cell = 0;
|
||||
OF_getprop(ofw_bus_get_node(dev), "clock-frequency",
|
||||
&cell, sizeof(cell));
|
||||
cell /= 1000000; /* convert to MHz */
|
||||
*result = (uintptr_t)(cell);
|
||||
return (0);
|
||||
}
|
||||
|
||||
return (ENOENT);
|
||||
}
|
||||
|
112
sys/powerpc/powermac/vcoregpio.c
Normal file
112
sys/powerpc/powermac/vcoregpio.c
Normal file
@ -0,0 +1,112 @@
|
||||
/*-
|
||||
* Copyright (c) 2009 Nathan Whitehorn
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/conf.h>
|
||||
#include <sys/cpu.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/sysctl.h>
|
||||
|
||||
#include <dev/ofw/ofw_bus.h>
|
||||
#include <dev/ofw/openfirm.h>
|
||||
|
||||
#include <powerpc/powermac/macgpiovar.h>
|
||||
|
||||
static int vcoregpio_probe(device_t);
|
||||
static int vcoregpio_attach(device_t);
|
||||
static void vcoregpio_pre_change(device_t, const struct cf_level *level);
|
||||
static void vcoregpio_post_change(device_t, const struct cf_level *level);
|
||||
|
||||
static device_method_t vcoregpio_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, vcoregpio_probe),
|
||||
DEVMETHOD(device_attach, vcoregpio_attach),
|
||||
{ 0, 0 },
|
||||
};
|
||||
|
||||
static driver_t vcoregpio_driver = {
|
||||
"vcoregpio",
|
||||
vcoregpio_methods,
|
||||
0
|
||||
};
|
||||
|
||||
static devclass_t vcoregpio_devclass;
|
||||
|
||||
DRIVER_MODULE(vcoregpio, macgpio, vcoregpio_driver, vcoregpio_devclass, 0, 0);
|
||||
|
||||
static int
|
||||
vcoregpio_probe(device_t dev)
|
||||
{
|
||||
const char *name = ofw_bus_get_name(dev);
|
||||
|
||||
if (strcmp(name, "cpu-vcore-select") != 0)
|
||||
return (ENXIO);
|
||||
|
||||
device_set_desc(dev, "CPU Core Voltage Control");
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
vcoregpio_attach(device_t dev)
|
||||
{
|
||||
EVENTHANDLER_REGISTER(cpufreq_pre_change, vcoregpio_pre_change, dev,
|
||||
EVENTHANDLER_PRI_ANY);
|
||||
EVENTHANDLER_REGISTER(cpufreq_post_change, vcoregpio_post_change, dev,
|
||||
EVENTHANDLER_PRI_ANY);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
vcoregpio_pre_change(device_t dev, const struct cf_level *level)
|
||||
{
|
||||
if (level->rel_set[0].freq == 10000 /* max */) {
|
||||
/*
|
||||
* Make sure the CPU voltage is raised before we raise
|
||||
* the clock.
|
||||
*/
|
||||
macgpio_write(dev, GPIO_DDR_OUTPUT | 1);
|
||||
DELAY(1000);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
vcoregpio_post_change(device_t dev, const struct cf_level *level)
|
||||
{
|
||||
if (level->rel_set[0].freq < 10000 /* max */) {
|
||||
DELAY(1000);
|
||||
/* We are safe to reduce CPU voltage now */
|
||||
macgpio_write(dev, GPIO_DDR_OUTPUT | 0);
|
||||
}
|
||||
}
|
||||
|
@ -62,6 +62,7 @@
|
||||
#include <sys/systm.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/conf.h>
|
||||
#include <sys/cpu.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/sysctl.h>
|
||||
|
||||
@ -288,13 +289,38 @@ void
|
||||
cpu_print_speed(void)
|
||||
{
|
||||
uint64_t cps;
|
||||
|
||||
if (cpu_est_clockrate(0, &cps) == 0)
|
||||
printf(", %lld.%02lld MHz", cps / 1000000, (cps / 10000) % 100);
|
||||
}
|
||||
|
||||
mtspr(SPR_MMCR0, SPR_MMCR0_FC);
|
||||
mtspr(SPR_PMC1, 0);
|
||||
mtspr(SPR_MMCR0, SPR_MMCR0_PMC1SEL(PMCN_CYCLES));
|
||||
DELAY(100000);
|
||||
cps = (mfspr(SPR_PMC1) * 10) + 4999;
|
||||
printf(", %lld.%02lld MHz", cps / 1000000, (cps / 10000) % 100);
|
||||
/* Get current clock frequency for the given cpu id. */
|
||||
int
|
||||
cpu_est_clockrate(int cpu_id, uint64_t *cps)
|
||||
{
|
||||
uint16_t vers;
|
||||
|
||||
vers = mfpvr() >> 16;
|
||||
|
||||
switch (vers) {
|
||||
case MPC7450:
|
||||
case MPC7455:
|
||||
case MPC7457:
|
||||
case MPC750:
|
||||
case IBM750FX:
|
||||
case MPC7400:
|
||||
case MPC7410:
|
||||
case MPC7447A:
|
||||
case MPC7448:
|
||||
mtspr(SPR_MMCR0, SPR_MMCR0_FC);
|
||||
mtspr(SPR_PMC1, 0);
|
||||
mtspr(SPR_MMCR0, SPR_MMCR0_PMC1SEL(PMCN_CYCLES));
|
||||
DELAY(100000);
|
||||
*cps = (mfspr(SPR_PMC1) * 10) + 4999;
|
||||
return (0);
|
||||
}
|
||||
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
void
|
||||
|
Loading…
Reference in New Issue
Block a user