Add a rudimentary PWM driver for the RaspberryPi.
Control is through sysctl, only GPIO12 supported. bootverbose creates sysctls for direct mangling of relevant registers. Only tested on RPI2
This commit is contained in:
Poul-Henning Kamp
parent
da24a5e5be
commit
9eec64c0aa
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=327976
439
sys/arm/broadcom/bcm2835/bcm2835_pwm.c
Normal file
439
sys/arm/broadcom/bcm2835/bcm2835_pwm.c
Normal file
@ -0,0 +1,439 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2017 Poul-Henning Kamp <phk@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/sysctl.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <machine/intr.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/broadcom/bcm2835/bcm2835_gpio.h>
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static struct ofw_compat_data compat_data[] = {
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{"broadcom,bcm2835-pwm", 1},
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{"brcm,bcm2835-pwm", 1},
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{NULL, 0}
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};
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struct bcm_pwm_softc {
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device_t sc_dev;
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struct resource * sc_mem_res;
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bus_space_tag_t sc_m_bst;
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bus_space_handle_t sc_m_bsh;
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struct resource * sc_clk_res;
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bus_space_tag_t sc_c_bst;
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bus_space_handle_t sc_c_bsh;
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uint32_t freq;
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uint32_t period;
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uint32_t ratio;
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uint32_t mode;
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};
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#define BCM_PWM_MEM_WRITE(_sc, _off, _val) \
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bus_space_write_4(_sc->sc_m_bst, _sc->sc_m_bsh, _off, _val)
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#define BCM_PWM_MEM_READ(_sc, _off) \
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bus_space_read_4(_sc->sc_m_bst, _sc->sc_m_bsh, _off)
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#define BCM_PWM_CLK_WRITE(_sc, _off, _val) \
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bus_space_write_4(_sc->sc_c_bst, _sc->sc_c_bsh, _off, _val)
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#define BCM_PWM_CLK_READ(_sc, _off) \
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bus_space_read_4(_sc->sc_c_bst, _sc->sc_c_bsh, _off)
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#define W_CTL(_sc, _val) BCM_PWM_MEM_WRITE(_sc, 0x00, _val)
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#define R_CTL(_sc) BCM_PWM_MEM_READ(_sc, 0x00)
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#define W_STA(_sc, _val) BCM_PWM_MEM_WRITE(_sc, 0x04, _val)
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#define R_STA(_sc) BCM_PWM_MEM_READ(_sc, 0x04)
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#define W_RNG(_sc, _val) BCM_PWM_MEM_WRITE(_sc, 0x10, _val)
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#define R_RNG(_sc) BCM_PWM_MEM_READ(_sc, 0x10)
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#define W_DAT(_sc, _val) BCM_PWM_MEM_WRITE(_sc, 0x14, _val)
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#define R_DAT(_sc) BCM_PWM_MEM_READ(_sc, 0x14)
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#define W_CMCLK(_sc, _val) BCM_PWM_CLK_WRITE(_sc, 0x00, 0x5a000000 | (_val))
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#define R_CMCLK(_sc) BCM_PWM_CLK_READ(_sc, 0x00)
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#define W_CMDIV(_sc, _val) BCM_PWM_CLK_WRITE(_sc, 0x04, 0x5a000000 | (_val))
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#define R_CMDIV(_s) BCM_PWM_CLK_READ(_sc, 0x04)
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static int
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bcm_pwm_reconf(struct bcm_pwm_softc *sc)
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{
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int i;
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uint32_t u;
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device_t gpio;
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/* Disable PWM */
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W_CTL(sc, 0);
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/* Stop PWM clock */
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W_CMCLK(sc, 6);
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for (i = 0; i < 10; i++) {
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u = R_CMCLK(sc);
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if (!(u&0x80))
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break;
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DELAY(1000);
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}
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if (u&0x80) {
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device_printf(sc->sc_dev, "Failed to stop clock\n");
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return(EIO);
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}
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if (sc->mode == 0) {
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// XXX: GPIO cfg ?
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return (0);
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}
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/* Ask GPIO0 to set ALT0 for pin 12 */
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gpio = devclass_get_device(devclass_find("gpio"), 0);
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if (!gpio) {
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device_printf(sc->sc_dev, "cannot find gpio0\n");
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return (ENXIO);
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}
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bcm_gpio_set_alternate(gpio, 12, BCM_GPIO_ALT0);
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/* Configure divider */
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u = 500000000/sc->freq;
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if (u < 4) {
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device_printf(sc->sc_dev, "Freq too high (max 125MHz)\n");
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return(EINVAL);
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}
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if (u > 0xfff) {
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device_printf(sc->sc_dev, "Freq too low (min 123Hz)\n");
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return(EINVAL);
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}
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sc->freq = 500000000/u;
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W_CMDIV(sc, u << 12);
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/* Start PWM clock */
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W_CMCLK(sc, 0x16);
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for (i = 0; i < 10; i++) {
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u = R_CMCLK(sc);
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if ((u&0x80))
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break;
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DELAY(1000);
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}
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if (!(u&0x80)) {
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device_printf(sc->sc_dev, "Failed to start clock\n");
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return(EIO);
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}
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/* Config PWM */
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W_RNG(sc, sc->period);
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W_DAT(sc, sc->ratio);
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/* Start PWM */
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if (sc->mode == 1)
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W_CTL(sc, 0x81);
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else
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W_CTL(sc, 0x1);
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return (0);
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}
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static int
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bcm_pwm_pwm_freq_proc(SYSCTL_HANDLER_ARGS)
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{
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struct bcm_pwm_softc *sc;
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uint32_t r;
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int error;
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sc = (struct bcm_pwm_softc *)arg1;
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if (sc->mode == 1)
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r = sc->freq / sc->period;
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else
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r = 0;
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error = sysctl_handle_int(oidp, &r, sizeof(r), req);
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return (error);
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}
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static int
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bcm_pwm_mode_proc(SYSCTL_HANDLER_ARGS)
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{
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struct bcm_pwm_softc *sc;
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uint32_t r;
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int error;
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sc = (struct bcm_pwm_softc *)arg1;
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r = sc->mode;
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error = sysctl_handle_int(oidp, &r, sizeof(r), req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (r > 2)
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return (EINVAL);
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sc->mode = r;
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return (bcm_pwm_reconf(sc));
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}
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static int
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bcm_pwm_freq_proc(SYSCTL_HANDLER_ARGS)
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{
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struct bcm_pwm_softc *sc;
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uint32_t r;
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int error;
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sc = (struct bcm_pwm_softc *)arg1;
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r = sc->freq;
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error = sysctl_handle_int(oidp, &r, sizeof(r), req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (r > 125000000)
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return (EINVAL);
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sc->freq = r;
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return (bcm_pwm_reconf(sc));
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}
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static int
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bcm_pwm_period_proc(SYSCTL_HANDLER_ARGS)
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{
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struct bcm_pwm_softc *sc;
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int error;
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sc = (struct bcm_pwm_softc *)arg1;
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error = sysctl_handle_int(oidp, &sc->period, sizeof(sc->period), req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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return (bcm_pwm_reconf(sc));
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}
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static int
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bcm_pwm_ratio_proc(SYSCTL_HANDLER_ARGS)
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{
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struct bcm_pwm_softc *sc;
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uint32_t r;
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int error;
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sc = (struct bcm_pwm_softc *)arg1;
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r = sc->ratio;
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error = sysctl_handle_int(oidp, &r, sizeof(r), req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (r > sc->period) // XXX >= ?
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return (EINVAL);
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sc->ratio = r;
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BCM_PWM_MEM_WRITE(sc, 0x14, sc->ratio);
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return (0);
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}
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static int
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bcm_pwm_reg_proc(SYSCTL_HANDLER_ARGS)
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{
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struct bcm_pwm_softc *sc;
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uint32_t reg;
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int error;
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sc = (struct bcm_pwm_softc *)arg1;
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if (arg2 & 0x100)
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reg = BCM_PWM_CLK_READ(sc, arg2 & 0xff);
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else
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reg = BCM_PWM_MEM_READ(sc, arg2 & 0xff);
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error = sysctl_handle_int(oidp, ®, sizeof(reg), req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (arg2 & 0x100)
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BCM_PWM_CLK_WRITE(sc, arg2 & 0xff, reg);
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else
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BCM_PWM_MEM_WRITE(sc, arg2, reg);
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return (0);
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}
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static void
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bcm_pwm_sysctl_init(struct bcm_pwm_softc *sc)
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{
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struct sysctl_ctx_list *ctx;
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struct sysctl_oid *tree_node;
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struct sysctl_oid_list *tree;
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/*
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* Add system sysctl tree/handlers.
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*/
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ctx = device_get_sysctl_ctx(sc->sc_dev);
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tree_node = device_get_sysctl_tree(sc->sc_dev);
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tree = SYSCTL_CHILDREN(tree_node);
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if (bootverbose) {
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#define RR(x,y) \
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, y, \
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CTLFLAG_RW | CTLTYPE_UINT, sc, 0x##x, \
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bcm_pwm_reg_proc, "IU", "Register 0x" #x " " y);
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RR(100, "PWMCTL")
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RR(104, "PWMDIV")
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RR(24, "DAT2")
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RR(20, "RNG2")
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RR(18, "FIF1")
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RR(14, "DAT1")
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RR(10, "RNG1")
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RR(08, "DMAC")
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RR(04, "STA")
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RR(00, "CTL")
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#undef RR
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}
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "pwm_freq",
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CTLFLAG_RD | CTLTYPE_UINT, sc, 0,
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bcm_pwm_pwm_freq_proc, "IU", "PWM frequency (Hz)");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "period",
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CTLFLAG_RW | CTLTYPE_UINT, sc, 0,
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bcm_pwm_period_proc, "IU", "PWM period (#clocks)");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "ratio",
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CTLFLAG_RW | CTLTYPE_UINT, sc, 0,
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bcm_pwm_ratio_proc, "IU", "PWM ratio (0...period)");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "freq",
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CTLFLAG_RW | CTLTYPE_UINT, sc, 0,
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bcm_pwm_freq_proc, "IU", "PWM clock (Hz)");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "mode",
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CTLFLAG_RW | CTLTYPE_UINT, sc, 0,
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bcm_pwm_mode_proc, "IU", "PWM mode (0=off, 1=pwm, 2=dither)");
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}
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static int
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bcm_pwm_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "BCM2708/2835 PWM controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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bcm_pwm_attach(device_t dev)
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{
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struct bcm_pwm_softc *sc;
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int rid;
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if (device_get_unit(dev) != 0) {
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device_printf(dev, "only one PWM controller supported\n");
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return (ENXIO);
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}
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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rid = 0;
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sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (!sc->sc_mem_res) {
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device_printf(dev, "cannot allocate memory window\n");
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return (ENXIO);
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}
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sc->sc_m_bst = rman_get_bustag(sc->sc_mem_res);
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sc->sc_m_bsh = rman_get_bushandle(sc->sc_mem_res);
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rid = 1;
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sc->sc_clk_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (!sc->sc_clk_res) {
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device_printf(dev, "cannot allocate clock window\n");
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return (ENXIO);
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}
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sc->sc_c_bst = rman_get_bustag(sc->sc_clk_res);
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sc->sc_c_bsh = rman_get_bushandle(sc->sc_clk_res);
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/* Add sysctl nodes. */
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bcm_pwm_sysctl_init(sc);
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sc->freq = 125000000;
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sc->period = 10000;
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sc->ratio = 2500;
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return (bus_generic_attach(dev));
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}
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static int
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bcm_pwm_detach(device_t dev)
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{
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struct bcm_pwm_softc *sc;
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bus_generic_detach(dev);
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sc = device_get_softc(dev);
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sc->mode = 0;
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(void)bcm_pwm_reconf(sc);
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if (sc->sc_mem_res)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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if (sc->sc_clk_res)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_clk_res);
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return (0);
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}
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static phandle_t
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bcm_pwm_get_node(device_t bus, device_t dev)
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{
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/* We only have one child, the SPI bus, which needs our own node. */
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return (ofw_bus_get_node(bus));
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}
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static device_method_t bcm_pwm_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, bcm_pwm_probe),
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DEVMETHOD(device_attach, bcm_pwm_attach),
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DEVMETHOD(device_detach, bcm_pwm_detach),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_node, bcm_pwm_get_node),
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DEVMETHOD_END
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};
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static devclass_t bcm_pwm_devclass;
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static driver_t bcm_pwm_driver = {
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"pwm",
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bcm_pwm_methods,
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sizeof(struct bcm_pwm_softc),
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};
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DRIVER_MODULE(bcm2835_pwm, simplebus, bcm_pwm_driver, bcm_pwm_devclass, 0, 0);
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@ -425,6 +425,11 @@
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interrupt-parent = <&intc>;
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};
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pwm0 {
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compatible = "broadcom,bcm2835-pwm";
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reg = <0x20c000 0x28>,<0x1010a0 8>;
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};
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dma: dma {
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compatible = "broadcom,bcm2835-dma",
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"broadcom,bcm2708-dma";
|
||||
|
||||
10
sys/modules/rpi_pwm/Makefile
Normal file
10
sys/modules/rpi_pwm/Makefile
Normal file
@ -0,0 +1,10 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${SRCTOP}/sys/arm/broadcom/bcm2835/
|
||||
|
||||
KMOD= rpi_pwm
|
||||
SRCS= bcm2835_pwm.c
|
||||
|
||||
SRCS+= bus_if.h device_if.h ofw_bus_if.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
Loading…
Reference in New Issue
Block a user