Make the minimal clang executable build.
This commit is contained in:
parent
611d080e06
commit
9f6e9a9f35
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/projects/clang700-import/; revision=337010
@ -56,6 +56,7 @@ SRCS_MIN+= AST/CommentCommandTraits.cpp
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SRCS_MIN+= AST/CommentLexer.cpp
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SRCS_MIN+= AST/CommentParser.cpp
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SRCS_MIN+= AST/CommentSema.cpp
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SRCS_MIN+= AST/ComparisonCategories.cpp
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SRCS_FUL+= AST/DataCollection.cpp
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SRCS_MIN+= AST/Decl.cpp
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SRCS_MIN+= AST/DeclBase.cpp
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@ -121,6 +122,7 @@ SRCS_MIN+= Analysis/CloneDetection.cpp
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SRCS_MIN+= Analysis/CocoaConventions.cpp
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SRCS_FUL+= Analysis/CodeInjector.cpp
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SRCS_MIN+= Analysis/Consumed.cpp
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SRCS_MIN+= Analysis/ConstructionContext.cpp
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SRCS_FUL+= Analysis/Dominators.cpp
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SRCS_MIN+= Analysis/FormatString.cpp
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SRCS_MIN+= Analysis/LiveVariables.cpp
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@ -175,6 +177,7 @@ SRCS_MIN+= Basic/Targets/Nios2.cpp
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SRCS_MIN+= Basic/Targets/OSTargets.cpp
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SRCS_MIN+= Basic/Targets/PNaCl.cpp
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SRCS_MIN+= Basic/Targets/PPC.cpp
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SRCS_MIN+= Basic/Targets/RISCV.cpp
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SRCS_MIN+= Basic/Targets/SPIR.cpp
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SRCS_MIN+= Basic/Targets/Sparc.cpp
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SRCS_MIN+= Basic/Targets/SystemZ.cpp
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@ -186,6 +189,7 @@ SRCS_MIN+= Basic/TokenKinds.cpp
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SRCS_MIN+= Basic/Version.cpp
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SRCS_MIN+= Basic/VirtualFileSystem.cpp
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SRCS_MIN+= Basic/Warnings.cpp
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SRCS_MIN+= Basic/XRayInstr.cpp
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SRCS_MIN+= Basic/XRayLists.cpp
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SRCS_MIN+= CodeGen/BackendUtil.cpp
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SRCS_MIN+= CodeGen/CGAtomic.cpp
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@ -211,6 +215,7 @@ SRCS_MIN+= CodeGen/CGExprConstant.cpp
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SRCS_MIN+= CodeGen/CGExprScalar.cpp
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SRCS_MIN+= CodeGen/CGGPUBuiltin.cpp
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SRCS_MIN+= CodeGen/CGLoopInfo.cpp
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SRCS_MIN+= CodeGen/CGNonTrivialStruct.cpp
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SRCS_MIN+= CodeGen/CGObjC.cpp
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SRCS_MIN+= CodeGen/CGObjCGNU.cpp
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SRCS_MIN+= CodeGen/CGObjCMac.cpp
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@ -259,6 +264,7 @@ SRCS_MIN+= Driver/ToolChains/Arch/AArch64.cpp
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SRCS_MIN+= Driver/ToolChains/Arch/ARM.cpp
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SRCS_MIN+= Driver/ToolChains/Arch/Mips.cpp
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SRCS_MIN+= Driver/ToolChains/Arch/PPC.cpp
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SRCS_MIN+= Driver/ToolChains/Arch/RISCV.cpp
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SRCS_MIN+= Driver/ToolChains/Arch/Sparc.cpp
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SRCS_MIN+= Driver/ToolChains/Arch/SystemZ.cpp
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SRCS_MIN+= Driver/ToolChains/Arch/X86.cpp
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@ -274,6 +280,7 @@ SRCS_MIN+= Driver/ToolChains/DragonFly.cpp
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SRCS_MIN+= Driver/ToolChains/FreeBSD.cpp
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SRCS_MIN+= Driver/ToolChains/Fuchsia.cpp
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SRCS_MIN+= Driver/ToolChains/Gnu.cpp
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SRCS_MIN+= Driver/ToolChains/HIP.cpp
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SRCS_MIN+= Driver/ToolChains/Haiku.cpp
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SRCS_MIN+= Driver/ToolChains/Hexagon.cpp
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SRCS_MIN+= Driver/ToolChains/Linux.cpp
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@ -325,6 +332,7 @@ SRCS_MIN+= Frontend/DiagnosticRenderer.cpp
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SRCS_MIN+= Frontend/FrontendAction.cpp
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SRCS_MIN+= Frontend/FrontendActions.cpp
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SRCS_MIN+= Frontend/FrontendOptions.cpp
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SRCS_MIN+= Frontend/FrontendTiming.cpp
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SRCS_MIN+= Frontend/HeaderIncludeGen.cpp
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SRCS_MIN+= Frontend/InitHeaderSearch.cpp
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SRCS_MIN+= Frontend/InitPreprocessor.cpp
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@ -410,6 +418,7 @@ SRCS_MIN+= Sema/DelayedDiagnostic.cpp
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SRCS_MIN+= Sema/IdentifierResolver.cpp
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SRCS_MIN+= Sema/JumpDiagnostics.cpp
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SRCS_MIN+= Sema/MultiplexExternalSemaSource.cpp
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SRCS_MIN+= Sema/ParsedAttr.cpp
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SRCS_MIN+= Sema/Scope.cpp
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SRCS_MIN+= Sema/ScopeInfo.cpp
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SRCS_MIN+= Sema/Sema.cpp
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@ -749,10 +758,16 @@ clang/Basic/DiagnosticIndexName.inc: \
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-o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/Diagnostic.td
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TGHDRS+= clang/Basic/DiagnosticIndexName.inc
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clang/Basic/arm_fp16.inc: ${CLANG_SRCS}/include/clang/Basic/arm_fp16.td
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${CLANG_TBLGEN} -gen-arm-neon-sema \
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-I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \
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-o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_fp16.td
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TGHDRS+= clang/Basic/arm_fp16.inc
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clang/Basic/arm_neon.inc: ${CLANG_SRCS}/include/clang/Basic/arm_neon.td
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${CLANG_TBLGEN} -gen-arm-neon-sema \
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-d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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${CLANG_SRCS}/include/clang/Basic/arm_neon.td
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-I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \
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-o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_neon.td
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TGHDRS+= clang/Basic/arm_neon.inc
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clang/Driver/Options.inc: ${CLANG_SRCS}/include/clang/Driver/Options.td
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@ -822,7 +837,8 @@ TGHDRS+= clang/Serialization/AttrPCHWrite.inc
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clang/StaticAnalyzer/Checkers/Checkers.inc: \
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${CLANG_SRCS}/include/clang/StaticAnalyzer/Checkers/Checkers.td
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${CLANG_TBLGEN} -gen-clang-sa-checkers \
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-I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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-I ${CLANG_SRCS}/include/clang/StaticAnalyzer/Checkers \
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-d ${.TARGET:C/$/.d/} -o ${.TARGET} \
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${CLANG_SRCS}/include/clang/StaticAnalyzer/Checkers/Checkers.td
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TGHDRS+= clang/StaticAnalyzer/Checkers/Checkers.inc
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@ -83,12 +83,14 @@ SRCS_MIN+= Analysis/MemorySSA.cpp
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SRCS_MIN+= Analysis/MemorySSAUpdater.cpp
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SRCS_MIN+= Analysis/ModuleDebugInfoPrinter.cpp
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SRCS_MIN+= Analysis/ModuleSummaryAnalysis.cpp
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SRCS_MIN+= Analysis/MustExecute.cpp
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SRCS_MIN+= Analysis/ObjCARCAliasAnalysis.cpp
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SRCS_MIN+= Analysis/ObjCARCAnalysisUtils.cpp
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SRCS_MIN+= Analysis/ObjCARCInstKind.cpp
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SRCS_MIN+= Analysis/OptimizationRemarkEmitter.cpp
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SRCS_MIN+= Analysis/OrderedBasicBlock.cpp
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SRCS_MIN+= Analysis/PHITransAddr.cpp
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SRCS_MIN+= Analysis/PhiValues.cpp
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SRCS_MIN+= Analysis/PostDominators.cpp
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SRCS_MIN+= Analysis/ProfileSummaryInfo.cpp
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SRCS_MIN+= Analysis/PtrUseVisitor.cpp
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@ -100,6 +102,7 @@ SRCS_MIN+= Analysis/ScalarEvolutionAliasAnalysis.cpp
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SRCS_MIN+= Analysis/ScalarEvolutionExpander.cpp
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SRCS_MIN+= Analysis/ScalarEvolutionNormalization.cpp
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SRCS_MIN+= Analysis/ScopedNoAliasAA.cpp
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SRCS_MIN+= Analysis/SyntheticCountsUtils.cpp
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SRCS_MIN+= Analysis/TargetLibraryInfo.cpp
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SRCS_MIN+= Analysis/TargetTransformInfo.cpp
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SRCS_MIN+= Analysis/Trace.cpp
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@ -114,6 +117,7 @@ SRCS_MIN+= AsmParser/LLParser.cpp
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SRCS_MIN+= AsmParser/Parser.cpp
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SRCS_MIN+= BinaryFormat/Dwarf.cpp
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SRCS_MIN+= BinaryFormat/Magic.cpp
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SRCS_MIN+= BinaryFormat/Wasm.cpp
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SRCS_MIN+= Bitcode/Reader/BitReader.cpp
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SRCS_MIN+= Bitcode/Reader/BitcodeReader.cpp
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SRCS_MIN+= Bitcode/Reader/BitstreamReader.cpp
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@ -127,6 +131,7 @@ SRCS_MIN+= CodeGen/AggressiveAntiDepBreaker.cpp
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SRCS_MIN+= CodeGen/AllocationOrder.cpp
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SRCS_MIN+= CodeGen/Analysis.cpp
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SRCS_MIN+= CodeGen/AsmPrinter/ARMException.cpp
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SRCS_MIN+= CodeGen/AsmPrinter/AccelTable.cpp
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SRCS_MIN+= CodeGen/AsmPrinter/AddressPool.cpp
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SRCS_MIN+= CodeGen/AsmPrinter/AsmPrinter.cpp
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SRCS_MIN+= CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
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@ -147,12 +152,15 @@ SRCS_MIN+= CodeGen/AsmPrinter/DwarfUnit.cpp
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SRCS_MIN+= CodeGen/AsmPrinter/EHStreamer.cpp
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SRCS_MIN+= CodeGen/AsmPrinter/ErlangGCPrinter.cpp
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SRCS_MIN+= CodeGen/AsmPrinter/OcamlGCPrinter.cpp
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SRCS_MIN+= CodeGen/AsmPrinter/WinCFGuard.cpp
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SRCS_MIN+= CodeGen/AsmPrinter/WinException.cpp
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SRCS_MIN+= CodeGen/AtomicExpandPass.cpp
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SRCS_MIN+= CodeGen/BasicTargetTransformInfo.cpp
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SRCS_MIN+= CodeGen/BranchFolding.cpp
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SRCS_MIN+= CodeGen/BranchRelaxation.cpp
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SRCS_MIN+= CodeGen/BreakFalseDeps.cpp
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SRCS_MIN+= CodeGen/BuiltinGCs.cpp
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SRCS_MIN+= CodeGen/CFIInstrInserter.cpp
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SRCS_MIN+= CodeGen/CalcSpillWeights.cpp
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SRCS_MIN+= CodeGen/CallingConvLower.cpp
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SRCS_MIN+= CodeGen/CodeGen.cpp
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@ -164,6 +172,7 @@ SRCS_MIN+= CodeGen/DetectDeadLanes.cpp
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SRCS_MIN+= CodeGen/DwarfEHPrepare.cpp
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SRCS_MIN+= CodeGen/EarlyIfConversion.cpp
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SRCS_MIN+= CodeGen/EdgeBundles.cpp
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SRCS_MIN+= CodeGen/ExecutionDomainFix.cpp
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SRCS_MIN+= CodeGen/ExpandISelPseudos.cpp
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SRCS_MIN+= CodeGen/ExpandMemCmp.cpp
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SRCS_MIN+= CodeGen/ExpandPostRAPseudos.cpp
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@ -180,6 +189,8 @@ SRCS_MIN+= CodeGen/GlobalISel/GlobalISel.cpp
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SRCS_MIN+= CodeGen/GlobalISel/IRTranslator.cpp
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SRCS_MIN+= CodeGen/GlobalISel/InstructionSelect.cpp
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SRCS_MIN+= CodeGen/GlobalISel/InstructionSelector.cpp
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SRCS_MIN+= CodeGen/GlobalISel/LegalityPredicates.cpp
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SRCS_MIN+= CodeGen/GlobalISel/LegalizeMutations.cpp
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SRCS_MIN+= CodeGen/GlobalISel/Legalizer.cpp
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SRCS_MIN+= CodeGen/GlobalISel/LegalizerHelper.cpp
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SRCS_MIN+= CodeGen/GlobalISel/LegalizerInfo.cpp
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@ -215,6 +226,7 @@ SRCS_MIN+= CodeGen/LiveRegUnits.cpp
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SRCS_MIN+= CodeGen/LiveStacks.cpp
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SRCS_MIN+= CodeGen/LiveVariables.cpp
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SRCS_MIN+= CodeGen/LocalStackSlotAllocation.cpp
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SRCS_MIN+= CodeGen/LoopTraversal.cpp
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SRCS_MIN+= CodeGen/LowLevelType.cpp
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SRCS_MIN+= CodeGen/LowerEmuTLS.cpp
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SRCS_MIN+= CodeGen/MIRCanonicalizerPass.cpp
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@ -268,6 +280,7 @@ SRCS_MIN+= CodeGen/PreISelIntrinsicLowering.cpp
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SRCS_MIN+= CodeGen/ProcessImplicitDefs.cpp
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SRCS_MIN+= CodeGen/PrologEpilogInserter.cpp
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SRCS_MIN+= CodeGen/PseudoSourceValue.cpp
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SRCS_MIN+= CodeGen/ReachingDefAnalysis.cpp
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SRCS_MIN+= CodeGen/RegAllocBase.cpp
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SRCS_MIN+= CodeGen/RegAllocBasic.cpp
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SRCS_MIN+= CodeGen/RegAllocFast.cpp
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@ -339,7 +352,9 @@ SRCS_MIN+= CodeGen/TargetSchedule.cpp
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SRCS_MIN+= CodeGen/TargetSubtargetInfo.cpp
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SRCS_MIN+= CodeGen/TwoAddressInstructionPass.cpp
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SRCS_MIN+= CodeGen/UnreachableBlockElim.cpp
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SRCS_MIN+= CodeGen/ValueTypes.cpp
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SRCS_MIN+= CodeGen/VirtRegMap.cpp
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SRCS_MIN+= CodeGen/WasmEHPrepare.cpp
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SRCS_MIN+= CodeGen/WinEHPrepare.cpp
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SRCS_MIN+= CodeGen/XRayInstrumentation.cpp
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SRCS_EXT+= DebugInfo/CodeView/AppendingTypeTableBuilder.cpp
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@ -525,6 +540,7 @@ SRCS_MIN+= IR/DebugLoc.cpp
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SRCS_MIN+= IR/DiagnosticHandler.cpp
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SRCS_MIN+= IR/DiagnosticInfo.cpp
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SRCS_MIN+= IR/DiagnosticPrinter.cpp
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SRCS_MIN+= IR/DomTreeUpdater.cpp
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SRCS_MIN+= IR/Dominators.cpp
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SRCS_MIN+= IR/Function.cpp
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SRCS_MIN+= IR/GVMaterializer.cpp
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@ -576,6 +592,7 @@ SRCS_MIN+= MC/MCAsmInfo.cpp
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SRCS_MIN+= MC/MCAsmInfoCOFF.cpp
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SRCS_MIN+= MC/MCAsmInfoDarwin.cpp
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SRCS_MIN+= MC/MCAsmInfoELF.cpp
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SRCS_MIN+= MC/MCAsmMacro.cpp
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SRCS_MIN+= MC/MCAsmStreamer.cpp
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SRCS_MIN+= MC/MCAssembler.cpp
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SRCS_MIN+= MC/MCCodeEmitter.cpp
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@ -632,6 +649,7 @@ SRCS_MIN+= MC/MCWinEH.cpp
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SRCS_MIN+= MC/MachObjectWriter.cpp
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SRCS_MIN+= MC/StringTableBuilder.cpp
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SRCS_MIN+= MC/SubtargetFeature.cpp
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SRCS_MIN+= MC/WasmObjectWriter.cpp
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SRCS_MIN+= MC/WinCOFFObjectWriter.cpp
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SRCS_MIN+= Object/Archive.cpp
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SRCS_MIN+= Object/ArchiveWriter.cpp
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@ -702,6 +720,7 @@ SRCS_MIN+= Support/ConvertUTF.cpp
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SRCS_MIN+= Support/ConvertUTFWrapper.cpp
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SRCS_MIN+= Support/CrashRecoveryContext.cpp
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SRCS_MIN+= Support/DAGDeltaAlgorithm.cpp
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SRCS_MIN+= Support/DJB.cpp
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SRCS_MIN+= Support/DataExtractor.cpp
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SRCS_MIN+= Support/Debug.cpp
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SRCS_MIN+= Support/DebugCounter.cpp
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@ -719,6 +738,7 @@ SRCS_MIN+= Support/GlobPattern.cpp
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SRCS_MIN+= Support/GraphWriter.cpp
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SRCS_MIN+= Support/Hashing.cpp
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SRCS_MIN+= Support/Host.cpp
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SRCS_MIN+= Support/InitLLVM.cpp
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SRCS_MIN+= Support/IntEqClasses.cpp
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SRCS_MIN+= Support/IntervalMap.cpp
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SRCS_MIN+= Support/JamCRC.cpp
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@ -771,7 +791,9 @@ SRCS_MIN+= Support/TrigramIndex.cpp
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SRCS_MIN+= Support/Triple.cpp
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SRCS_MIN+= Support/Twine.cpp
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SRCS_MIN+= Support/Unicode.cpp
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SRCS_MIN+= Support/UnicodeCaseFold.cpp
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SRCS_MIN+= Support/Valgrind.cpp
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SRCS_MIN+= Support/VersionTuple.cpp
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SRCS_MIN+= Support/YAMLParser.cpp
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SRCS_MIN+= Support/YAMLTraits.cpp
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SRCS_MIN+= Support/circular_raw_ostream.cpp
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@ -851,6 +873,7 @@ SRCS_MIN+= Target/ARM/ARMAsmPrinter.cpp
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SRCS_MIN+= Target/ARM/ARMBaseInstrInfo.cpp
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SRCS_MIN+= Target/ARM/ARMBaseRegisterInfo.cpp
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SRCS_MIN+= Target/ARM/ARMCallLowering.cpp
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SRCS_MIN+= Target/ARM/ARMCodeGenPrepare.cpp
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SRCS_MIN+= Target/ARM/ARMComputeBlockSize.cpp
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SRCS_MIN+= Target/ARM/ARMConstantIslandPass.cpp
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SRCS_MIN+= Target/ARM/ARMConstantPoolValue.cpp
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@ -868,6 +891,7 @@ SRCS_MIN+= Target/ARM/ARMMCInstLower.cpp
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SRCS_MIN+= Target/ARM/ARMMachineFunctionInfo.cpp
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SRCS_MIN+= Target/ARM/ARMMacroFusion.cpp
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SRCS_MIN+= Target/ARM/ARMOptimizeBarriersPass.cpp
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SRCS_MIN+= Target/ARM/ARMParallelDSP.cpp
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SRCS_MIN+= Target/ARM/ARMRegisterBankInfo.cpp
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SRCS_MIN+= Target/ARM/ARMRegisterInfo.cpp
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SRCS_MIN+= Target/ARM/ARMSelectionDAGInfo.cpp
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@ -927,19 +951,25 @@ SRCS_MIN+= Target/Mips/Mips16InstrInfo.cpp
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SRCS_MIN+= Target/Mips/Mips16RegisterInfo.cpp
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SRCS_MIN+= Target/Mips/MipsAnalyzeImmediate.cpp
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SRCS_MIN+= Target/Mips/MipsAsmPrinter.cpp
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SRCS_MIN+= Target/Mips/MipsBranchExpansion.cpp
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SRCS_MIN+= Target/Mips/MipsCCState.cpp
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SRCS_MIN+= Target/Mips/MipsCallLowering.cpp
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SRCS_MIN+= Target/Mips/MipsConstantIslandPass.cpp
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SRCS_MIN+= Target/Mips/MipsDelaySlotFiller.cpp
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SRCS_MIN+= Target/Mips/MipsExpandPseudo.cpp
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SRCS_MIN+= Target/Mips/MipsFastISel.cpp
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SRCS_MIN+= Target/Mips/MipsFrameLowering.cpp
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SRCS_MIN+= Target/Mips/MipsISelDAGToDAG.cpp
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SRCS_MIN+= Target/Mips/MipsISelLowering.cpp
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SRCS_MIN+= Target/Mips/MipsInstrInfo.cpp
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SRCS_MIN+= Target/Mips/MipsInstructionSelector.cpp
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SRCS_MIN+= Target/Mips/MipsLegalizerInfo.cpp
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SRCS_MIN+= Target/Mips/MipsMCInstLower.cpp
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SRCS_MIN+= Target/Mips/MipsMachineFunction.cpp
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SRCS_MIN+= Target/Mips/MipsModuleISelDAGToDAG.cpp
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SRCS_MIN+= Target/Mips/MipsOptimizePICCall.cpp
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SRCS_MIN+= Target/Mips/MipsOs16.cpp
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SRCS_MIN+= Target/Mips/MipsRegisterBankInfo.cpp
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SRCS_MIN+= Target/Mips/MipsRegisterInfo.cpp
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SRCS_MIN+= Target/Mips/MipsSEFrameLowering.cpp
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SRCS_MIN+= Target/Mips/MipsSEISelDAGToDAG.cpp
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@ -1034,6 +1064,7 @@ SRCS_XDW+= Target/X86/Disassembler/X86Disassembler.cpp
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SRCS_XDW+= Target/X86/Disassembler/X86DisassemblerDecoder.cpp
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SRCS_MIN+= Target/X86/InstPrinter/X86ATTInstPrinter.cpp
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SRCS_MIN+= Target/X86/InstPrinter/X86InstComments.cpp
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SRCS_MIN+= Target/X86/InstPrinter/X86InstPrinterCommon.cpp
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SRCS_MIN+= Target/X86/InstPrinter/X86IntelInstPrinter.cpp
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SRCS_MIN+= Target/X86/MCTargetDesc/X86AsmBackend.cpp
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SRCS_MIN+= Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
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@ -1046,7 +1077,9 @@ SRCS_MIN+= Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp
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SRCS_MIN+= Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp
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SRCS_MIN+= Target/X86/TargetInfo/X86TargetInfo.cpp
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SRCS_MIN+= Target/X86/Utils/X86ShuffleDecode.cpp
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SRCS_MIN+= Target/X86/ShadowCallStack.cpp
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SRCS_MIN+= Target/X86/X86AsmPrinter.cpp
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SRCS_MIN+= Target/X86/X86AvoidStoreForwardingBlocks.cpp
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SRCS_MIN+= Target/X86/X86CallFrameOptimization.cpp
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SRCS_MIN+= Target/X86/X86CallLowering.cpp
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SRCS_MIN+= Target/X86/X86CallingConv.cpp
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@ -1063,7 +1096,9 @@ SRCS_MIN+= Target/X86/X86FloatingPoint.cpp
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SRCS_MIN+= Target/X86/X86FrameLowering.cpp
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SRCS_MIN+= Target/X86/X86ISelDAGToDAG.cpp
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SRCS_MIN+= Target/X86/X86ISelLowering.cpp
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SRCS_MIN+= Target/X86/X86IndirectBranchTracking.cpp
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SRCS_MIN+= Target/X86/X86InstrFMA3Info.cpp
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SRCS_MIN+= Target/X86/X86InstrFoldTables.cpp
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SRCS_MIN+= Target/X86/X86InstrInfo.cpp
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SRCS_MIN+= Target/X86/X86InstructionSelector.cpp
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SRCS_MIN+= Target/X86/X86InterleavedAccess.cpp
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@ -1078,6 +1113,7 @@ SRCS_MIN+= Target/X86/X86RegisterInfo.cpp
|
||||
SRCS_MIN+= Target/X86/X86RetpolineThunks.cpp
|
||||
SRCS_MIN+= Target/X86/X86SelectionDAGInfo.cpp
|
||||
SRCS_MIN+= Target/X86/X86ShuffleDecodeConstantPool.cpp
|
||||
SRCS_MIN+= Target/X86/X86SpeculativeLoadHardening.cpp
|
||||
SRCS_MIN+= Target/X86/X86Subtarget.cpp
|
||||
SRCS_MIN+= Target/X86/X86TargetMachine.cpp
|
||||
SRCS_MIN+= Target/X86/X86TargetObjectFile.cpp
|
||||
@ -1088,6 +1124,8 @@ SRCS_MIN+= Target/X86/X86WinEHState.cpp
|
||||
.endif # MK_LLVM_TARGET_X86
|
||||
SRCS_EXT+= ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
|
||||
SRCS_EXL+= ToolDrivers/llvm-lib/LibDriver.cpp
|
||||
SRCS_MIN+= Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
|
||||
SRCS_MIN+= Transforms/AggressiveInstCombine/TruncInstCombine.cpp
|
||||
SRCS_MIN+= Transforms/Coroutines/CoroCleanup.cpp
|
||||
SRCS_MIN+= Transforms/Coroutines/CoroEarly.cpp
|
||||
SRCS_MIN+= Transforms/Coroutines/CoroElide.cpp
|
||||
@ -1121,9 +1159,11 @@ SRCS_MIN+= Transforms/IPO/MergeFunctions.cpp
|
||||
SRCS_MIN+= Transforms/IPO/PartialInlining.cpp
|
||||
SRCS_MIN+= Transforms/IPO/PassManagerBuilder.cpp
|
||||
SRCS_MIN+= Transforms/IPO/PruneEH.cpp
|
||||
SRCS_MIN+= Transforms/IPO/SCCP.cpp
|
||||
SRCS_MIN+= Transforms/IPO/SampleProfile.cpp
|
||||
SRCS_MIN+= Transforms/IPO/StripDeadPrototypes.cpp
|
||||
SRCS_MIN+= Transforms/IPO/StripSymbols.cpp
|
||||
SRCS_MIN+= Transforms/IPO/SyntheticCountsPropagation.cpp
|
||||
SRCS_MIN+= Transforms/IPO/ThinLTOBitcodeWriter.cpp
|
||||
SRCS_MIN+= Transforms/IPO/WholeProgramDevirt.cpp
|
||||
SRCS_MIN+= Transforms/InstCombine/InstCombineAddSub.cpp
|
||||
@ -1141,6 +1181,7 @@ SRCS_MIN+= Transforms/InstCombine/InstCombineVectorOps.cpp
|
||||
SRCS_MIN+= Transforms/InstCombine/InstructionCombining.cpp
|
||||
SRCS_MIN+= Transforms/Instrumentation/AddressSanitizer.cpp
|
||||
SRCS_MIN+= Transforms/Instrumentation/BoundsChecking.cpp
|
||||
SRCS_MIN+= Transforms/Instrumentation/CGProfile.cpp
|
||||
SRCS_MIN+= Transforms/Instrumentation/DataFlowSanitizer.cpp
|
||||
SRCS_MIN+= Transforms/Instrumentation/EfficiencySanitizer.cpp
|
||||
SRCS_MIN+= Transforms/Instrumentation/GCOVProfiling.cpp
|
||||
@ -1183,6 +1224,7 @@ SRCS_MIN+= Transforms/Scalar/IVUsersPrinter.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/IndVarSimplify.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/InductiveRangeCheckElimination.cpp
|
||||
SRCS_EXT+= Transforms/Scalar/InferAddressSpaces.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/InstSimplifyPass.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/JumpThreading.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LICM.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LoopAccessAnalysisPrinter.cpp
|
||||
@ -1201,6 +1243,7 @@ SRCS_MIN+= Transforms/Scalar/LoopSimplifyCFG.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LoopSink.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LoopStrengthReduce.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LoopUnrollPass.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LoopUnrollAndJamPass.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LoopUnswitch.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LoopVersioningLICM.cpp
|
||||
SRCS_MIN+= Transforms/Scalar/LowerAtomic.cpp
|
||||
@ -1256,7 +1299,9 @@ SRCS_MIN+= Transforms/Utils/LCSSA.cpp
|
||||
SRCS_MIN+= Transforms/Utils/LibCallsShrinkWrap.cpp
|
||||
SRCS_MIN+= Transforms/Utils/Local.cpp
|
||||
SRCS_MIN+= Transforms/Utils/LoopSimplify.cpp
|
||||
SRCS_MIN+= Transforms/Utils/LoopRotationUtils.cpp
|
||||
SRCS_MIN+= Transforms/Utils/LoopUnroll.cpp
|
||||
SRCS_MIN+= Transforms/Utils/LoopUnrollAndJam.cpp
|
||||
SRCS_MIN+= Transforms/Utils/LoopUnrollPeel.cpp
|
||||
SRCS_MIN+= Transforms/Utils/LoopUnrollRuntime.cpp
|
||||
SRCS_MIN+= Transforms/Utils/LoopUtils.cpp
|
||||
@ -1284,9 +1329,12 @@ SRCS_EXT+= Transforms/Utils/Utils.cpp
|
||||
SRCS_MIN+= Transforms/Utils/VNCoercion.cpp
|
||||
SRCS_MIN+= Transforms/Utils/ValueMapper.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/LoadStoreVectorizer.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/LoopVectorizationLegality.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/LoopVectorize.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/SLPVectorizer.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/VPlan.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/VPlanHCFGBuilder.cpp
|
||||
SRCS_MIN+= Transforms/Vectorize/VPlanVerifier.cpp
|
||||
SRCS_EXT+= Transforms/Vectorize/Vectorize.cpp
|
||||
SRCS_EXT+= XRay/InstrumentationMap.cpp
|
||||
|
||||
@ -1320,17 +1368,23 @@ SRCS_ALL+= ${SRCS_XDW}
|
||||
.endif
|
||||
SRCS+= ${SRCS_ALL:O}
|
||||
|
||||
llvm/IR/Attributes.gen: ${LLVM_SRCS}/include/llvm/IR/Attributes.td
|
||||
llvm/IR/Attributes.inc: ${LLVM_SRCS}/include/llvm/IR/Attributes.td
|
||||
${LLVM_TBLGEN} -gen-attrs \
|
||||
-I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
|
||||
${LLVM_SRCS}/include/llvm/IR/Attributes.td
|
||||
TGHDRS+= llvm/IR/Attributes.gen
|
||||
TGHDRS+= llvm/IR/Attributes.inc
|
||||
|
||||
llvm/IR/Intrinsics.gen: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
|
||||
${LLVM_TBLGEN} -gen-intrinsic \
|
||||
llvm/IR/IntrinsicEnums.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
|
||||
${LLVM_TBLGEN} -gen-intrinsic-enums \
|
||||
-I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
|
||||
${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
|
||||
TGHDRS+= llvm/IR/Intrinsics.gen
|
||||
TGHDRS+= llvm/IR/IntrinsicEnums.inc
|
||||
|
||||
llvm/IR/IntrinsicImpl.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
|
||||
${LLVM_TBLGEN} -gen-intrinsic-impl \
|
||||
-I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
|
||||
${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
|
||||
TGHDRS+= llvm/IR/IntrinsicImpl.inc
|
||||
|
||||
AttributesCompatFunc.inc: ${LLVM_SRCS}/lib/IR/AttributesCompatFunc.td
|
||||
${LLVM_TBLGEN} -gen-attrs \
|
||||
@ -1338,6 +1392,12 @@ AttributesCompatFunc.inc: ${LLVM_SRCS}/lib/IR/AttributesCompatFunc.td
|
||||
${LLVM_SRCS}/lib/IR/AttributesCompatFunc.td
|
||||
TGHDRS+= AttributesCompatFunc.inc
|
||||
|
||||
InstCombineTables.inc: ${LLVM_SRCS}/lib/Transforms/InstCombine/InstCombineTables.td
|
||||
${LLVM_TBLGEN} -gen-searchable-tables \
|
||||
-I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
|
||||
${LLVM_SRCS}/lib/Transforms/InstCombine/InstCombineTables.td
|
||||
TGHDRS+= InstCombineTables.inc
|
||||
|
||||
llvm-lib/Options.inc: ${LLVM_SRCS}/lib/ToolDrivers/llvm-lib/Options.td
|
||||
${LLVM_TBLGEN} -gen-opt-parser-defs \
|
||||
-I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
|
||||
@ -1431,9 +1491,11 @@ TGHDRS+= MipsGenCallingConv.inc
|
||||
TGHDRS+= MipsGenDAGISel.inc
|
||||
TGHDRS+= MipsGenDisassemblerTables.inc
|
||||
TGHDRS+= MipsGenFastISel.inc
|
||||
TGHDRS+= MipsGenGlobalISel.inc
|
||||
TGHDRS+= MipsGenInstrInfo.inc
|
||||
TGHDRS+= MipsGenMCCodeEmitter.inc
|
||||
TGHDRS+= MipsGenMCPseudoLowering.inc
|
||||
TGHDRS+= MipsGenRegisterBank.inc
|
||||
TGHDRS+= MipsGenRegisterInfo.inc
|
||||
TGHDRS+= MipsGenSubtargetInfo.inc
|
||||
.endif # MK_LLVM_TARGET_MIPS
|
||||
|
@ -7,6 +7,7 @@ PROG_CXX= clang
|
||||
SRCDIR= tools/clang/tools/driver
|
||||
SRCS+= cc1_main.cpp
|
||||
SRCS+= cc1as_main.cpp
|
||||
SRCS+= cc1gen_reproducer_main.cpp
|
||||
SRCS+= driver.cpp
|
||||
|
||||
.if ${MK_SHARED_TOOLCHAIN} == "no"
|
||||
|
Loading…
Reference in New Issue
Block a user