qlxgbe: Remove unused variables.
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10e3e53dd4
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@ -2264,9 +2264,6 @@ qla_tx_tso(qla_host_t *ha, struct mbuf *mp, q80_tx_cmd_t *tx_cmd, uint8_t *hdr)
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struct tcphdr *th = NULL;
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uint32_t ehdrlen, hdrlen, ip_hlen, tcp_hlen, tcp_opt_off;
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uint16_t etype, opcode, offload = 1;
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device_t dev;
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dev = ha->pci_dev;
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eh = mtod(mp, struct ether_vlan_header *);
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@ -2330,7 +2327,7 @@ qla_tx_tso(qla_host_t *ha, struct mbuf *mp, q80_tx_cmd_t *tx_cmd, uint8_t *hdr)
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break;
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default:
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QL_DPRINT8(ha, (dev, "%s: type!=ip\n", __func__));
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QL_DPRINT8(ha, (ha->pci_dev, "%s: type!=ip\n", __func__));
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offload = 0;
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break;
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}
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@ -2387,11 +2384,8 @@ qla_tx_chksum(qla_host_t *ha, struct mbuf *mp, uint32_t *op_code,
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struct ip6_hdr *ip6;
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uint32_t ehdrlen, ip_hlen;
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uint16_t etype, opcode, offload = 1;
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device_t dev;
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uint8_t buf[sizeof(struct ip6_hdr)];
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dev = ha->pci_dev;
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*op_code = 0;
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if ((mp->m_pkthdr.csum_flags &
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@ -2903,14 +2897,11 @@ qla_confirm_9kb_enable(qla_host_t *ha)
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int
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ql_init_hw_if(qla_host_t *ha)
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{
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device_t dev;
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uint32_t i;
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uint8_t bcast_mac[6];
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qla_rdesc_t *rdesc;
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uint32_t num_msix;
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dev = ha->pci_dev;
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for (i = 0; i < ha->hw.num_sds_rings; i++) {
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bzero(ha->hw.dma_buf.sds_ring[i].dma_b,
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ha->hw.dma_buf.sds_ring[i].size);
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@ -4652,7 +4643,7 @@ static int
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ql_parse_template(qla_host_t *ha)
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{
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uint32_t num_of_entries, buff_level, e_cnt, esize;
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uint32_t end_cnt, rv = 0;
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uint32_t rv = 0;
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char *dump_buff, *dbuff;
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int sane_start = 0, sane_end = 0;
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ql_minidump_template_hdr_t *template_hdr;
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@ -4729,9 +4720,6 @@ ql_parse_template(qla_host_t *ha)
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break;
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case RDEND:
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if (sane_end == 0) {
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end_cnt = e_cnt;
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}
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sane_end++;
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break;
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@ -5457,7 +5445,7 @@ ql_pollrd(qla_host_t *ha, ql_minidump_entry_pollrd_t *entry,
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int ret;
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int loop_cnt;
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uint32_t op_count, select_addr, select_value_stride, select_value;
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uint32_t read_addr, poll, mask, data_size, data;
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uint32_t read_addr, poll, mask, data;
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uint32_t wait_count = 0;
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select_addr = entry->select_addr;
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@ -5467,7 +5455,6 @@ ql_pollrd(qla_host_t *ha, ql_minidump_entry_pollrd_t *entry,
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op_count = entry->op_count;
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poll = entry->poll;
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mask = entry->mask;
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data_size = entry->data_size;
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for (loop_cnt = 0; loop_cnt < op_count; loop_cnt++) {
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ret = ql_rdwr_indreg32(ha, select_addr, &select_value, 0);
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@ -5524,7 +5511,7 @@ ql_pollrd_modify_write(qla_host_t *ha,
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{
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int ret;
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uint32_t addr_1, addr_2, value_1, value_2, data;
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uint32_t poll, mask, data_size, modify_mask;
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uint32_t poll, mask, modify_mask;
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uint32_t wait_count = 0;
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addr_1 = entry->addr_1;
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@ -5535,7 +5522,6 @@ ql_pollrd_modify_write(qla_host_t *ha,
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poll = entry->poll;
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mask = entry->mask;
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modify_mask = entry->modify_mask;
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data_size = entry->data_size;
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ret = ql_rdwr_indreg32(ha, addr_1, &value_1, 0);
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if (ret)
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@ -259,10 +259,8 @@ static void
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qla_watchdog(void *arg)
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{
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qla_host_t *ha = arg;
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qla_hw_t *hw;
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struct ifnet *ifp;
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hw = &ha->hw;
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ifp = ha->ifp;
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if (ha->qla_watchdog_exit) {
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@ -1648,13 +1646,10 @@ static void
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qla_stop(qla_host_t *ha)
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{
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struct ifnet *ifp = ha->ifp;
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device_t dev;
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int i = 0;
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ql_sp_log(ha, 13, 0, 0, 0, 0, 0, 0);
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dev = ha->pci_dev;
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ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
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ha->qla_watchdog_pause = 1;
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@ -1946,7 +1941,6 @@ int
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ql_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp)
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{
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register struct mbuf *mp = nmp;
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struct ifnet *ifp;
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int ret = 0;
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uint32_t offset;
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bus_dma_segment_t segs[1];
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@ -1954,8 +1948,6 @@ ql_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp)
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QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
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ifp = ha->ifp;
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if (ha->hw.enable_9kb)
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mbuf_size = MJUM9BYTES;
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else
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