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Bring an overly enthusiastic KASSERT inline with the Intel SDM.

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Reviewed by:	neel
This commit is contained in:
Tycho Nightingale 2014-06-16 22:59:18 +00:00
parent 4099be8dca
commit a026dc3fcb
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=267558
1 changed files with 18 additions and 2 deletions
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20
sys/amd64/vmm/intel/vmx.c
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@ -1258,12 +1258,28 @@ vmx_inject_interrupts(struct vmx *vmx, int vcpu, struct vlapic *vlapic)
/* Ask the local apic for a vector to inject */
if (!vlapic_pending_intr(vlapic, &vector))
return;
/*
* From the Intel SDM, Volume 3, Section "Maskable
* Hardware Interrupts":
* - maskable interrupt vectors [16,255] can be delivered
* through the local APIC.
*/
KASSERT(vector >= 16 && vector <= 255,
("invalid vector %d from local APIC", vector));
} else {
/* Ask the legacy pic for a vector to inject */
vatpic_pending_intr(vmx->vm, &vector);
}
KASSERT(vector >= 32 && vector <= 255, ("invalid vector %d", vector));
/*
* From the Intel SDM, Volume 3, Section "Maskable
* Hardware Interrupts":
* - maskable interrupt vectors [0,255] can be delivered
* through the INTR pin.
*/
KASSERT(vector >= 0 && vector <= 255,
("invalid vector %d from INTR", vector));
}
/* Check RFLAGS.IF and the interruptibility state of the guest */
rflags = vmcs_read(VMCS_GUEST_RFLAGS);