ARM Coresight Trace Memory Controller (TMC):
o Split-out FDT attachment to a separate file; o Add ACPI attachment. Sponsored by: DARPA, AFRL
This commit is contained in:
parent
b622dc25cf
commit
a132ec9f8a
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=362099
@ -42,9 +42,6 @@ __FBSDID("$FreeBSD$");
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#include <arm64/coresight/coresight.h>
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#include <arm64/coresight/coresight_tmc.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "coresight_if.h"
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#define TMC_DEBUG
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@ -56,25 +53,6 @@ __FBSDID("$FreeBSD$");
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#define dprintf(fmt, ...)
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#endif
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static struct ofw_compat_data compat_data[] = {
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{ "arm,coresight-tmc", 1 },
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{ NULL, 0 }
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};
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struct tmc_softc {
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struct resource *res;
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device_t dev;
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uint64_t cycle;
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struct coresight_platform_data *pdata;
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uint32_t dev_type;
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#define CORESIGHT_UNKNOWN 0
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#define CORESIGHT_ETR 1
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#define CORESIGHT_ETF 2
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uint32_t nev;
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struct coresight_event *event;
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boolean_t etf_configured;
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};
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static struct resource_spec tmc_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ -1, 0 }
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@ -334,21 +312,6 @@ tmc_read(device_t dev, struct endpoint *endp,
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return (0);
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}
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static int
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tmc_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Coresight Trace Memory Controller (TMC)");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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tmc_attach(device_t dev)
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{
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@ -375,7 +338,6 @@ tmc_attach(device_t dev)
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static device_method_t tmc_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, tmc_probe),
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DEVMETHOD(device_attach, tmc_attach),
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/* Coresight interface */
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@ -386,13 +348,4 @@ static device_method_t tmc_methods[] = {
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DEVMETHOD_END
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};
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static driver_t tmc_driver = {
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"tmc",
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tmc_methods,
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sizeof(struct tmc_softc),
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};
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static devclass_t tmc_devclass;
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DRIVER_MODULE(tmc, simplebus, tmc_driver, tmc_devclass, 0, 0);
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MODULE_VERSION(tmc, 1);
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DEFINE_CLASS_0(tmc, tmc_driver, tmc_methods, sizeof(struct tmc_softc));
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@ -116,4 +116,20 @@
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#define TMC_COMPID2 0xFF8 /* Component ID2 Register */
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#define TMC_COMPID3 0xFFC /* Component ID3 Register */
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DECLARE_CLASS(tmc_driver);
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struct tmc_softc {
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struct resource *res;
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device_t dev;
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uint64_t cycle;
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struct coresight_platform_data *pdata;
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uint32_t dev_type;
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#define CORESIGHT_UNKNOWN 0
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#define CORESIGHT_ETR 1
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#define CORESIGHT_ETF 2
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uint32_t nev;
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struct coresight_event *event;
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boolean_t etf_configured;
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};
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#endif /* !_ARM64_CORESIGHT_CORESIGHT_TMC_H_ */
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79
sys/arm64/coresight/coresight_tmc_acpi.c
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79
sys/arm64/coresight/coresight_tmc_acpi.c
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@ -0,0 +1,79 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2020 Ruslan Bukin <br@bsdpad.com>
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory (Department of Computer Science and
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* Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
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* DARPA SSITH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_acpi.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/memdesc.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <contrib/dev/acpica/include/acpi.h>
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#include <dev/acpica/acpivar.h>
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#include <arm64/coresight/coresight_tmc.h>
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static int
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tmc_acpi_probe(device_t dev)
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{
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static char *tmc_ids[] = { "ARMHC97C", NULL };
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int error;
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error = ACPI_ID_PROBE(device_get_parent(dev), dev, tmc_ids, NULL);
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if (error <= 0)
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device_set_desc(dev, "ARM Coresight TMC");
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return (error);
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}
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static device_method_t tmc_acpi_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, tmc_acpi_probe),
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/* End */
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DEVMETHOD_END
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};
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DEFINE_CLASS_1(tmc, tmc_acpi_driver, tmc_acpi_methods,
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sizeof(struct tmc_softc), tmc_driver);
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static devclass_t tmc_acpi_devclass;
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EARLY_DRIVER_MODULE(tmc, acpi, tmc_acpi_driver, tmc_acpi_devclass,
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0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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82
sys/arm64/coresight/coresight_tmc_fdt.c
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82
sys/arm64/coresight/coresight_tmc_fdt.c
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@ -0,0 +1,82 @@
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/*-
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* Copyright (c) 2018-2020 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by BAE Systems, the University of Cambridge
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* Computer Laboratory, and Memorial University under DARPA/AFRL contract
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* FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
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* (TC) research program.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm64/coresight/coresight.h>
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#include <arm64/coresight/coresight_tmc.h>
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#include "coresight_if.h"
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static struct ofw_compat_data compat_data[] = {
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{ "arm,coresight-tmc", 1 },
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{ NULL, 0 }
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};
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static int
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tmc_fdt_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "ARM Coresight TMC");
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return (BUS_PROBE_DEFAULT);
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}
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static device_method_t tmc_fdt_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, tmc_fdt_probe),
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DEVMETHOD_END
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};
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DEFINE_CLASS_1(tmc, tmc_fdt_driver, tmc_fdt_methods,
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sizeof(struct tmc_softc), tmc_driver);
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static devclass_t tmc_fdt_devclass;
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EARLY_DRIVER_MODULE(tmc, simplebus, tmc_fdt_driver, tmc_fdt_devclass,
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0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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@ -197,6 +197,8 @@ arm64/coresight/coresight_funnel.c standard
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arm64/coresight/coresight_funnel_acpi.c optional acpi
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arm64/coresight/coresight_funnel_fdt.c optional fdt
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arm64/coresight/coresight_tmc.c standard
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arm64/coresight/coresight_tmc_acpi.c optional acpi
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arm64/coresight/coresight_tmc_fdt.c optional fdt
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arm64/intel/firmware.c optional soc_intel_stratix10
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arm64/intel/stratix10-soc-fpga-mgr.c optional soc_intel_stratix10
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arm64/intel/stratix10-svc.c optional soc_intel_stratix10
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