Set the 'FR' bit in the status register for N32 kernels.
This permits N32 hard-float binaries to use 64-bit floating point registers (which is what N32 binaries expect) matching the N64 ABI. Reviewed by: imp, jmallett Sponsored by: DARPA / AFRL Differential Revision: https://reviews.freebsd.org/D13830
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=327790
@ -1110,7 +1110,7 @@ NESTED(MipsFPTrap, CALLFRAME_SIZ, ra)
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REG_S ra, CALLFRAME_RA(sp)
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.mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
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#if defined(__mips_n64)
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#if defined(__mips_n32) || defined(__mips_n64)
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or t1, t0, MIPS_SR_COP_1_BIT | MIPS_SR_FR
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#else
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or t1, t0, MIPS_SR_COP_1_BIT
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@ -117,8 +117,11 @@ VECTOR(_locore, unknown)
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* Enable FPU
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*/
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li t1, MIPS_SR_COP_1_BIT
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#if defined(__mips_n32) || defined(__mips_n64)
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or t1, MIPS_SR_FR
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#endif
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#ifdef __mips_n64
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or t1, MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS_SR_FR
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or t1, MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX
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#endif
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#endif
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/*
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@ -416,7 +416,7 @@ LEAF(MipsSwitchFPState)
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.set hardfloat
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mfc0 t1, MIPS_COP_0_STATUS # Save old SR
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HAZARD_DELAY
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#if defined(__mips_n64)
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#if defined(__mips_n32) || defined(__mips_n64)
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or t0, t1, MIPS_SR_COP_1_BIT | MIPS_SR_FR # enable the coprocessor
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#else
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or t0, t1, MIPS_SR_COP_1_BIT # enable the coprocessor
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@ -546,7 +546,7 @@ LEAF(MipsFPID)
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.set hardfloat
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mfc0 t1, MIPS_COP_0_STATUS # Save the status register.
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HAZARD_DELAY
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#if defined(__mips_n64)
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#if defined(__mips_n32) || defined(__mips_n64)
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or t0, t1, MIPS_SR_COP_1_BIT | MIPS_SR_FR
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#else
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or t0, t1, MIPS_SR_COP_1_BIT
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@ -585,7 +585,7 @@ LEAF(MipsSaveCurFPState)
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PTR_L a0, TD_PCB(a0) # get pointer to pcb for thread
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mfc0 t1, MIPS_COP_0_STATUS # Disable interrupts and
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HAZARD_DELAY
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#if defined(__mips_n64)
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#if defined(__mips_n32) || defined(__mips_n64)
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or t0, t1, MIPS_SR_COP_1_BIT | MIPS_SR_FR # enable the coprocessor
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#else
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or t0, t1, MIPS_SR_COP_1_BIT # enable the coprocessor
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@ -983,7 +983,7 @@ trap(struct trapframe *trapframe)
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addr = trapframe->pc;
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MipsSwitchFPState(PCPU_GET(fpcurthread), td->td_frame);
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PCPU_SET(fpcurthread, td);
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#if defined(__mips_n64)
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#if defined(__mips_n32) || defined(__mips_n64)
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td->td_frame->sr |= MIPS_SR_COP_1_BIT | MIPS_SR_FR;
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#else
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td->td_frame->sr |= MIPS_SR_COP_1_BIT;
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