AR933x CPU device improvements:
* Add baud rate and divisor programming code. See below for more information. * Flesh out ar933x_init() to disable interrupts and program the initial console setup. * Remove #if 0'ed code from ar933x_term(). * Explain what these functions do. Now, the baud rate and divisor code comes from Linux, as a submission to the OpenWRT project and Linux kernel from Gabor Juhos <juhosg@openwrt.org>. The original ticket for this code is https://dev.openwrt.org/ticket/12031 . I've contacted Gabor and asked for his permission to also licence the patch in question (which covers this code) to BSD lience and he's agreed. Hence why I'm including it here in FreeBSD. Tested: * AP121 (AR9330)
This commit is contained in:
Adrian Chadd
parent
8eeea2945d
commit
a296efdeeb
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=248927
@ -147,45 +147,94 @@ ar933x_flush(struct uart_bas *bas, int what)
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}
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#endif
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#if 0
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/*
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* Calculate the baud from the given chip configuration parameters.
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*/
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static unsigned long
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ar933x_uart_get_baud(unsigned int clk, unsigned int scale,
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unsigned int step)
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{
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uint64_t t;
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uint32_t div;
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div = (2 << 16) * (scale + 1);
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t = clk;
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t *= step;
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t += (div / 2);
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t = t / div;
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return (t);
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}
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/*
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* Calculate the scale/step with the lowest possible deviation from
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* the target baudrate.
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*/
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static void
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ar933x_uart_get_scale_step(struct uart_bas *bas, unsigned int baud,
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unsigned int *scale, unsigned int *step)
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{
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unsigned int tscale;
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uint32_t clk;
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long min_diff;
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clk = bas->rclk;
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*scale = 0;
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*step = 0;
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min_diff = baud;
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for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
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uint64_t tstep;
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int diff;
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tstep = baud * (tscale + 1);
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tstep *= (2 << 16);
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tstep = tstep / clk;
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if (tstep > AR933X_UART_MAX_STEP)
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break;
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diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
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if (diff < min_diff) {
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min_diff = diff;
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*scale = tscale;
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*step = tstep;
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}
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}
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}
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static int
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ar933x_param(struct uart_bas *bas, int baudrate, int databits, int stopbits,
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int parity)
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{
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int divisor;
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uint8_t lcr;
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/* UART always 8 bits */
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lcr = 0;
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if (databits >= 8)
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lcr |= LCR_8BITS;
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else if (databits == 7)
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lcr |= LCR_7BITS;
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else if (databits == 6)
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lcr |= LCR_6BITS;
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else
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lcr |= LCR_5BITS;
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if (stopbits > 1)
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lcr |= LCR_STOPB;
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lcr |= parity << 3;
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/* UART always 1 stop bit */
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/* Set baudrate. */
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/* UART parity is controllable by bits 0:1, ignore for now */
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/* Set baudrate if required. */
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if (baudrate > 0) {
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divisor = ar933x_divisor(bas->rclk, baudrate);
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if (divisor == 0)
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return (EINVAL);
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uart_setreg(bas, REG_LCR, lcr | LCR_DLAB);
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uart_barrier(bas);
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uart_setreg(bas, REG_DLL, divisor & 0xff);
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uart_setreg(bas, REG_DLH, (divisor >> 8) & 0xff);
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uart_barrier(bas);
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uint32_t clock_scale, clock_step;
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/* Find the best fit for the given baud rate */
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ar933x_uart_get_scale_step(bas, baudrate, &clock_scale,
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&clock_step);
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/*
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* Program the clock register in its entirety - no need
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* for Read-Modify-Write.
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*/
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ar933x_setreg(bas, AR933X_UART_CLOCK_REG,
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((clock_scale & AR933X_UART_CLOCK_SCALE_M)
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<< AR933X_UART_CLOCK_SCALE_S) |
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(clock_step & AR933X_UART_CLOCK_STEP_M));
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}
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/* Set LCR and clear DLAB. */
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uart_setreg(bas, REG_LCR, lcr);
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uart_barrier(bas);
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return (0);
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}
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#endif
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/*
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* Low-level UART interface.
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@ -209,23 +258,8 @@ static struct uart_ops uart_ar933x_ops = {
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static int
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ar933x_probe(struct uart_bas *bas)
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{
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#if 0
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u_char val;
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/* Check known 0 bits that don't depend on DLAB. */
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val = uart_getreg(bas, REG_IIR);
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if (val & 0x30)
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return (ENXIO);
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/*
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* Bit 6 of the MCR (= 0x40) appears to be 1 for the Sun1699
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* chip, but otherwise doesn't seem to have a function. In
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* other words, uart(4) works regardless. Ignore that bit so
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* the probe succeeds.
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*/
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val = uart_getreg(bas, REG_MCR);
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if (val & 0xa0)
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return (ENXIO);
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#endif
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/* We always know this will be here */
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return (0);
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}
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@ -233,43 +267,34 @@ static void
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ar933x_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
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int parity)
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{
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#if 0
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u_char ier;
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uint32_t reg;
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if (bas->rclk == 0)
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bas->rclk = DEFAULT_RCLK;
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/* Setup default parameters */
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ar933x_param(bas, baudrate, databits, stopbits, parity);
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/* Disable all interrupt sources. */
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/*
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* We use 0xe0 instead of 0xf0 as the mask because the XScale PXA
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* UARTs split the receive time-out interrupt bit out separately as
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* 0x10. This gets handled by ier_mask and ier_rxbits below.
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*/
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ier = uart_getreg(bas, REG_IER) & 0xe0;
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uart_setreg(bas, REG_IER, ier);
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/* XXX Force enable UART in case it was disabled */
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/* Disable all interrupts */
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ar933x_setreg(bas, AR933X_UART_INT_EN_REG, 0x00000000);
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/* Disable the host interrupt */
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reg = ar933x_getreg(bas, AR933X_UART_CS_REG);
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reg &= ~AR933X_UART_CS_HOST_INT_EN;
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ar933x_setreg(bas, AR933X_UART_CS_REG, reg);
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uart_barrier(bas);
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/* Disable the FIFO (if present). */
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uart_setreg(bas, REG_FCR, 0);
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uart_barrier(bas);
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/* Set RTS & DTR. */
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uart_setreg(bas, REG_MCR, MCR_IE | MCR_RTS | MCR_DTR);
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uart_barrier(bas);
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ar933x_clrint(bas);
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#endif
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/* XXX Set RTS/DTR? */
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}
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/*
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* Detach from console.
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*/
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static void
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ar933x_term(struct uart_bas *bas)
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{
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#if 0
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/* Clear RTS & DTR. */
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uart_setreg(bas, REG_MCR, MCR_IE);
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uart_barrier(bas);
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#endif
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/* XXX TODO */
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}
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static void
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