Update the debug monitor handling to work after userspace has started
The debug monitor register state is now stored in a struct and updated when required. Currently there is only a kernel state, however a per-process state will be added in a future change. Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D22128
This commit is contained in:
Andrew Turner
parent
acd6f4bee7
commit
a5d295e2a7
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=354175
@ -34,6 +34,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/proc.h>
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#include <sys/kdb.h>
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#include <machine/pcb.h>
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#include <ddb/ddb.h>
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#include <ddb/db_sym.h>
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@ -53,15 +54,14 @@ int
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db_md_clr_watchpoint(db_expr_t addr, db_expr_t size)
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{
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return (dbg_remove_watchpoint(addr, size, DBG_FROM_EL1));
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return (dbg_remove_watchpoint(NULL, addr, size));
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}
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int
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db_md_set_watchpoint(db_expr_t addr, db_expr_t size)
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{
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return (dbg_setup_watchpoint(addr, size, DBG_FROM_EL1,
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HW_BREAKPOINT_RW));
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return (dbg_setup_watchpoint(NULL, addr, size, HW_BREAKPOINT_RW));
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}
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static void
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@ -43,8 +43,10 @@ __FBSDID("$FreeBSD$");
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#include <machine/debug_monitor.h>
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#include <machine/kdb.h>
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#ifdef DDB
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#include <ddb/ddb.h>
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#include <ddb/db_sym.h>
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#endif
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enum dbg_t {
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DBG_TYPE_BREAKPOINT = 0,
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@ -53,8 +55,9 @@ enum dbg_t {
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static int dbg_watchpoint_num;
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static int dbg_breakpoint_num;
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static int dbg_ref_count_mde[MAXCPU];
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static int dbg_ref_count_kde[MAXCPU];
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static struct debug_monitor_state kernel_monitor = {
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.dbg_flags = DBGMON_KERNEL
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};
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/* Watchpoints/breakpoints control register bitfields */
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#define DBG_WATCH_CTRL_LEN_1 (0x1 << 5)
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@ -138,6 +141,7 @@ static int dbg_ref_count_kde[MAXCPU];
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WRITE_WB_REG_CASE(reg, 14, offset, val); \
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WRITE_WB_REG_CASE(reg, 15, offset, val)
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#ifdef DDB
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static uint64_t
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dbg_wb_read_reg(int reg, int n)
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{
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@ -149,11 +153,12 @@ dbg_wb_read_reg(int reg, int n)
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SWITCH_CASES_READ_WB_REG(DBG_WB_BVR, DBG_REG_BASE_BVR, val);
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SWITCH_CASES_READ_WB_REG(DBG_WB_BCR, DBG_REG_BASE_BCR, val);
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default:
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db_printf("trying to read from wrong debug register %d\n", n);
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printf("trying to read from wrong debug register %d\n", n);
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}
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return val;
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}
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#endif /* DDB */
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static void
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dbg_wb_write_reg(int reg, int n, uint64_t val)
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@ -164,17 +169,19 @@ dbg_wb_write_reg(int reg, int n, uint64_t val)
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SWITCH_CASES_WRITE_WB_REG(DBG_WB_BVR, DBG_REG_BASE_BVR, val);
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SWITCH_CASES_WRITE_WB_REG(DBG_WB_BCR, DBG_REG_BASE_BCR, val);
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default:
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db_printf("trying to write to wrong debug register %d\n", n);
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printf("trying to write to wrong debug register %d\n", n);
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return;
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}
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isb();
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}
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#ifdef DDB
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void
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kdb_cpu_set_singlestep(void)
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{
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kdb_frame->tf_spsr |= DBG_SPSR_SS;
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WRITE_SPECIALREG(MDSCR_EL1, READ_SPECIALREG(MDSCR_EL1) |
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WRITE_SPECIALREG(mdscr_el1, READ_SPECIALREG(mdscr_el1) |
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DBG_MDSCR_SS | DBG_MDSCR_KDE);
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/*
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@ -182,9 +189,9 @@ kdb_cpu_set_singlestep(void)
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* over watched instruction will trigger break exception instead of
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* single-step exception and locks CPU on that instruction for ever.
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*/
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if (dbg_ref_count_mde[PCPU_GET(cpuid)] > 0) {
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WRITE_SPECIALREG(MDSCR_EL1,
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READ_SPECIALREG(MDSCR_EL1) & ~DBG_MDSCR_MDE);
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if ((kernel_monitor.dbg_flags & DBGMON_ENABLED) != 0) {
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WRITE_SPECIALREG(mdscr_el1,
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READ_SPECIALREG(mdscr_el1) & ~DBG_MDSCR_MDE);
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}
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}
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@ -192,18 +199,18 @@ void
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kdb_cpu_clear_singlestep(void)
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{
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WRITE_SPECIALREG(MDSCR_EL1, READ_SPECIALREG(MDSCR_EL1) &
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WRITE_SPECIALREG(mdscr_el1, READ_SPECIALREG(mdscr_el1) &
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~(DBG_MDSCR_SS | DBG_MDSCR_KDE));
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/* Restore breakpoints and watchpoints */
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if (dbg_ref_count_mde[PCPU_GET(cpuid)] > 0) {
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WRITE_SPECIALREG(MDSCR_EL1,
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READ_SPECIALREG(MDSCR_EL1) | DBG_MDSCR_MDE);
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}
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if ((kernel_monitor.dbg_flags & DBGMON_ENABLED) != 0) {
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WRITE_SPECIALREG(mdscr_el1,
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READ_SPECIALREG(mdscr_el1) | DBG_MDSCR_MDE);
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if (dbg_ref_count_kde[PCPU_GET(cpuid)] > 0) {
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WRITE_SPECIALREG(MDSCR_EL1,
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READ_SPECIALREG(MDSCR_EL1) | DBG_MDSCR_KDE);
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if ((kernel_monitor.dbg_flags & DBGMON_KERNEL) != 0) {
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WRITE_SPECIALREG(mdscr_el1,
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READ_SPECIALREG(mdscr_el1) | DBG_MDSCR_KDE);
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}
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}
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}
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@ -267,30 +274,30 @@ dbg_show_watchpoint(void)
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}
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}
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}
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#endif /* DDB */
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static int
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dbg_find_free_slot(enum dbg_t type)
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dbg_find_free_slot(struct debug_monitor_state *monitor, enum dbg_t type)
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{
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u_int max, reg, i;
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uint64_t *reg;
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u_int max, i;
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switch(type) {
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case DBG_TYPE_BREAKPOINT:
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max = dbg_breakpoint_num;
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reg = DBG_REG_BASE_BCR;
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reg = monitor->dbg_bcr;
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break;
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case DBG_TYPE_WATCHPOINT:
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max = dbg_watchpoint_num;
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reg = DBG_REG_BASE_WCR;
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reg = monitor->dbg_wcr;
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break;
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default:
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db_printf("Unsupported debug type\n");
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printf("Unsupported debug type\n");
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return (i);
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}
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for (i = 0; i < max; i++) {
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if ((dbg_wb_read_reg(reg, i) & DBG_WB_CTRL_E) == 0)
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if ((reg[i] & DBG_WB_CTRL_E) == 0)
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return (i);
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}
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@ -298,81 +305,50 @@ dbg_find_free_slot(enum dbg_t type)
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}
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static int
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dbg_find_slot(enum dbg_t type, db_expr_t addr)
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dbg_find_slot(struct debug_monitor_state *monitor, enum dbg_t type,
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vm_offset_t addr)
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{
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u_int max, reg_addr, reg_ctrl, i;
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uint64_t *reg_addr, *reg_ctrl;
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u_int max, i;
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switch(type) {
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case DBG_TYPE_BREAKPOINT:
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max = dbg_breakpoint_num;
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reg_addr = DBG_REG_BASE_BVR;
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reg_ctrl = DBG_REG_BASE_BCR;
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reg_addr = monitor->dbg_bvr;
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reg_ctrl = monitor->dbg_bcr;
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break;
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case DBG_TYPE_WATCHPOINT:
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max = dbg_watchpoint_num;
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reg_addr = DBG_REG_BASE_WVR;
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reg_ctrl = DBG_REG_BASE_WCR;
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reg_addr = monitor->dbg_wvr;
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reg_ctrl = monitor->dbg_wcr;
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break;
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default:
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db_printf("Unsupported debug type\n");
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printf("Unsupported debug type\n");
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return (i);
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}
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for (i = 0; i < max; i++) {
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if ((dbg_wb_read_reg(reg_addr, i) == addr) &&
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((dbg_wb_read_reg(reg_ctrl, i) & DBG_WB_CTRL_E) != 0))
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if (reg_addr[i] == addr &&
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(reg_ctrl[i] & DBG_WB_CTRL_E) != 0)
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return (i);
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}
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return (-1);
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}
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static void
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dbg_enable_monitor(enum dbg_el_t el)
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{
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uint64_t reg_mdcr = 0;
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/*
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* There is no need to have debug monitor on permanently, thus we are
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* refcounting and turn it on only if any of CPU is going to use that.
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*/
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if (atomic_fetchadd_int(&dbg_ref_count_mde[PCPU_GET(cpuid)], 1) == 0)
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reg_mdcr = DBG_MDSCR_MDE;
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if ((el == DBG_FROM_EL1) &&
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atomic_fetchadd_int(&dbg_ref_count_kde[PCPU_GET(cpuid)], 1) == 0)
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reg_mdcr |= DBG_MDSCR_KDE;
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if (reg_mdcr)
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WRITE_SPECIALREG(MDSCR_EL1, READ_SPECIALREG(MDSCR_EL1) | reg_mdcr);
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}
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static void
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dbg_disable_monitor(enum dbg_el_t el)
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{
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uint64_t reg_mdcr = 0;
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if (atomic_fetchadd_int(&dbg_ref_count_mde[PCPU_GET(cpuid)], -1) == 1)
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reg_mdcr = DBG_MDSCR_MDE;
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if ((el == DBG_FROM_EL1) &&
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atomic_fetchadd_int(&dbg_ref_count_kde[PCPU_GET(cpuid)], -1) == 1)
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reg_mdcr |= DBG_MDSCR_KDE;
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if (reg_mdcr)
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WRITE_SPECIALREG(MDSCR_EL1, READ_SPECIALREG(MDSCR_EL1) & ~reg_mdcr);
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}
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int
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dbg_setup_watchpoint(db_expr_t addr, db_expr_t size, enum dbg_el_t el,
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enum dbg_access_t access)
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dbg_setup_watchpoint(struct debug_monitor_state *monitor, vm_offset_t addr,
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vm_size_t size, enum dbg_access_t access)
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{
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uint64_t wcr_size, wcr_priv, wcr_access;
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u_int i;
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i = dbg_find_free_slot(DBG_TYPE_WATCHPOINT);
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if (monitor == NULL)
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monitor = &kernel_monitor;
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i = dbg_find_free_slot(monitor, DBG_TYPE_WATCHPOINT);
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if (i == -1) {
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db_printf("Can not find slot for watchpoint, max %d"
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printf("Can not find slot for watchpoint, max %d"
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" watchpoints supported\n", dbg_watchpoint_num);
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return (i);
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}
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@ -391,21 +367,14 @@ dbg_setup_watchpoint(db_expr_t addr, db_expr_t size, enum dbg_el_t el,
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wcr_size = DBG_WATCH_CTRL_LEN_8;
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break;
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default:
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db_printf("Unsupported address size for watchpoint\n");
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printf("Unsupported address size for watchpoint\n");
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return (-1);
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}
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switch(el) {
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case DBG_FROM_EL0:
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if ((monitor->dbg_flags & DBGMON_KERNEL) == 0)
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wcr_priv = DBG_WB_CTRL_EL0;
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break;
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case DBG_FROM_EL1:
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else
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wcr_priv = DBG_WB_CTRL_EL1;
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break;
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default:
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db_printf("Unsupported exception level for watchpoint\n");
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return (-1);
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}
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switch(access) {
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case HW_BREAKPOINT_X:
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@ -421,33 +390,78 @@ dbg_setup_watchpoint(db_expr_t addr, db_expr_t size, enum dbg_el_t el,
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wcr_access = DBG_WATCH_CTRL_LOAD | DBG_WATCH_CTRL_STORE;
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break;
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default:
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db_printf("Unsupported exception level for watchpoint\n");
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printf("Unsupported exception level for watchpoint\n");
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return (-1);
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}
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dbg_wb_write_reg(DBG_REG_BASE_WVR, i, addr);
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dbg_wb_write_reg(DBG_REG_BASE_WCR, i, wcr_size | wcr_access | wcr_priv |
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DBG_WB_CTRL_E);
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dbg_enable_monitor(el);
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monitor->dbg_wvr[i] = addr;
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monitor->dbg_wcr[i] = wcr_size | wcr_access | wcr_priv | DBG_WB_CTRL_E;
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monitor->dbg_enable_count++;
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monitor->dbg_flags |= DBGMON_ENABLED;
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dbg_register_sync(monitor);
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return (0);
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}
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int
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dbg_remove_watchpoint(db_expr_t addr, db_expr_t size, enum dbg_el_t el)
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dbg_remove_watchpoint(struct debug_monitor_state *monitor, vm_offset_t addr,
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vm_size_t size)
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{
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u_int i;
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i = dbg_find_slot(DBG_TYPE_WATCHPOINT, addr);
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if (monitor == NULL)
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monitor = &kernel_monitor;
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i = dbg_find_slot(monitor, DBG_TYPE_WATCHPOINT, addr);
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if (i == -1) {
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db_printf("Can not find watchpoint for address 0%lx\n", addr);
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printf("Can not find watchpoint for address 0%lx\n", addr);
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return (i);
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}
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dbg_wb_write_reg(DBG_REG_BASE_WCR, i, 0);
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dbg_disable_monitor(el);
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monitor->dbg_wvr[i] = 0;
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monitor->dbg_wcr[i] = 0;
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monitor->dbg_enable_count--;
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if (monitor->dbg_enable_count == 0)
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monitor->dbg_flags &= ~DBGMON_ENABLED;
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dbg_register_sync(monitor);
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return (0);
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}
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void
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dbg_register_sync(struct debug_monitor_state *monitor)
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{
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uint64_t mdscr;
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int i;
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if (monitor == NULL)
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monitor = &kernel_monitor;
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mdscr = READ_SPECIALREG(mdscr_el1);
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if ((monitor->dbg_flags & DBGMON_ENABLED) == 0) {
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mdscr &= ~(DBG_MDSCR_MDE | DBG_MDSCR_KDE);
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} else {
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for (i = 0; i < dbg_breakpoint_num; i++) {
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dbg_wb_write_reg(DBG_REG_BASE_BCR, i,
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monitor->dbg_bcr[i]);
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dbg_wb_write_reg(DBG_REG_BASE_BVR, i,
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monitor->dbg_bvr[i]);
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}
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for (i = 0; i < dbg_watchpoint_num; i++) {
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dbg_wb_write_reg(DBG_REG_BASE_WCR, i,
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monitor->dbg_wcr[i]);
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dbg_wb_write_reg(DBG_REG_BASE_WVR, i,
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monitor->dbg_wvr[i]);
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}
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mdscr |= DBG_MDSCR_MDE;
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if ((monitor->dbg_flags & DBGMON_KERNEL) == DBGMON_KERNEL)
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mdscr |= DBG_MDSCR_KDE;
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}
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WRITE_SPECIALREG(mdscr_el1, mdscr);
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isb();
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}
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void
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dbg_monitor_init(void)
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{
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@ -471,12 +485,12 @@ dbg_monitor_init(void)
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*
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* Reset all breakpoints and watchpoints.
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*/
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for (i = 0; i < dbg_watchpoint_num; ++i) {
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for (i = 0; i < dbg_watchpoint_num; i++) {
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dbg_wb_write_reg(DBG_REG_BASE_WCR, i, 0);
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dbg_wb_write_reg(DBG_REG_BASE_WVR, i, 0);
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}
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for (i = 0; i < dbg_breakpoint_num; ++i) {
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for (i = 0; i < dbg_breakpoint_num; i++) {
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dbg_wb_write_reg(DBG_REG_BASE_BCR, i, 0);
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dbg_wb_write_reg(DBG_REG_BASE_BVR, i, 0);
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}
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@ -74,15 +74,17 @@ __FBSDID("$FreeBSD$");
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blr x1
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1:
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.endif
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msr daifclr, #8 /* Enable the debug exception */
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.endm
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.macro restore_registers el
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.if \el == 1
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msr daifset, #2
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/*
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* Disable interrupts, x18 may change in the interrupt exception
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* handler. For EL0 exceptions, do_ast already did this.
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* Disable interrupts and debug exceptions, x18 may change in the
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* interrupt exception handler. For EL0 exceptions, do_ast already
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* did this.
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*/
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msr daifset, #10
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.endif
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.if \el == 0
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/* Remove the SSBD (CVE-2018-3639) workaround if needed */
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@ -136,7 +138,7 @@ __FBSDID("$FreeBSD$");
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bic x19, x19, #PSR_I
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1:
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/* Disable interrupts */
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msr daifset, #2
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msr daifset, #10
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/* Read the current thread flags */
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ldr x1, [x18, #PC_CURTHREAD] /* Load curthread */
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@ -29,6 +29,7 @@
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*/
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|
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#include "opt_acpi.h"
|
||||
#include "opt_ddb.h"
|
||||
#include "opt_kstack_pages.h"
|
||||
#include "opt_platform.h"
|
||||
|
||||
@ -55,6 +56,7 @@ __FBSDID("$FreeBSD$");
|
||||
#include <vm/vm_kern.h>
|
||||
|
||||
#include <machine/machdep.h>
|
||||
#include <machine/debug_monitor.h>
|
||||
#include <machine/intr.h>
|
||||
#include <machine/smp.h>
|
||||
#ifdef VFP
|
||||
@ -353,6 +355,10 @@ ipi_stop(void *dummy __unused)
|
||||
while (!CPU_ISSET(cpu, &started_cpus))
|
||||
cpu_spinwait();
|
||||
|
||||
#ifdef DDB
|
||||
dbg_register_sync(NULL);
|
||||
#endif
|
||||
|
||||
CPU_CLR_ATOMIC(cpu, &started_cpus);
|
||||
CPU_CLR_ATOMIC(cpu, &stopped_cpus);
|
||||
CTR0(KTR_SMP, "IPI_STOP (restart)");
|
||||
|
||||
@ -32,13 +32,20 @@
|
||||
#ifndef _MACHINE_DEBUG_MONITOR_H_
|
||||
#define _MACHINE_DEBUG_MONITOR_H_
|
||||
|
||||
#ifdef DDB
|
||||
#ifdef _KERNEL
|
||||
|
||||
#include <machine/db_machdep.h>
|
||||
#define DBG_BRP_MAX 16
|
||||
#define DBG_WRP_MAX 16
|
||||
|
||||
enum dbg_el_t {
|
||||
DBG_FROM_EL0 = 0,
|
||||
DBG_FROM_EL1 = 1,
|
||||
struct debug_monitor_state {
|
||||
uint32_t dbg_enable_count;
|
||||
uint32_t dbg_flags;
|
||||
#define DBGMON_ENABLED (1 << 0)
|
||||
#define DBGMON_KERNEL (1 << 1)
|
||||
uint64_t dbg_bcr[DBG_BRP_MAX];
|
||||
uint64_t dbg_bvr[DBG_BRP_MAX];
|
||||
uint64_t dbg_wcr[DBG_WRP_MAX];
|
||||
uint64_t dbg_wvr[DBG_WRP_MAX];
|
||||
};
|
||||
|
||||
enum dbg_access_t {
|
||||
@ -49,15 +56,15 @@ enum dbg_access_t {
|
||||
};
|
||||
|
||||
void dbg_monitor_init(void);
|
||||
void dbg_register_sync(struct debug_monitor_state *);
|
||||
int dbg_setup_watchpoint(struct debug_monitor_state *, vm_offset_t, vm_size_t,
|
||||
enum dbg_access_t);
|
||||
int dbg_remove_watchpoint(struct debug_monitor_state *, vm_offset_t, vm_size_t);
|
||||
|
||||
#ifdef DDB
|
||||
void dbg_show_watchpoint(void);
|
||||
int dbg_setup_watchpoint(db_expr_t addr, db_expr_t size, enum dbg_el_t el,
|
||||
enum dbg_access_t access);
|
||||
int dbg_remove_watchpoint(db_expr_t addr, db_expr_t size, enum dbg_el_t el);
|
||||
#else
|
||||
static __inline void
|
||||
dbg_monitor_init(void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _KERNEL */
|
||||
|
||||
#endif /* _MACHINE_DEBUG_MONITOR_H_ */
|
||||
|
||||
@ -37,6 +37,7 @@
|
||||
|
||||
typedef int (*pcpu_bp_harden)(void);
|
||||
typedef int (*pcpu_ssbd)(int);
|
||||
struct debug_monitor_state;
|
||||
|
||||
#define PCPU_MD_FIELDS \
|
||||
u_int pc_acpi_id; /* ACPI CPU id */ \
|
||||
|
||||
@ -136,7 +136,7 @@ arm64/arm64/cpufunc_asm.S standard
|
||||
arm64/arm64/db_disasm.c optional ddb
|
||||
arm64/arm64/db_interface.c optional ddb
|
||||
arm64/arm64/db_trace.c optional ddb
|
||||
arm64/arm64/debug_monitor.c optional ddb
|
||||
arm64/arm64/debug_monitor.c standard
|
||||
arm64/arm64/disassem.c optional ddb
|
||||
arm64/arm64/dump_machdep.c standard
|
||||
arm64/arm64/efirt_machdep.c optional efirt
|
||||
|
||||
Loading…
Reference in New Issue
Block a user