bus_dma(9) cleanup.
o Enforce TX/RX descriptor ring alignment. NS data sheet says the controller needs 4 bytes alignment but use 16 to cover both SiS and NS controllers. I don't have SiS data sheet so I'm not sure what is alignment restriction of SiS controller but 16 would be enough because it's larger than the size of a TX/RX descriptor. Previously sis(4) ignored the alignment restriction. o Enforce RX buffer alignment, 4. Previously sis(4) ignored RX buffer alignment restriction. o Limit number of TX DMA segment to be used to 16. It seems controller has no restriction on number of DMA segments but using more than 16 looks resource waste. o Collapse long mbuf chains with m_collapse(9) instead of calling expensive m_defrag(9). o TX/RX side bus_dmamap_load_mbuf_sg(9) support and remove unnecessary callbacks. o Initial endianness support. o Prefer local alignment fixup code to m_devget(9). o Pre-allocate TX/RX mbuf DMA maps instead of creating/destroying these maps in fast TX/RX path. On non-x86 architectures, this is very expensive operation and there is no need to do that. o Add missing bus_dmamap_sync(9) in TX/RX path. o watchdog is now unarmed only when there are no pending frames on controller. Previously sis(4) blindly unarmed watchdog without checking the number of queued frames. o For efficiency, loaded DMA map is reused for error frames. o DMA map loading failure is now gracefully handled. Previously sis(4) ignored any DMA map loading errors. o Nuke unused macros which are not appropriate for endianness operation. o Stop embedding driver maintained structures into descriptor rings. Because TX/RX descriptor structures are shared between host and controller, frequent bus_dmamap_sync(9) operations are required in fast path. Embedding driver structures will increase the size of DMA map which in turn will slow down performance.
This commit is contained in:
parent
1d885b48c1
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=212109
File diff suppressed because it is too large
Load Diff
@ -304,25 +304,13 @@
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#define NS_FILTADDR_FMEM_HI 0x000003FE
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/*
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* DMA descriptor structures. The first part of the descriptor
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* is the hardware descriptor format, which is just three longwords.
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* After this, we include some additional structure members for
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* use by the driver. Note that for this structure will be a different
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* size on the alpha, but that's okay as long as it's a multiple of 4
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* bytes in size.
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* TX/RX DMA descriptor structures.
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*/
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struct sis_desc {
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/* SiS hardware descriptor section */
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u_int32_t sis_next;
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u_int32_t sis_cmdsts;
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#define sis_rxstat sis_cmdsts
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#define sis_txstat sis_cmdsts
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#define sis_ctl sis_cmdsts
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u_int32_t sis_ptr;
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/* Driver software section */
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struct mbuf *sis_mbuf;
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struct sis_desc *sis_nextdesc;
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bus_dmamap_t sis_map;
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};
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#define SIS_CMDSTS_BUFLEN 0x00000FFF
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@ -332,11 +320,6 @@ struct sis_desc {
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#define SIS_CMDSTS_MORE 0x40000000
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#define SIS_CMDSTS_OWN 0x80000000
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#define SIS_LASTDESC(x) (!((x)->sis_ctl & SIS_CMDSTS_MORE))
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#define SIS_OWNDESC(x) ((x)->sis_ctl & SIS_CMDSTS_OWN)
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#define SIS_INC(x, y) (x) = ((x) == ((y)-1)) ? 0 : (x)+1
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#define SIS_RXBYTES(x) (((x)->sis_ctl & SIS_CMDSTS_BUFLEN) - ETHER_CRC_LEN)
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#define SIS_RXSTAT_COLL 0x00010000
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#define SIS_RXSTAT_LOOPBK 0x00020000
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#define SIS_RXSTAT_ALIGNERR 0x00040000
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@ -367,12 +350,25 @@ struct sis_desc {
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#define SIS_TXSTAT_UNDERRUN 0x02000000
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#define SIS_TXSTAT_TX_ABORT 0x04000000
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#define SIS_DESC_ALIGN 16
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#define SIS_RX_BUF_ALIGN 4
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#define SIS_MAXTXSEGS 16
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#define SIS_RX_LIST_CNT 64
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#define SIS_TX_LIST_CNT 128
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#define SIS_RX_LIST_SZ SIS_RX_LIST_CNT * sizeof(struct sis_desc)
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#define SIS_TX_LIST_SZ SIS_TX_LIST_CNT * sizeof(struct sis_desc)
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#define SIS_ADDR_LO(x) ((uint64_t) (x) & 0xffffffff)
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#define SIS_ADDR_HI(x) ((uint64_t) (x) >> 32)
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#define SIS_RX_RING_ADDR(sc, i) \
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((sc)->sis_rx_paddr + sizeof(struct sis_desc) * (i))
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#define SIS_TX_RING_ADDR(sc, i) \
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((sc)->sis_tx_paddr + sizeof(struct sis_desc) * (i))
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#define SIS_INC(x, y) (x) = (x + 1) % (y)
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/*
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* SiS PCI vendor ID.
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*/
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@ -434,6 +430,17 @@ struct sis_mii_frame {
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#define SIS_TYPE_83815 3
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#define SIS_TYPE_83816 4
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struct sis_txdesc {
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struct mbuf *tx_m;
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bus_dmamap_t tx_dmamap;
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};
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struct sis_rxdesc {
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struct mbuf *rx_m;
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bus_dmamap_t rx_dmamap;
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struct sis_desc *rx_desc;
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};
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struct sis_softc {
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struct ifnet *sis_ifp; /* interface info */
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struct resource *sis_res[2];
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@ -446,18 +453,22 @@ struct sis_softc {
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u_int sis_srr;
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struct sis_desc *sis_rx_list;
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struct sis_desc *sis_tx_list;
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bus_dma_tag_t sis_rx_tag;
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bus_dmamap_t sis_rx_dmamap;
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bus_dma_tag_t sis_tx_tag;
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bus_dmamap_t sis_tx_dmamap;
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bus_dma_tag_t sis_rx_list_tag;
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bus_dmamap_t sis_rx_list_map;
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bus_dma_tag_t sis_tx_list_tag;
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bus_dmamap_t sis_tx_list_map;
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bus_dma_tag_t sis_parent_tag;
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bus_dma_tag_t sis_tag;
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struct sis_desc *sis_rx_pdsc;
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bus_dma_tag_t sis_rx_tag;
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bus_dmamap_t sis_rx_sparemap;
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bus_dma_tag_t sis_tx_tag;
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struct sis_rxdesc sis_rxdesc[SIS_RX_LIST_CNT];
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struct sis_txdesc sis_txdesc[SIS_TX_LIST_CNT];
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int sis_tx_prod;
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int sis_tx_cons;
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int sis_tx_cnt;
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u_int32_t sis_rx_paddr;
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u_int32_t sis_tx_paddr;
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int sis_rx_cons;;
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bus_addr_t sis_rx_paddr;
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bus_addr_t sis_tx_paddr;
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struct callout sis_stat_ch;
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int sis_watchdog_timer;
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int sis_stopped;
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