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Rename TARGET_XLR_XLS to CPU_RMI to match other CPU_xxx definitions.

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use CPU_RMI all XLR configurations. Update ident string for N32 and
N64 kernels.
This commit is contained in:
Jayachandran C. 2010-08-13 12:56:00 +00:00
parent 977fd9da57
commit a7834bac09
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=211280
10 changed files with 13 additions and 16 deletions
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2
sys/conf/options.mips
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@ -35,6 +35,7 @@ CPU_SENTRY5 opt_global.h
CPU_HAVEFPU opt_global.h
CPU_SB1 opt_global.h
CPU_CNMIPS opt_global.h
CPU_RMI opt_global.h
ISA_MIPS1 opt_cputype.h
ISA_MIPS3 opt_cputype.h
@ -51,7 +52,6 @@ CFE_ENV_SIZE opt_global.h
NOFPU opt_global.h
TARGET_EMULATOR opt_ddb.h
TARGET_XLR_XLS opt_global.h
TICK_USE_YAMON_FREQ opt_global.h
TICK_USE_MALTA_RTC opt_global.h

2
sys/mips/conf/XLR
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@ -46,7 +46,7 @@
# $FreeBSD$
machine mips
cpu CPU_MIPS4KC
cpu CPU_RMI
ident XLR
makeoptions MODULES_OVERRIDE=""

4
sys/mips/conf/XLR64
View File

@ -18,8 +18,8 @@
# $FreeBSD$
machine mips
cpu CPU_MIPS4KC
ident XLR
cpu CPU_RMI
ident XLR64
makeoptions MODULES_OVERRIDE=""
makeoptions TARGET_BIG_ENDIAN

4
sys/mips/conf/XLRN32
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@ -18,8 +18,8 @@
# $FreeBSD$
machine mips
cpu CPU_MIPS4KC
ident XLR
cpu CPU_RMI
ident XLRN32
makeoptions MODULES_OVERRIDE=""
makeoptions TARGET_BIG_ENDIAN

2
sys/mips/include/bus.h
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@ -721,7 +721,7 @@ void __bs_c(f,_bs_c_8) (void *t, bus_space_handle_t bsh1, \
DECLARE_BUS_SPACE_PROTOTYPES(generic);
extern bus_space_tag_t mips_bus_space_generic;
/* Special bus space for RMI processors */
#ifdef TARGET_XLR_XLS
#ifdef CPU_RMI
extern bus_space_tag_t rmi_bus_space;
extern bus_space_tag_t rmi_pci_bus_space;
#endif

2
sys/mips/include/intr_machdep.h
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@ -29,7 +29,7 @@
#ifndef _MACHINE_INTR_MACHDEP_H_
#define _MACHINE_INTR_MACHDEP_H_
#ifdef TARGET_XLR_XLS
#ifdef CPU_RMI
#define XLR_MAX_INTR 64
#else
#define NHARD_IRQS 6

6
sys/mips/mips/exception.S
View File

@ -243,7 +243,7 @@ SlowFault:
and a0, a0, a2 ; \
mtc0 a0, MIPS_COP_0_STATUS ; \
ITLBNOPFIX
#elif defined(TARGET_XLR_XLS)
#elif defined(CPU_RMI)
#define CLEAR_STATUS \
mfc0 a0, MIPS_COP_0_STATUS ;\
li a2, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT) ; \
@ -485,7 +485,7 @@ NNON_LEAF(MipsUserGenException, CALLFRAME_SIZ, ra)
and t0, a0, ~(MIPS_SR_COP_1_BIT | MIPS_SR_EXL | MIPS3_SR_KSU_MASK | MIPS_SR_INT_IE)
#if defined(CPU_CNMIPS)
or t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS_SR_PX)
#elif defined(TARGET_XLR_XLS)
#elif defined(CPU_RMI)
or t0, t0, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT)
#endif
mtc0 t0, MIPS_COP_0_STATUS
@ -703,7 +703,7 @@ NNON_LEAF(MipsUserIntr, CALLFRAME_SIZ, ra)
and t0, a0, ~(MIPS_SR_COP_1_BIT | MIPS_SR_EXL | MIPS_SR_INT_IE | MIPS3_SR_KSU_MASK)
#ifdef CPU_CNMIPS
or t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS_SR_PX)
#elif defined(TARGET_XLR_XLS)
#elif defined(CPU_RMI)
or t0, t0, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT)
#endif
mtc0 t0, MIPS_COP_0_STATUS

2
sys/mips/mips/locore.S
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@ -99,7 +99,7 @@ VECTOR(_locore, unknown)
/* Reset these bits */
li t0, ~(MIPS_SR_DE | MIPS_SR_SOFT_RESET | MIPS_SR_ERL | MIPS_SR_EXL | MIPS_SR_INT_IE)
#elif defined (TARGET_XLR_XLS)
#elif defined (CPU_RMI)
/* Set these bits */
li t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_KX | MIPS_SR_UX)

2
sys/mips/mips/machdep.c
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@ -334,7 +334,7 @@ mips_vector_init(void)
bcopy(MipsTLBMiss, (void *)MIPS_UTLB_MISS_EXC_VEC,
MipsTLBMissEnd - MipsTLBMiss);
#if defined(CPU_CNMIPS) || defined(TARGET_XLR_XLS)
#if defined(CPU_CNMIPS) || defined(CPU_RMI)
/* Fake, but sufficient, for the 32-bit with 64-bit hardware addresses */
bcopy(MipsTLBMiss, (void *)MIPS3_XTLB_MISS_EXC_VEC,
MipsTLBMissEnd - MipsTLBMiss);

3
sys/mips/rmi/std.xlr
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@ -4,7 +4,4 @@ files "../rmi/files.xlr"
#
# XXXMIPS: It's a stub, isn't it?
#
cpu CPU_MIPS4KC
option NOFPU
# Kludge for now
options TARGET_XLR_XLS