reenable the caches when a PCI peek faults. Takes my kernel compile
from 3770 real down to 1250 real. Submitted by: jake
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@ -90,6 +90,8 @@ ASSYM(FPRS_DU, FPRS_DU);
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ASSYM(FPRS_FEF, FPRS_FEF);
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ASSYM(LSU_VW, LSU_VW);
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ASSYM(LSU_IC, LSU_IC);
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ASSYM(LSU_DC, LSU_DC);
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ASSYM(TAR_VPN_SHIFT, TAR_VPN_SHIFT);
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@ -575,6 +575,10 @@ fas_nofault_end:
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.globl fas_fault
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ENTRY(fas_fault)
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ldxa [%g0] ASI_LSU_CTL_REG, %o0
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or %o0, LSU_IC | LSU_DC, %o0
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stxa %o0, [%g0] ASI_LSU_CTL_REG
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membar #Sync
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retl
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mov -1, %o0
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END(fas_fault)
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