Lock the scsi_low code and the drivers which use it along with other
related cleanups: - Require each driver to initalize a mutex in the scsi_low_softc that is shared with the scsi_low code. This mutex is used for CAM SIMs, timers, and interrupt handlers. - Replace the osdep function switch with direct calls to the relevant CAM functions and direct manipulation of timers via callout(9). - Collapse the CAM-specific scsi_low_osdep_interface substructure directly into scsi_low_softc. - Use bus_*() instead of bus_space_*(). - Return BUS_PROBE_DEFAULT from probe routines instead of 0. - No need to zero softcs. - Pass 0ul and ~0ul instead of 0 and ~0 to bus_alloc_resource(). - Spell "dettach" as "detach". - Remove unused 'dvname' variables. - De-spl(). Tested by: no one
This commit is contained in:
parent
87c4a62333
commit
a92cf726f8
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=274760
@ -150,6 +150,8 @@ int scsi_low_version_major = 2;
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int scsi_low_version_minor = 17;
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static struct scsi_low_softc_tab sl_tab = LIST_HEAD_INITIALIZER(sl_tab);
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static struct mtx sl_tab_lock;
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MTX_SYSINIT(sl_tab_lock, &sl_tab_lock, "scsi low table", MTX_DEF);
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/**************************************************************
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* Debug, Run test and Statics
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@ -365,20 +367,9 @@ static void scsi_low_poll_cam(struct cam_sim *);
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void scsi_low_scsi_action_cam(struct cam_sim *, union ccb *);
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static int scsi_low_attach_cam(struct scsi_low_softc *);
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static int scsi_low_world_start_cam(struct scsi_low_softc *);
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static int scsi_low_dettach_cam(struct scsi_low_softc *);
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static int scsi_low_detach_cam(struct scsi_low_softc *);
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static int scsi_low_ccb_setup_cam(struct scsi_low_softc *, struct slccb *);
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static int scsi_low_done_cam(struct scsi_low_softc *, struct slccb *);
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static void scsi_low_timeout_cam(struct scsi_low_softc *, int, int);
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struct scsi_low_osdep_funcs scsi_low_osdep_funcs_cam = {
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scsi_low_attach_cam,
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scsi_low_world_start_cam,
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scsi_low_dettach_cam,
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scsi_low_ccb_setup_cam,
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scsi_low_done_cam,
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scsi_low_timeout_cam
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};
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struct scsi_low_error_code scsi_low_error_code_cam[] = {
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{0, CAM_REQ_CMP},
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@ -409,12 +400,13 @@ scsi_low_poll_cam(sim)
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{
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struct scsi_low_softc *slp = SIM2SLP(sim);
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SCSI_LOW_ASSERT_LOCKED(slp);
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(*slp->sl_funcs->scsi_low_poll) (slp);
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if (slp->sl_si.si_poll_count ++ >=
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if (slp->sl_poll_count ++ >=
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SCSI_LOW_CAM_POLL_HZ / SCSI_LOW_TIMEOUT_HZ)
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{
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slp->sl_si.si_poll_count = 0;
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slp->sl_poll_count = 0;
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scsi_low_timeout_check(slp);
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}
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}
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@ -429,8 +421,9 @@ scsi_low_scsi_action_cam(sim, ccb)
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struct lun_info *li;
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struct slccb *cb;
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u_int lun, flags, msg, target;
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int s, rv;
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int rv;
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SCSI_LOW_ASSERT_LOCKED(slp);
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target = (u_int) (ccb->ccb_h.target_id);
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lun = (u_int) ccb->ccb_h.target_lun;
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@ -469,7 +462,6 @@ scsi_low_scsi_action_cam(sim, ccb)
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else
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flags = CCB_SCSIIO;
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s = splcam();
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li = scsi_low_alloc_li(ti, lun, 1);
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if (ti->ti_setup_msg != 0)
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@ -485,7 +477,6 @@ scsi_low_scsi_action_cam(sim, ccb)
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scsi_low_test_abort(slp, ti, li);
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}
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#endif /* SCSI_LOW_DEBUG */
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splx(s);
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break;
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case XPT_EN_LUN: /* Enable LUN as a target */
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@ -508,10 +499,8 @@ scsi_low_scsi_action_cam(sim, ccb)
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}
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#endif /* SCSI_LOW_DIAGNOSTIC */
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s = splcam();
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cb = scsi_low_find_ccb(slp, target, lun, ccb->cab.abort_ccb);
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rv = scsi_low_abort_ccb(slp, cb);
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splx(s);
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if (rv == 0)
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ccb->ccb_h.status = CAM_REQ_CMP;
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@ -540,7 +529,6 @@ scsi_low_scsi_action_cam(sim, ccb)
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if (lun == CAM_LUN_WILDCARD)
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lun = 0;
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s = splcam();
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scsi = &cts->proto_specific.scsi;
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spi = &cts->xport_specific.spi;
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if ((spi->valid & (CTS_SPI_VALID_BUS_WIDTH |
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@ -587,7 +575,6 @@ scsi_low_scsi_action_cam(sim, ccb)
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if ((slp->sl_show_result & SHOW_CALCF_RES) != 0)
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scsi_low_calcf_show(li);
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}
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splx(s);
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ccb->ccb_h.status = CAM_REQ_CMP;
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xpt_done(ccb);
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@ -612,7 +599,6 @@ scsi_low_scsi_action_cam(sim, ccb)
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if (lun == CAM_LUN_WILDCARD)
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lun = 0;
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s = splcam();
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li = scsi_low_alloc_li(ti, lun, 1);
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if (li != NULL && cts->type == CTS_TYPE_CURRENT_SETTINGS) {
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struct ccb_trans_settings_scsi *scsi =
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@ -658,7 +644,6 @@ scsi_low_scsi_action_cam(sim, ccb)
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} else
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ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
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settings_out:
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splx(s);
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xpt_done(ccb);
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break;
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}
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@ -670,9 +655,7 @@ scsi_low_scsi_action_cam(sim, ccb)
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}
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case XPT_RESET_BUS: /* Reset the specified SCSI bus */
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s = splcam();
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scsi_low_restart(slp, SCSI_LOW_RESTART_HARD, NULL);
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splx(s);
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ccb->ccb_h.status = CAM_REQ_CMP;
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xpt_done(ccb);
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break;
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@ -711,10 +694,8 @@ scsi_low_scsi_action_cam(sim, ccb)
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else
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flags = CCB_NORETRY | CCB_URGENT;
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s = splcam();
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li = scsi_low_alloc_li(ti, lun, 1);
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scsi_low_enqueue(slp, ti, li, cb, flags, msg);
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splx(s);
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break;
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case XPT_PATH_INQ: { /* Path routing inquiry */
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@ -774,51 +755,47 @@ scsi_low_attach_cam(slp)
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* ask the adapter what subunits are present
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*/
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tagged_openings = min(slp->sl_openings, SCSI_LOW_MAXNEXUS);
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slp->sl_si.sim = cam_sim_alloc(scsi_low_scsi_action_cam,
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slp->sl_sim = cam_sim_alloc(scsi_low_scsi_action_cam,
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scsi_low_poll_cam,
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device_get_name(slp->sl_dev), slp,
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device_get_unit(slp->sl_dev), &Giant,
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device_get_unit(slp->sl_dev), &slp->sl_lock,
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slp->sl_openings, tagged_openings, devq);
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if (slp->sl_si.sim == NULL) {
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if (slp->sl_sim == NULL) {
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cam_simq_free(devq);
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return ENODEV;
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}
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if (xpt_bus_register(slp->sl_si.sim, NULL, 0) != CAM_SUCCESS) {
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free(slp->sl_si.sim, M_SCSILOW);
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SCSI_LOW_LOCK(slp);
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if (xpt_bus_register(slp->sl_sim, slp->sl_dev, 0) != CAM_SUCCESS) {
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cam_sim_free(slp->sl_sim, TRUE);
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SCSI_LOW_UNLOCK(slp);
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return ENODEV;
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}
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if (xpt_create_path(&slp->sl_si.path, /*periph*/NULL,
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cam_sim_path(slp->sl_si.sim), CAM_TARGET_WILDCARD,
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if (xpt_create_path(&slp->sl_path, /*periph*/NULL,
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cam_sim_path(slp->sl_sim), CAM_TARGET_WILDCARD,
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CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
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xpt_bus_deregister(cam_sim_path(slp->sl_si.sim));
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cam_sim_free(slp->sl_si.sim, /*free_simq*/TRUE);
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xpt_bus_deregister(cam_sim_path(slp->sl_sim));
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cam_sim_free(slp->sl_sim, /*free_simq*/TRUE);
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SCSI_LOW_UNLOCK(slp);
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return ENODEV;
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}
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slp->sl_show_result = SHOW_CALCF_RES; /* OK ? */
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SCSI_LOW_UNLOCK(slp);
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return 0;
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}
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static int
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scsi_low_world_start_cam(slp)
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scsi_low_detach_cam(slp)
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struct scsi_low_softc *slp;
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{
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return 0;
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}
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static int
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scsi_low_dettach_cam(slp)
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struct scsi_low_softc *slp;
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{
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xpt_async(AC_LOST_DEVICE, slp->sl_si.path, NULL);
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xpt_free_path(slp->sl_si.path);
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xpt_bus_deregister(cam_sim_path(slp->sl_si.sim));
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cam_sim_free(slp->sl_si.sim, /* free_devq */ TRUE);
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xpt_async(AC_LOST_DEVICE, slp->sl_path, NULL);
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xpt_free_path(slp->sl_path);
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xpt_bus_deregister(cam_sim_path(slp->sl_sim));
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cam_sim_free(slp->sl_sim, /* free_devq */ TRUE);
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return 0;
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}
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@ -906,48 +883,6 @@ scsi_low_done_cam(slp, cb)
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return 0;
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}
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static void
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scsi_low_timeout_cam(slp, ch, action)
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struct scsi_low_softc *slp;
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int ch;
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int action;
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{
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switch (ch)
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{
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case SCSI_LOW_TIMEOUT_CH_IO:
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switch (action)
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{
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case SCSI_LOW_TIMEOUT_START:
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slp->sl_si.timeout_ch = timeout(scsi_low_timeout, slp,
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hz / SCSI_LOW_TIMEOUT_HZ);
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break;
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case SCSI_LOW_TIMEOUT_STOP:
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untimeout(scsi_low_timeout, slp, slp->sl_si.timeout_ch);
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break;
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}
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break;
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case SCSI_LOW_TIMEOUT_CH_ENGAGE:
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switch (action)
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{
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case SCSI_LOW_TIMEOUT_START:
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slp->sl_si.engage_ch = timeout(scsi_low_engage, slp, 1);
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break;
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case SCSI_LOW_TIMEOUT_STOP:
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untimeout(scsi_low_engage, slp, slp->sl_si.engage_ch);
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break;
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}
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break;
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case SCSI_LOW_TIMEOUT_CH_RECOVER:
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break;
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}
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}
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/*=============================================================
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* END OF OS switch (All OS depend fucntions should be above)
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=============================================================*/
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/**************************************************************
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* scsi low deactivate and activate
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**************************************************************/
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@ -965,15 +900,10 @@ int
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scsi_low_deactivate(slp)
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struct scsi_low_softc *slp;
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{
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int s;
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s = splcam();
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slp->sl_flags |= HW_INACTIVE;
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(*slp->sl_osdep_fp->scsi_low_osdep_timeout)
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(slp, SCSI_LOW_TIMEOUT_CH_IO, SCSI_LOW_TIMEOUT_STOP);
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(*slp->sl_osdep_fp->scsi_low_osdep_timeout)
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(slp, SCSI_LOW_TIMEOUT_CH_ENGAGE, SCSI_LOW_TIMEOUT_STOP);
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splx(s);
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callout_stop(&slp->sl_timeout_timer);
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callout_stop(&slp->sl_engage_timer);
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return 0;
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}
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@ -981,21 +911,18 @@ int
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scsi_low_activate(slp)
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struct scsi_low_softc *slp;
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{
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int error, s;
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int error;
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s = splcam();
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slp->sl_flags &= ~HW_INACTIVE;
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if ((error = scsi_low_restart(slp, SCSI_LOW_RESTART_HARD, NULL)) != 0)
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{
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slp->sl_flags |= HW_INACTIVE;
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splx(s);
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return error;
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}
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slp->sl_timeout_count = 0;
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(*slp->sl_osdep_fp->scsi_low_osdep_timeout)
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(slp, SCSI_LOW_TIMEOUT_CH_IO, SCSI_LOW_TIMEOUT_START);
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splx(s);
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callout_reset(&slp->sl_timeout_timer, hz / SCSI_LOW_TIMEOUT_HZ,
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scsi_low_timeout, slp);
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return 0;
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}
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@ -1063,15 +990,15 @@ scsi_low_engage(arg)
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void *arg;
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{
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struct scsi_low_softc *slp = arg;
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int s = splcam();
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SCSI_LOW_ASSERT_LOCKED(slp);
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switch (slp->sl_rstep)
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{
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case 0:
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slp->sl_rstep ++;
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(*slp->sl_funcs->scsi_low_power) (slp, SCSI_LOW_ENGAGE);
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(*slp->sl_osdep_fp->scsi_low_osdep_timeout) (slp,
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SCSI_LOW_TIMEOUT_CH_ENGAGE, SCSI_LOW_TIMEOUT_START);
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callout_reset(&slp->sl_engage_timer, hz / 1000,
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scsi_low_engage, slp);
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break;
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case 1:
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@ -1083,7 +1010,6 @@ scsi_low_engage(arg)
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case 2:
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break;
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}
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splx(s);
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}
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static int
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@ -1098,8 +1024,7 @@ scsi_low_init(slp, flags)
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/* clear power control timeout */
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if ((slp->sl_flags & HW_POWERCTRL) != 0)
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{
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(*slp->sl_osdep_fp->scsi_low_osdep_timeout) (slp,
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SCSI_LOW_TIMEOUT_CH_ENGAGE, SCSI_LOW_TIMEOUT_STOP);
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callout_stop(&slp->sl_engage_timer);
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slp->sl_flags &= ~(HW_POWDOWN | HW_RESUME);
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slp->sl_active = 1;
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slp->sl_powc = SCSI_LOW_POWDOWN_TC;
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@ -1273,13 +1198,10 @@ scsi_low_timeout(arg)
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void *arg;
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{
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struct scsi_low_softc *slp = arg;
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int s;
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s = splcam();
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SCSI_LOW_ASSERT_LOCKED(slp);
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(void) scsi_low_timeout_check(slp);
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(*slp->sl_osdep_fp->scsi_low_osdep_timeout)
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(slp, SCSI_LOW_TIMEOUT_CH_IO, SCSI_LOW_TIMEOUT_START);
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splx(s);
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callout_schedule(&slp->sl_timeout_timer, hz / SCSI_LOW_TIMEOUT_HZ);
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}
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static int
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@ -1459,12 +1381,7 @@ scsi_low_attach(slp, openings, ntargs, nluns, targsize, lunsize)
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{
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struct targ_info *ti;
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struct lun_info *li;
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int s, i, nccb, rv;
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slp->sl_osdep_fp = &scsi_low_osdep_funcs_cam;
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if (slp->sl_osdep_fp == NULL)
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panic("scsi_low: interface not spcified");
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int i, nccb, rv;
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if (ntargs > SCSI_LOW_NTARGETS)
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{
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@ -1503,31 +1420,32 @@ scsi_low_attach(slp, openings, ntargs, nluns, targsize, lunsize)
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TAILQ_INIT(&slp->sl_start);
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/* call os depend attach */
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s = splcam();
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rv = (*slp->sl_osdep_fp->scsi_low_osdep_attach) (slp);
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rv = scsi_low_attach_cam(slp);
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if (rv != 0)
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{
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splx(s);
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device_printf(slp->sl_dev,
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"scsi_low_attach: osdep attach failed\n");
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return EINVAL;
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return (rv);
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}
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/* check hardware */
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DELAY(1000); /* wait for 1ms */
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SCSI_LOW_LOCK(slp);
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if (scsi_low_init(slp, SCSI_LOW_RESTART_HARD) != 0)
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{
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splx(s);
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device_printf(slp->sl_dev,
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"scsi_low_attach: initialization failed\n");
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SCSI_LOW_UNLOCK(slp);
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return EINVAL;
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}
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/* start watch dog */
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slp->sl_timeout_count = 0;
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(*slp->sl_osdep_fp->scsi_low_osdep_timeout)
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(slp, SCSI_LOW_TIMEOUT_CH_IO, SCSI_LOW_TIMEOUT_START);
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callout_reset(&slp->sl_timeout_timer, hz / SCSI_LOW_TIMEOUT_HZ,
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scsi_low_timeout, slp);
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mtx_lock(&sl_tab_lock);
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LIST_INSERT_HEAD(&sl_tab, slp, sl_chain);
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mtx_unlock(&sl_tab_lock);
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/* fake call */
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scsi_low_abort_ccb(slp, scsi_low_find_ccb(slp, 0, 0, NULL));
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@ -1536,38 +1454,40 @@ scsi_low_attach(slp, openings, ntargs, nluns, targsize, lunsize)
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/* probing devices */
|
||||
scsi_low_start_up(slp);
|
||||
#endif /* SCSI_LOW_START_UP_CHECK */
|
||||
SCSI_LOW_UNLOCK(slp);
|
||||
|
||||
/* call os depend attach done*/
|
||||
(*slp->sl_osdep_fp->scsi_low_osdep_world_start) (slp);
|
||||
splx(s);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
scsi_low_dettach(slp)
|
||||
scsi_low_detach(slp)
|
||||
struct scsi_low_softc *slp;
|
||||
{
|
||||
int s, rv;
|
||||
int rv;
|
||||
|
||||
s = splcam();
|
||||
SCSI_LOW_LOCK(slp);
|
||||
if (scsi_low_is_busy(slp) != 0)
|
||||
{
|
||||
splx(s);
|
||||
SCSI_LOW_UNLOCK(slp);
|
||||
return EBUSY;
|
||||
}
|
||||
|
||||
scsi_low_deactivate(slp);
|
||||
|
||||
rv = (*slp->sl_osdep_fp->scsi_low_osdep_dettach) (slp);
|
||||
rv = scsi_low_detach_cam(slp);
|
||||
if (rv != 0)
|
||||
{
|
||||
splx(s);
|
||||
SCSI_LOW_UNLOCK(slp);
|
||||
return EBUSY;
|
||||
}
|
||||
|
||||
scsi_low_free_ti(slp);
|
||||
SCSI_LOW_UNLOCK(slp);
|
||||
callout_drain(&slp->sl_timeout_timer);
|
||||
callout_drain(&slp->sl_engage_timer);
|
||||
mtx_lock(&sl_tab_lock);
|
||||
LIST_REMOVE(slp, sl_chain);
|
||||
splx(s);
|
||||
mtx_unlock(&sl_tab_lock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1753,9 +1673,8 @@ scsi_low_resume(slp)
|
||||
slp->sl_flags |= HW_RESUME;
|
||||
slp->sl_rstep = 0;
|
||||
(*slp->sl_funcs->scsi_low_power) (slp, SCSI_LOW_ENGAGE);
|
||||
(*slp->sl_osdep_fp->scsi_low_osdep_timeout)
|
||||
(slp, SCSI_LOW_TIMEOUT_CH_ENGAGE,
|
||||
SCSI_LOW_TIMEOUT_START);
|
||||
callout_reset(&slp->sl_engage_timer, hz / 1000,
|
||||
scsi_low_engage, slp);
|
||||
return EJUSTRETURN;
|
||||
}
|
||||
return 0;
|
||||
@ -1839,7 +1758,7 @@ scsi_low_start(slp)
|
||||
else if (li->li_state >= SCSI_LOW_LUN_OK)
|
||||
{
|
||||
cb->ccb_flags &= ~CCB_INTERNAL;
|
||||
rv = (*slp->sl_osdep_fp->scsi_low_osdep_ccb_setup) (slp, cb);
|
||||
rv = scsi_low_ccb_setup_cam(slp, cb);
|
||||
if (cb->ccb_msgoutflag != 0)
|
||||
{
|
||||
scsi_low_ccb_message_exec(slp, cb);
|
||||
@ -2199,7 +2118,7 @@ scsi_low_done(slp, cb)
|
||||
/* call OS depend done */
|
||||
if (cb->osdep != NULL)
|
||||
{
|
||||
rv = (*slp->sl_osdep_fp->scsi_low_osdep_done) (slp, cb);
|
||||
rv = scsi_low_done_cam(slp, cb);
|
||||
if (rv == EJUSTRETURN)
|
||||
goto retry;
|
||||
}
|
||||
@ -3140,7 +3059,7 @@ scsi_low_msginfunc_lcc(slp)
|
||||
|
||||
scsi_low_init_msgsys(slp, ti);
|
||||
|
||||
(*slp->sl_osdep_fp->scsi_low_osdep_ccb_setup) (slp, ncb);
|
||||
scsi_low_ccb_setup_cam(slp, ncb);
|
||||
|
||||
if (ncb->ccb_tcmax < SCSI_LOW_MIN_TOUT)
|
||||
ncb->ccb_tcmax = SCSI_LOW_MIN_TOUT;
|
||||
|
@ -44,10 +44,6 @@
|
||||
#ifndef _SCSI_LOW_H_
|
||||
#define _SCSI_LOW_H_
|
||||
|
||||
/*================================================
|
||||
* Scsi low OSDEP
|
||||
* (All os depend structures should be here!)
|
||||
================================================*/
|
||||
/******** includes *******************************/
|
||||
|
||||
#include <sys/bus.h>
|
||||
@ -65,51 +61,8 @@
|
||||
|
||||
#undef MSG_IDENTIFY
|
||||
|
||||
/******** os depend interface structures **********/
|
||||
typedef struct scsi_sense_data scsi_low_osdep_sense_data_t;
|
||||
|
||||
struct scsi_low_osdep_interface {
|
||||
device_t si_dev;
|
||||
|
||||
struct cam_sim *sim;
|
||||
struct cam_path *path;
|
||||
|
||||
int si_poll_count;
|
||||
|
||||
struct callout_handle engage_ch;
|
||||
struct callout_handle timeout_ch;
|
||||
#ifdef SCSI_LOW_POWFUNC
|
||||
struct callout_handle recover_ch;
|
||||
#endif
|
||||
};
|
||||
|
||||
/******** os depend interface functions *************/
|
||||
struct slccb;
|
||||
struct scsi_low_softc;
|
||||
#define SCSI_LOW_TIMEOUT_STOP 0
|
||||
#define SCSI_LOW_TIMEOUT_START 1
|
||||
#define SCSI_LOW_TIMEOUT_CH_IO 0
|
||||
#define SCSI_LOW_TIMEOUT_CH_ENGAGE 1
|
||||
#define SCSI_LOW_TIMEOUT_CH_RECOVER 2
|
||||
|
||||
struct scsi_low_osdep_funcs {
|
||||
int (*scsi_low_osdep_attach) \
|
||||
(struct scsi_low_softc *);
|
||||
int (*scsi_low_osdep_world_start) \
|
||||
(struct scsi_low_softc *);
|
||||
int (*scsi_low_osdep_dettach) \
|
||||
(struct scsi_low_softc *);
|
||||
int (*scsi_low_osdep_ccb_setup) \
|
||||
(struct scsi_low_softc *, struct slccb *);
|
||||
int (*scsi_low_osdep_done) \
|
||||
(struct scsi_low_softc *, struct slccb *);
|
||||
void (*scsi_low_osdep_timeout) \
|
||||
(struct scsi_low_softc *, int, int);
|
||||
};
|
||||
|
||||
/*================================================
|
||||
* Generic Scsi Low header file
|
||||
* (All os depend structures should be above!)
|
||||
================================================*/
|
||||
/*************************************************
|
||||
* Scsi low definitions
|
||||
@ -229,7 +182,7 @@ struct slccb {
|
||||
* Sense data buffer
|
||||
*****************************************/
|
||||
u_int8_t ccb_scsi_cmd[12];
|
||||
scsi_low_osdep_sense_data_t ccb_sense;
|
||||
struct scsi_sense_data ccb_sense;
|
||||
};
|
||||
|
||||
/*************************************************
|
||||
@ -486,10 +439,19 @@ struct scsi_low_funcs {
|
||||
};
|
||||
|
||||
struct scsi_low_softc {
|
||||
/* os depend structure */
|
||||
struct scsi_low_osdep_interface sl_si;
|
||||
#define sl_dev sl_si.si_dev
|
||||
struct scsi_low_osdep_funcs *sl_osdep_fp;
|
||||
device_t sl_dev;
|
||||
|
||||
struct cam_sim *sl_sim;
|
||||
struct cam_path *sl_path;
|
||||
|
||||
int sl_poll_count;
|
||||
|
||||
struct mtx sl_lock;
|
||||
struct callout sl_engage_timer;
|
||||
struct callout sl_timeout_timer;
|
||||
#ifdef SCSI_LOW_POWFUNC
|
||||
struct callout sl_recover_timer;
|
||||
#endif
|
||||
|
||||
/* our chain */
|
||||
LIST_ENTRY(scsi_low_softc) sl_chain;
|
||||
@ -596,6 +558,10 @@ struct scsi_low_softc {
|
||||
int sl_targsize;
|
||||
};
|
||||
|
||||
#define SCSI_LOW_LOCK(sl) mtx_lock(&(sl)->sl_lock)
|
||||
#define SCSI_LOW_UNLOCK(sl) mtx_unlock(&(sl)->sl_lock)
|
||||
#define SCSI_LOW_ASSERT_LOCKED(sl) mtx_assert(&(sl)->sl_lock, MA_OWNED)
|
||||
|
||||
/*************************************************
|
||||
* SCSI LOW service functions
|
||||
*************************************************/
|
||||
@ -603,7 +569,7 @@ struct scsi_low_softc {
|
||||
* Scsi low attachment function.
|
||||
*/
|
||||
int scsi_low_attach(struct scsi_low_softc *, int, int, int, int, int);
|
||||
int scsi_low_dettach(struct scsi_low_softc *);
|
||||
int scsi_low_detach(struct scsi_low_softc *);
|
||||
|
||||
/*
|
||||
* Scsi low interface activate or deactivate functions
|
||||
|
@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$");
|
||||
#include <sys/queue.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/errno.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <vm/vm.h>
|
||||
|
||||
@ -328,7 +329,7 @@ bshw_smit_xfer_start(struct ct_softc *ct)
|
||||
break;
|
||||
|
||||
count = (datalen > LC_FSZ ? LC_FSZ : datalen);
|
||||
bus_space_read_region_4(chp->ch_memt, chp->ch_memh,
|
||||
bus_read_region_4(chp->ch_mem,
|
||||
LC_SMIT_OFFSET, (u_int32_t *) data, count >> 2);
|
||||
data += count;
|
||||
datalen -= count;
|
||||
@ -354,7 +355,7 @@ bshw_smit_xfer_start(struct ct_softc *ct)
|
||||
}
|
||||
|
||||
count = (datalen > LC_SFSZ ? LC_SFSZ : datalen);
|
||||
bus_space_write_region_4(chp->ch_memt, chp->ch_memh,
|
||||
bus_write_region_4(chp->ch_mem,
|
||||
LC_SMIT_OFFSET, (u_int32_t *) data, count >> 2);
|
||||
data += count;
|
||||
datalen -= count;
|
||||
@ -363,7 +364,7 @@ bshw_smit_xfer_start(struct ct_softc *ct)
|
||||
break;
|
||||
|
||||
count = (datalen > LC_REST ? LC_REST : datalen);
|
||||
bus_space_write_region_4(chp->ch_memt, chp->ch_memh,
|
||||
bus_write_region_4(chp->ch_mem,
|
||||
LC_SMIT_OFFSET + LC_SFSZ,
|
||||
(u_int32_t *) data, count >> 2);
|
||||
data += count;
|
||||
|
@ -47,6 +47,7 @@ __FBSDID("$FreeBSD$");
|
||||
#include <sys/queue.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/errno.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
|
||||
@ -140,6 +141,7 @@ static int ct_unbusy(struct ct_softc *);
|
||||
static void ct_attention(struct ct_softc *);
|
||||
static struct ct_synch_data *ct_make_synch_table(struct ct_softc *);
|
||||
static int ct_catch_intr(struct ct_softc *);
|
||||
static int ct_poll(void *);
|
||||
|
||||
struct scsi_low_funcs ct_funcs = {
|
||||
SC_LOW_INIT_T ct_world_start,
|
||||
@ -155,7 +157,7 @@ struct scsi_low_funcs ct_funcs = {
|
||||
SC_LOW_MSG_T ct_msg,
|
||||
|
||||
SC_LOW_TIMEOUT_T NULL,
|
||||
SC_LOW_POLL_T ctintr,
|
||||
SC_LOW_POLL_T ct_poll,
|
||||
|
||||
NULL, /* SC_LOW_POWER_T cthw_power, */
|
||||
};
|
||||
@ -876,8 +878,19 @@ ct_catch_intr(struct ct_softc *ct)
|
||||
return EJUSTRETURN;
|
||||
}
|
||||
|
||||
int
|
||||
void
|
||||
ctintr(void *arg)
|
||||
{
|
||||
struct ct_softc *ct = arg;
|
||||
struct scsi_low_softc *slp = &ct->sc_sclow;
|
||||
|
||||
SCSI_LOW_LOCK(slp);
|
||||
ct_poll(ct);
|
||||
SCSI_LOW_UNLOCK(slp);
|
||||
}
|
||||
|
||||
static int
|
||||
ct_poll(void *arg)
|
||||
{
|
||||
struct ct_softc *ct = arg;
|
||||
struct scsi_low_softc *slp = &ct->sc_sclow;
|
||||
|
@ -137,8 +137,7 @@ ct_isa_match(device_t dev)
|
||||
return ENXIO;
|
||||
|
||||
bzero(&ch, sizeof(ch));
|
||||
ch.ch_iot = rman_get_bustag(port_res);
|
||||
ch.ch_ioh = rman_get_bushandle(port_res),
|
||||
ch.ch_io = port_res;
|
||||
ch.ch_bus_weight = ct_isa_bus_access_weight;
|
||||
|
||||
rv = ctprobesubr(&ch, 0, BSHW_DEFAULT_HOSTID,
|
||||
@ -159,7 +158,7 @@ ct_isa_match(device_t dev)
|
||||
bus_release_resource(dev, SYS_RES_MEMORY, 0, mem_res);
|
||||
|
||||
if (rv != 0)
|
||||
return 0;
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
return ENXIO;
|
||||
}
|
||||
|
||||
@ -175,7 +174,6 @@ ct_isa_attach(device_t dev)
|
||||
int irq_rid, drq_rid, chiprev;
|
||||
u_int8_t *vaddr;
|
||||
bus_addr_t addr;
|
||||
intrmask_t s;
|
||||
|
||||
hw = ct_find_hw(dev);
|
||||
if (ct_space_map(dev, hw, &ct->port_res, &ct->mem_res) != 0) {
|
||||
@ -183,13 +181,8 @@ ct_isa_attach(device_t dev)
|
||||
return ENXIO;
|
||||
}
|
||||
|
||||
bzero(chp, sizeof(*chp));
|
||||
chp->ch_iot = rman_get_bustag(ct->port_res);
|
||||
chp->ch_ioh = rman_get_bushandle(ct->port_res);
|
||||
if (ct->mem_res) {
|
||||
chp->ch_memt = rman_get_bustag(ct->mem_res);
|
||||
chp->ch_memh = rman_get_bushandle(ct->mem_res);
|
||||
}
|
||||
chp->ch_io = ct->port_res;
|
||||
chp->ch_mem = ct->mem_res;
|
||||
chp->ch_bus_weight = ct_isa_bus_access_weight;
|
||||
|
||||
irq_rid = 0;
|
||||
@ -254,7 +247,7 @@ ct_isa_attach(device_t dev)
|
||||
ct->ct_synch_setup = bshw_synch_setup;
|
||||
|
||||
ct->sc_xmode = CT_XMODE_DMA;
|
||||
if (chp->ch_memh != NULL)
|
||||
if (chp->ch_mem != NULL)
|
||||
ct->sc_xmode |= CT_XMODE_PIO;
|
||||
|
||||
ct->sc_chiprev = chiprev;
|
||||
@ -297,13 +290,12 @@ ct_isa_attach(device_t dev)
|
||||
slp->sl_dev = dev;
|
||||
slp->sl_hostid = bs->sc_hostid;
|
||||
slp->sl_cfgflags = device_get_flags(dev);
|
||||
mtx_init(&slp->sl_lock, "ct", NULL, MTX_DEF);
|
||||
|
||||
s = splcam();
|
||||
ctattachsubr(ct);
|
||||
splx(s);
|
||||
|
||||
if (bus_setup_intr(dev, ct->irq_res, INTR_TYPE_CAM,
|
||||
NULL, (driver_intr_t *)ctintr, ct, &ct->sc_ih)) {
|
||||
if (bus_setup_intr(dev, ct->irq_res, INTR_TYPE_CAM | INTR_MPSAFE,
|
||||
NULL, ctintr, ct, &ct->sc_ih)) {
|
||||
ct_space_unmap(dev, ct);
|
||||
return ENXIO;
|
||||
}
|
||||
@ -326,7 +318,7 @@ ct_space_map(device_t dev, struct bshw *hw,
|
||||
*memhp = NULL;
|
||||
|
||||
port_rid = 0;
|
||||
*iohp = bus_alloc_resource(dev, SYS_RES_IOPORT, &port_rid, 0, ~0,
|
||||
*iohp = bus_alloc_resource(dev, SYS_RES_IOPORT, &port_rid, 0ul, ~0ul,
|
||||
BSHW_IOSZ, RF_ACTIVE);
|
||||
if (*iohp == NULL)
|
||||
return ENXIO;
|
||||
@ -335,7 +327,7 @@ ct_space_map(device_t dev, struct bshw *hw,
|
||||
return 0;
|
||||
|
||||
mem_rid = 0;
|
||||
*memhp = bus_alloc_resource(dev, SYS_RES_MEMORY, &mem_rid, 0, ~0,
|
||||
*memhp = bus_alloc_resource(dev, SYS_RES_MEMORY, &mem_rid, 0ul, ~0ul,
|
||||
BSHW_MEMSZ, RF_ACTIVE);
|
||||
if (*memhp == NULL) {
|
||||
bus_release_resource(dev, SYS_RES_IOPORT, port_rid, *iohp);
|
||||
|
@ -94,7 +94,7 @@ ct_stat_read_1(struct ct_bus_access_handle *chp)
|
||||
{
|
||||
u_int8_t regv;
|
||||
|
||||
regv = bus_space_read_1(chp->ch_iot, chp->ch_ioh, stat_port);
|
||||
regv = bus_read_1(chp->ch_io, stat_port);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
return regv;
|
||||
}
|
||||
@ -102,33 +102,29 @@ ct_stat_read_1(struct ct_bus_access_handle *chp)
|
||||
static __inline void
|
||||
cthw_set_count(struct ct_bus_access_handle *chp, u_int count)
|
||||
{
|
||||
bus_space_tag_t bst = chp->ch_iot;
|
||||
bus_space_handle_t bsh = chp->ch_ioh;
|
||||
|
||||
bus_space_write_1(bst, bsh, addr_port, wd3s_cnt);
|
||||
bus_write_1(chp->ch_io, addr_port, wd3s_cnt);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
bus_space_write_1(bst, bsh, ctrl_port, count >> 16);
|
||||
bus_write_1(chp->ch_io, ctrl_port, count >> 16);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
bus_space_write_1(bst, bsh, ctrl_port, count >> 8);
|
||||
bus_write_1(chp->ch_io, ctrl_port, count >> 8);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
bus_space_write_1(bst, bsh, ctrl_port, count);
|
||||
bus_write_1(chp->ch_io, ctrl_port, count);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
cthw_get_count(struct ct_bus_access_handle *chp)
|
||||
{
|
||||
bus_space_tag_t bst = chp->ch_iot;
|
||||
bus_space_handle_t bsh = chp->ch_ioh;
|
||||
u_int count;
|
||||
|
||||
bus_space_write_1(bst, bsh, addr_port, wd3s_cnt);
|
||||
bus_write_1(chp->ch_io, addr_port, wd3s_cnt);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
count = (((u_int) bus_space_read_1(bst, bsh, ctrl_port)) << 16);
|
||||
count = (((u_int) bus_read_1(chp->ch_io, ctrl_port)) << 16);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
count += (((u_int) bus_space_read_1(bst, bsh, ctrl_port)) << 8);
|
||||
count += (((u_int) bus_read_1(chp->ch_io, ctrl_port)) << 8);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
count += ((u_int) bus_space_read_1(bst, bsh, ctrl_port));
|
||||
count += ((u_int) bus_read_1(chp->ch_io, ctrl_port));
|
||||
CT_BUS_WEIGHT(chp)
|
||||
return count;
|
||||
}
|
||||
@ -136,15 +132,13 @@ cthw_get_count(struct ct_bus_access_handle *chp)
|
||||
static __inline void
|
||||
ct_write_cmds(struct ct_bus_access_handle *chp, u_int8_t *cmd, int len)
|
||||
{
|
||||
bus_space_tag_t bst = chp->ch_iot;
|
||||
bus_space_handle_t bsh = chp->ch_ioh;
|
||||
int i;
|
||||
|
||||
bus_space_write_1(bst, bsh, addr_port, wd3s_cdb);
|
||||
bus_write_1(chp->ch_io, addr_port, wd3s_cdb);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
for (i = 0; i < len; i ++)
|
||||
{
|
||||
bus_space_write_1(bst, bsh, ctrl_port, cmd[i]);
|
||||
bus_write_1(chp->ch_io, ctrl_port, cmd[i]);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
}
|
||||
}
|
||||
@ -152,13 +146,11 @@ ct_write_cmds(struct ct_bus_access_handle *chp, u_int8_t *cmd, int len)
|
||||
static __inline u_int8_t
|
||||
ct_cr_read_1(struct ct_bus_access_handle *chp, bus_addr_t offs)
|
||||
{
|
||||
bus_space_tag_t bst = chp->ch_iot;
|
||||
bus_space_handle_t bsh = chp->ch_ioh;
|
||||
u_int8_t regv;
|
||||
|
||||
bus_space_write_1(bst, bsh, addr_port, offs);
|
||||
bus_write_1(chp->ch_io, addr_port, offs);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
regv = bus_space_read_1(bst, bsh, ctrl_port);
|
||||
regv = bus_read_1(chp->ch_io, ctrl_port);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
return regv;
|
||||
}
|
||||
@ -166,12 +158,10 @@ ct_cr_read_1(struct ct_bus_access_handle *chp, bus_addr_t offs)
|
||||
static __inline void
|
||||
ct_cr_write_1(struct ct_bus_access_handle *chp, bus_addr_t offs, u_int8_t val)
|
||||
{
|
||||
bus_space_tag_t bst = chp->ch_iot;
|
||||
bus_space_handle_t bsh = chp->ch_ioh;
|
||||
|
||||
bus_space_write_1(bst, bsh, addr_port, offs);
|
||||
bus_write_1(chp->ch_io, addr_port, offs);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
bus_space_write_1(bst, bsh, ctrl_port, val);
|
||||
bus_write_1(chp->ch_io, ctrl_port, val);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
}
|
||||
|
||||
@ -180,7 +170,7 @@ ct_cmdp_read_1(struct ct_bus_access_handle *chp)
|
||||
{
|
||||
u_int8_t regv;
|
||||
|
||||
regv = bus_space_read_1(chp->ch_iot, chp->ch_ioh, cmd_port);
|
||||
regv = bus_read_1(chp->ch_io, cmd_port);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
return regv;
|
||||
}
|
||||
@ -189,7 +179,7 @@ static __inline void
|
||||
ct_cmdp_write_1(struct ct_bus_access_handle *chp, u_int8_t val)
|
||||
{
|
||||
|
||||
bus_space_write_1(chp->ch_iot, chp->ch_ioh, cmd_port, val);
|
||||
bus_write_1(chp->ch_io, cmd_port, val);
|
||||
CT_BUS_WEIGHT(chp)
|
||||
}
|
||||
|
||||
|
@ -44,15 +44,8 @@
|
||||
* Host adapter structure
|
||||
*****************************************************************/
|
||||
struct ct_bus_access_handle {
|
||||
bus_space_tag_t ch_iot; /* core chip ctrl port tag */
|
||||
bus_space_tag_t ch_delayt; /* delay port tag */
|
||||
bus_space_tag_t ch_datat; /* data port tag (pio) */
|
||||
bus_space_tag_t ch_memt; /* data port tag (shm) */
|
||||
|
||||
bus_space_handle_t ch_ioh;
|
||||
bus_space_handle_t ch_delaybah;
|
||||
bus_space_handle_t ch_datah;
|
||||
bus_space_handle_t ch_memh;
|
||||
struct resource *ch_io; /* core chip ctrl port */
|
||||
struct resource *ch_mem; /* data port (shm) */
|
||||
|
||||
void (*ch_bus_weight)(struct ct_bus_access_handle *);
|
||||
|
||||
@ -132,5 +125,5 @@ struct ct_targ_info {
|
||||
*****************************************************************/
|
||||
int ctprobesubr(struct ct_bus_access_handle *, u_int, int, u_int, int *);
|
||||
void ctattachsubr(struct ct_softc *);
|
||||
int ctintr(void *);
|
||||
void ctintr(void *);
|
||||
#endif /* !_CTVAR_H_ */
|
||||
|
@ -47,6 +47,7 @@ __FBSDID("$FreeBSD$");
|
||||
#include <sys/queue.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/errno.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <machine/cpu.h>
|
||||
#include <machine/bus.h>
|
||||
@ -107,18 +108,18 @@ static int ncv_msg(struct ncv_softc *, struct targ_info *, u_int);
|
||||
static int ncv_reselected(struct ncv_softc *);
|
||||
static int ncv_disconnected(struct ncv_softc *, struct targ_info *);
|
||||
|
||||
static __inline void ncvhw_set_count(bus_space_tag_t, bus_space_handle_t, int);
|
||||
static __inline u_int ncvhw_get_count(bus_space_tag_t, bus_space_handle_t);
|
||||
static __inline void ncvhw_select_register_0(bus_space_tag_t, bus_space_handle_t, struct ncv_hw *);
|
||||
static __inline void ncvhw_select_register_1(bus_space_tag_t, bus_space_handle_t, struct ncv_hw *);
|
||||
static __inline void ncvhw_fpush(bus_space_tag_t, bus_space_handle_t, u_int8_t *, int);
|
||||
static __inline void ncvhw_set_count(struct resource *, int);
|
||||
static __inline u_int ncvhw_get_count(struct resource *);
|
||||
static __inline void ncvhw_select_register_0(struct resource *, struct ncv_hw *);
|
||||
static __inline void ncvhw_select_register_1(struct resource *, struct ncv_hw *);
|
||||
static __inline void ncvhw_fpush(struct resource *, u_int8_t *, int);
|
||||
|
||||
static void ncv_pdma_end(struct ncv_softc *sc, struct targ_info *);
|
||||
static int ncv_world_start(struct ncv_softc *, int);
|
||||
static void ncvhw_bus_reset(struct ncv_softc *);
|
||||
static void ncvhw_reset(bus_space_tag_t, bus_space_handle_t, struct ncv_hw *);
|
||||
static int ncvhw_check(bus_space_tag_t, bus_space_handle_t, struct ncv_hw *);
|
||||
static void ncvhw_init(bus_space_tag_t, bus_space_handle_t, struct ncv_hw *);
|
||||
static void ncvhw_reset(struct resource *, struct ncv_hw *);
|
||||
static int ncvhw_check(struct resource *, struct ncv_hw *);
|
||||
static void ncvhw_init(struct resource *, struct ncv_hw *);
|
||||
static int ncvhw_start_selection(struct ncv_softc *sc, struct slccb *);
|
||||
static void ncvhw_attention(struct ncv_softc *);
|
||||
static int ncv_ccb_nexus_establish(struct ncv_softc *);
|
||||
@ -154,74 +155,56 @@ struct scsi_low_funcs ncv_funcs = {
|
||||
* hwfuncs
|
||||
**************************************************************/
|
||||
static __inline void
|
||||
ncvhw_select_register_0(iot, ioh, hw)
|
||||
bus_space_tag_t iot;
|
||||
bus_space_handle_t ioh;
|
||||
struct ncv_hw *hw;
|
||||
ncvhw_select_register_0(struct resource *res, struct ncv_hw *hw)
|
||||
{
|
||||
|
||||
bus_space_write_1(iot, ioh, cr0_cfg4, hw->hw_cfg4);
|
||||
bus_write_1(res, cr0_cfg4, hw->hw_cfg4);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
ncvhw_select_register_1(iot, ioh, hw)
|
||||
bus_space_tag_t iot;
|
||||
bus_space_handle_t ioh;
|
||||
struct ncv_hw *hw;
|
||||
ncvhw_select_register_1(struct resource *res, struct ncv_hw *hw)
|
||||
{
|
||||
|
||||
bus_space_write_1(iot, ioh, cr1_cfg5, hw->hw_cfg5);
|
||||
bus_write_1(res, cr1_cfg5, hw->hw_cfg5);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
ncvhw_fpush(iot, ioh, buf, len)
|
||||
bus_space_tag_t iot;
|
||||
bus_space_handle_t ioh;
|
||||
u_int8_t *buf;
|
||||
int len;
|
||||
ncvhw_fpush(struct resource *res, u_int8_t *buf, int len)
|
||||
{
|
||||
int ptr;
|
||||
|
||||
for (ptr = 0; ptr < len; ptr ++)
|
||||
bus_space_write_1(iot, ioh, cr0_sfifo, buf[ptr]);
|
||||
bus_write_1(res, cr0_sfifo, buf[ptr]);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
ncvhw_set_count(iot, ioh, count)
|
||||
bus_space_tag_t iot;
|
||||
bus_space_handle_t ioh;
|
||||
int count;
|
||||
ncvhw_set_count(struct resource *res, int count)
|
||||
{
|
||||
|
||||
bus_space_write_1(iot, ioh, cr0_tclsb, (u_int8_t) count);
|
||||
bus_space_write_1(iot, ioh, cr0_tcmsb, (u_int8_t) (count >> NBBY));
|
||||
bus_space_write_1(iot, ioh, cr0_tchsb, (u_int8_t) (count >> (NBBY * 2)));
|
||||
bus_write_1(res, cr0_tclsb, (u_int8_t) count);
|
||||
bus_write_1(res, cr0_tcmsb, (u_int8_t) (count >> NBBY));
|
||||
bus_write_1(res, cr0_tchsb, (u_int8_t) (count >> (NBBY * 2)));
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
ncvhw_get_count(iot, ioh)
|
||||
bus_space_tag_t iot;
|
||||
bus_space_handle_t ioh;
|
||||
ncvhw_get_count(struct resource *res)
|
||||
{
|
||||
u_int count;
|
||||
|
||||
count = (u_int) bus_space_read_1(iot, ioh, cr0_tclsb);
|
||||
count |= ((u_int) bus_space_read_1(iot, ioh, cr0_tcmsb)) << NBBY;
|
||||
count |= ((u_int) bus_space_read_1(iot, ioh, cr0_tchsb)) << (NBBY * 2);
|
||||
count = (u_int) bus_read_1(res, cr0_tclsb);
|
||||
count |= ((u_int) bus_read_1(res, cr0_tcmsb)) << NBBY;
|
||||
count |= ((u_int) bus_read_1(res, cr0_tchsb)) << (NBBY * 2);
|
||||
return count;
|
||||
}
|
||||
|
||||
static int
|
||||
ncvhw_check(iot, ioh, hw)
|
||||
bus_space_tag_t iot;
|
||||
bus_space_handle_t ioh;
|
||||
struct ncv_hw *hw;
|
||||
ncvhw_check(struct resource *res, struct ncv_hw *hw)
|
||||
{
|
||||
u_int8_t stat;
|
||||
|
||||
ncvhw_select_register_0(iot, ioh, hw);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_NOP | CMD_DMA);
|
||||
if (bus_space_read_1(iot, ioh, cr0_cmd) != (CMD_NOP | CMD_DMA))
|
||||
ncvhw_select_register_0(res, hw);
|
||||
bus_write_1(res, cr0_cmd, CMD_NOP | CMD_DMA);
|
||||
if (bus_read_1(res, cr0_cmd) != (CMD_NOP | CMD_DMA))
|
||||
{
|
||||
#ifdef NCV_DEBUG
|
||||
printf("ncv: cr0_cmd CMD_NOP|CMD_DMA failed\n");
|
||||
@ -229,8 +212,8 @@ ncvhw_check(iot, ioh, hw)
|
||||
return ENODEV;
|
||||
}
|
||||
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_NOP);
|
||||
if (bus_space_read_1(iot, ioh, cr0_cmd) != CMD_NOP)
|
||||
bus_write_1(res, cr0_cmd, CMD_NOP);
|
||||
if (bus_read_1(res, cr0_cmd) != CMD_NOP)
|
||||
{
|
||||
#ifdef NCV_DEBUG
|
||||
printf("ncv: cr0_cmd CMD_NOP failed\n");
|
||||
@ -239,23 +222,23 @@ ncvhw_check(iot, ioh, hw)
|
||||
}
|
||||
|
||||
/* hardware reset */
|
||||
ncvhw_reset(iot, ioh, hw);
|
||||
ncvhw_init(iot, ioh, hw);
|
||||
ncvhw_reset(res, hw);
|
||||
ncvhw_init(res, hw);
|
||||
|
||||
/* bus reset */
|
||||
ncvhw_select_register_0(iot, ioh, hw);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_FLUSH);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_RSTSCSI);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_NOP | CMD_DMA);
|
||||
ncvhw_select_register_0(res, hw);
|
||||
bus_write_1(res, cr0_cmd, CMD_FLUSH);
|
||||
bus_write_1(res, cr0_cmd, CMD_RSTSCSI);
|
||||
bus_write_1(res, cr0_cmd, CMD_NOP | CMD_DMA);
|
||||
DELAY(100 * 1000);
|
||||
|
||||
/* check response */
|
||||
bus_space_read_1(iot, ioh, cr0_stat);
|
||||
stat = bus_space_read_1(iot, ioh, cr0_istat);
|
||||
bus_read_1(res, cr0_stat);
|
||||
stat = bus_read_1(res, cr0_istat);
|
||||
DELAY(1000);
|
||||
|
||||
if (((stat & INTR_SBR) == 0) ||
|
||||
(bus_space_read_1(iot, ioh, cr0_istat) & INTR_SBR))
|
||||
(bus_read_1(res, cr0_istat) & INTR_SBR))
|
||||
{
|
||||
#ifdef NCV_DEBUG
|
||||
printf("ncv: cr0_istat SCSI BUS RESET failed\n");
|
||||
@ -267,50 +250,44 @@ ncvhw_check(iot, ioh, hw)
|
||||
}
|
||||
|
||||
static void
|
||||
ncvhw_reset(iot, ioh, hw)
|
||||
bus_space_tag_t iot;
|
||||
bus_space_handle_t ioh;
|
||||
struct ncv_hw *hw;
|
||||
ncvhw_reset(struct resource *res, struct ncv_hw *hw)
|
||||
{
|
||||
|
||||
ncvhw_select_register_0(iot, ioh, hw);
|
||||
ncvhw_select_register_0(res, hw);
|
||||
|
||||
/* dummy cmd twice */
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_NOP);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_NOP);
|
||||
bus_write_1(res, cr0_cmd, CMD_NOP);
|
||||
bus_write_1(res, cr0_cmd, CMD_NOP);
|
||||
|
||||
/* chip reset */
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_RSTCHIP);
|
||||
bus_write_1(res, cr0_cmd, CMD_RSTCHIP);
|
||||
|
||||
/* again dummy cmd twice */
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_NOP);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_NOP);
|
||||
bus_write_1(res, cr0_cmd, CMD_NOP);
|
||||
bus_write_1(res, cr0_cmd, CMD_NOP);
|
||||
}
|
||||
|
||||
static void
|
||||
ncvhw_init(iot, ioh, hw)
|
||||
bus_space_tag_t iot;
|
||||
bus_space_handle_t ioh;
|
||||
struct ncv_hw *hw;
|
||||
ncvhw_init(struct resource *res, struct ncv_hw *hw)
|
||||
{
|
||||
|
||||
ncvhw_select_register_0(iot, ioh, hw);
|
||||
bus_space_write_1(iot, ioh, cr0_clk, hw->hw_clk);
|
||||
bus_space_write_1(iot, ioh, cr0_srtout, SEL_TOUT);
|
||||
bus_space_write_1(iot, ioh, cr0_period, 0);
|
||||
bus_space_write_1(iot, ioh, cr0_offs, 0);
|
||||
ncvhw_select_register_0(res, hw);
|
||||
bus_write_1(res, cr0_clk, hw->hw_clk);
|
||||
bus_write_1(res, cr0_srtout, SEL_TOUT);
|
||||
bus_write_1(res, cr0_period, 0);
|
||||
bus_write_1(res, cr0_offs, 0);
|
||||
|
||||
bus_space_write_1(iot, ioh, cr0_cfg1, hw->hw_cfg1);
|
||||
bus_space_write_1(iot, ioh, cr0_cfg2, hw->hw_cfg2);
|
||||
bus_space_write_1(iot, ioh, cr0_cfg3, hw->hw_cfg3);
|
||||
bus_space_write_1(iot, ioh, cr0_tchsb, 0);
|
||||
bus_write_1(res, cr0_cfg1, hw->hw_cfg1);
|
||||
bus_write_1(res, cr0_cfg2, hw->hw_cfg2);
|
||||
bus_write_1(res, cr0_cfg3, hw->hw_cfg3);
|
||||
bus_write_1(res, cr0_tchsb, 0);
|
||||
|
||||
ncvhw_select_register_1(iot, ioh, hw);
|
||||
bus_space_write_1(iot, ioh, cr1_fstat, 0x0);
|
||||
bus_space_write_1(iot, ioh, cr1_pflag, 0x0);
|
||||
bus_space_write_1(iot, ioh, cr1_atacmd, ATACMD_ENGAGE);
|
||||
ncvhw_select_register_1(res, hw);
|
||||
bus_write_1(res, cr1_fstat, 0x0);
|
||||
bus_write_1(res, cr1_pflag, 0x0);
|
||||
bus_write_1(res, cr1_atacmd, ATACMD_ENGAGE);
|
||||
|
||||
ncvhw_select_register_0(iot, ioh, hw);
|
||||
ncvhw_select_register_0(res, hw);
|
||||
}
|
||||
|
||||
#ifdef NCV_POWER_CONTROL
|
||||
@ -320,14 +297,13 @@ ncvhw_power(sc, flags)
|
||||
u_int flags;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
|
||||
if (flags == SCSI_LOW_POWDOWN)
|
||||
{
|
||||
device_printf(slp->sl_dev, "power down\n");
|
||||
ncvhw_select_register_1(iot, ioh, &sc->sc_hw);
|
||||
bus_space_write_1(iot, ioh, cr1_atacmd, ATACMD_POWDOWN);
|
||||
ncvhw_select_register_1(res, &sc->sc_hw);
|
||||
bus_write_1(res, cr1_atacmd, ATACMD_POWDOWN);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -335,14 +311,14 @@ ncvhw_power(sc, flags)
|
||||
{
|
||||
case 0:
|
||||
device_printf(slp->sl_dev, "resume step O\n");
|
||||
ncvhw_select_register_1(iot, ioh, &sc->sc_hw);
|
||||
bus_space_write_1(iot, ioh, cr1_atacmd, ATACMD_ENGAGE);
|
||||
ncvhw_select_register_1(res, &sc->sc_hw);
|
||||
bus_write_1(res, cr1_atacmd, ATACMD_ENGAGE);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
device_printf(slp->sl_dev, "resume step I\n");
|
||||
ncvhw_reset(iot, ioh, &sc->sc_hw);
|
||||
ncvhw_init(iot, ioh, &sc->sc_hw);
|
||||
ncvhw_reset(res, &sc->sc_hw);
|
||||
ncvhw_init(res, &sc->sc_hw);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -359,7 +335,7 @@ ncvhw_attention(sc)
|
||||
struct ncv_softc *sc;
|
||||
{
|
||||
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh, cr0_cmd, CMD_SETATN);
|
||||
bus_write_1(sc->port_res, cr0_cmd, CMD_SETATN);
|
||||
DELAY(10);
|
||||
}
|
||||
|
||||
@ -367,13 +343,11 @@ static void
|
||||
ncvhw_bus_reset(sc)
|
||||
struct ncv_softc *sc;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
|
||||
ncvhw_select_register_0(iot, ioh, &sc->sc_hw);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_FLUSH);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_RSTSCSI);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_NOP | CMD_DMA);
|
||||
ncvhw_select_register_0(sc->port_res, &sc->sc_hw);
|
||||
bus_write_1(sc->port_res, cr0_cmd, CMD_FLUSH);
|
||||
bus_write_1(sc->port_res, cr0_cmd, CMD_RSTSCSI);
|
||||
bus_write_1(sc->port_res, cr0_cmd, CMD_NOP | CMD_DMA);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -382,10 +356,9 @@ ncvhw_start_selection(sc, cb)
|
||||
struct slccb *cb;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
struct targ_info *ti = cb->ti;
|
||||
int s, len;
|
||||
int len;
|
||||
u_int flags;
|
||||
u_int8_t cmd;
|
||||
|
||||
@ -411,8 +384,8 @@ ncvhw_start_selection(sc, cb)
|
||||
flags = SCSI_LOW_MSGOUT_INIT;
|
||||
}
|
||||
|
||||
ncvhw_select_register_0(iot, ioh, &sc->sc_hw);
|
||||
if ((bus_space_read_1(iot, ioh, cr0_stat) & STAT_INT) != 0)
|
||||
ncvhw_select_register_0(res, &sc->sc_hw);
|
||||
if ((bus_read_1(res, cr0_stat) & STAT_INT) != 0)
|
||||
return SCSI_LOW_START_FAIL;
|
||||
|
||||
ncv_target_nexus_establish(sc);
|
||||
@ -421,23 +394,18 @@ ncvhw_start_selection(sc, cb)
|
||||
if (sc->sc_selstop == 0)
|
||||
scsi_low_cmd(slp, ti);
|
||||
|
||||
s = splhigh();
|
||||
if ((bus_space_read_1(iot, ioh, cr0_stat) & STAT_INT) != 0)
|
||||
{
|
||||
splx(s);
|
||||
if ((bus_read_1(res, cr0_stat) & STAT_INT) != 0)
|
||||
return SCSI_LOW_START_FAIL;
|
||||
}
|
||||
|
||||
bus_space_write_1(iot, ioh, cr0_dstid, ti->ti_id);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_FLUSH);
|
||||
ncvhw_fpush(iot, ioh, ti->ti_msgoutstr, len);
|
||||
bus_write_1(res, cr0_dstid, ti->ti_id);
|
||||
bus_write_1(res, cr0_cmd, CMD_FLUSH);
|
||||
ncvhw_fpush(res, ti->ti_msgoutstr, len);
|
||||
if (sc->sc_selstop == 0)
|
||||
{
|
||||
ncvhw_fpush(iot, ioh,
|
||||
ncvhw_fpush(res,
|
||||
slp->sl_scp.scp_cmd, slp->sl_scp.scp_cmdlen);
|
||||
}
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, cmd);
|
||||
splx(s);
|
||||
bus_write_1(res, cr0_cmd, cmd);
|
||||
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
|
||||
return SCSI_LOW_START_OK;
|
||||
@ -449,8 +417,7 @@ ncv_world_start(sc, fdone)
|
||||
int fdone;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
u_int8_t stat;
|
||||
|
||||
if ((slp->sl_cfgflags & CFG_NOPARITY) == 0)
|
||||
@ -458,18 +425,18 @@ ncv_world_start(sc, fdone)
|
||||
else
|
||||
sc->sc_hw.hw_cfg1 &= ~C1_PARENB;
|
||||
|
||||
ncvhw_reset(iot, ioh, &sc->sc_hw);
|
||||
ncvhw_init(iot, ioh, &sc->sc_hw);
|
||||
ncvhw_reset(res, &sc->sc_hw);
|
||||
ncvhw_init(res, &sc->sc_hw);
|
||||
|
||||
scsi_low_bus_reset(slp);
|
||||
|
||||
ncvhw_select_register_0(iot, ioh, &sc->sc_hw);
|
||||
bus_space_read_1(sc->sc_iot, sc->sc_ioh, cr0_stat);
|
||||
stat = bus_space_read_1(sc->sc_iot, sc->sc_ioh, cr0_istat);
|
||||
ncvhw_select_register_0(res, &sc->sc_hw);
|
||||
bus_read_1(res, cr0_stat);
|
||||
stat = bus_read_1(res, cr0_istat);
|
||||
DELAY(1000);
|
||||
|
||||
if (((stat & INTR_SBR) == 0) ||
|
||||
(bus_space_read_1(sc->sc_iot, sc->sc_ioh, cr0_istat) & INTR_SBR))
|
||||
(bus_read_1(res, cr0_istat) & INTR_SBR))
|
||||
return ENODEV;
|
||||
|
||||
return 0;
|
||||
@ -481,8 +448,7 @@ ncv_msg(sc, ti, msg)
|
||||
struct targ_info *ti;
|
||||
u_int msg;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
struct ncv_targ_info *nti = (void *) ti;
|
||||
u_int hwcycle, period;
|
||||
|
||||
@ -512,9 +478,9 @@ ncv_msg(sc, ti, msg)
|
||||
nti->nti_reg_period = period & 0x1f;
|
||||
nti->nti_reg_offset = ti->ti_maxsynch.offset;
|
||||
|
||||
bus_space_write_1(iot, ioh, cr0_period, nti->nti_reg_period);
|
||||
bus_space_write_1(iot, ioh, cr0_offs, nti->nti_reg_offset);
|
||||
bus_space_write_1(iot, ioh, cr0_cfg3, nti->nti_reg_cfg3);
|
||||
bus_write_1(res, cr0_period, nti->nti_reg_period);
|
||||
bus_write_1(res, cr0_offs, nti->nti_reg_offset);
|
||||
bus_write_1(res, cr0_cfg3, nti->nti_reg_cfg3);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -588,18 +554,14 @@ ncv_setup_img(hw, dvcfg, hostid)
|
||||
}
|
||||
|
||||
int
|
||||
ncvprobesubr(iot, ioh, dvcfg, hsid)
|
||||
bus_space_tag_t iot;
|
||||
bus_space_handle_t ioh;
|
||||
u_int dvcfg;
|
||||
int hsid;
|
||||
ncvprobesubr(struct resource *res, u_int dvcfg, int hsid)
|
||||
{
|
||||
struct ncv_hw hwtab;
|
||||
|
||||
hwtab = ncv_template;
|
||||
if (ncv_setup_img(&hwtab, dvcfg, hsid))
|
||||
return 0;
|
||||
if (ncvhw_check(iot, ioh, &hwtab) != 0)
|
||||
if (ncvhw_check(res, &hwtab) != 0)
|
||||
return 0;
|
||||
|
||||
return 1;
|
||||
@ -630,15 +592,14 @@ ncv_setup_and_start_pio(sc, reqlen)
|
||||
struct ncv_softc *sc;
|
||||
u_int reqlen;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
|
||||
ncvhw_select_register_0(iot, ioh, &sc->sc_hw);
|
||||
ncvhw_set_count(iot, ioh, reqlen);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_TRANS | CMD_DMA);
|
||||
ncvhw_select_register_0(res, &sc->sc_hw);
|
||||
ncvhw_set_count(res, reqlen);
|
||||
bus_write_1(res, cr0_cmd, CMD_TRANS | CMD_DMA);
|
||||
|
||||
ncvhw_select_register_1(iot, ioh, &sc->sc_hw);
|
||||
bus_space_write_1(iot, ioh, cr1_fstat, FIFO_EN);
|
||||
ncvhw_select_register_1(res, &sc->sc_hw);
|
||||
bus_write_1(res, cr1_fstat, FIFO_EN);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -647,8 +608,7 @@ ncv_pdma_end(sc, ti)
|
||||
struct targ_info *ti;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
int len;
|
||||
|
||||
slp->sl_flags &= ~HW_PDMASTART;
|
||||
@ -660,9 +620,9 @@ ncv_pdma_end(sc, ti)
|
||||
|
||||
if (ti->ti_phase == PH_DATA)
|
||||
{
|
||||
len = ncvhw_get_count(sc->sc_iot, sc->sc_ioh);
|
||||
len = ncvhw_get_count(res);
|
||||
if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE)
|
||||
len += (bus_space_read_1(sc->sc_iot, sc->sc_ioh,
|
||||
len += (bus_read_1(res,
|
||||
cr0_sffl) & CR0_SFFLR_BMASK);
|
||||
|
||||
if ((u_int) len <= (u_int) sc->sc_sdatalen)
|
||||
@ -698,9 +658,9 @@ ncv_pdma_end(sc, ti)
|
||||
}
|
||||
|
||||
out:
|
||||
ncvhw_select_register_1(iot, ioh, &sc->sc_hw);
|
||||
bus_space_write_1(iot, ioh, cr1_fstat, 0);
|
||||
ncvhw_select_register_0(iot, ioh, &sc->sc_hw);
|
||||
ncvhw_select_register_1(res, &sc->sc_hw);
|
||||
bus_write_1(res, cr1_fstat, 0);
|
||||
ncvhw_select_register_0(res, &sc->sc_hw);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -710,8 +670,7 @@ ncv_pio_read(sc, buf, reqlen)
|
||||
u_int reqlen;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
int tout;
|
||||
register u_int8_t fstat;
|
||||
|
||||
@ -722,17 +681,17 @@ ncv_pio_read(sc, buf, reqlen)
|
||||
|
||||
while (reqlen >= FIFO_F_SZ && tout -- > 0)
|
||||
{
|
||||
fstat = bus_space_read_1(iot, ioh, cr1_fstat);
|
||||
fstat = bus_read_1(res, cr1_fstat);
|
||||
if (fstat == (u_int8_t) -1)
|
||||
goto out;
|
||||
if (fstat & FIFO_F)
|
||||
{
|
||||
#define NCV_FAST32_ACCESS
|
||||
#ifdef NCV_FAST32_ACCESS
|
||||
bus_space_read_multi_4(iot, ioh, cr1_fdata,
|
||||
bus_read_multi_4(res, cr1_fdata,
|
||||
(u_int32_t *) buf, FIFO_F_SZ / 4);
|
||||
#else /* !NCV_FAST32_ACCESS */
|
||||
bus_space_read_multi_2(iot, ioh, cr1_fdata,
|
||||
bus_read_multi_2(res, cr1_fdata,
|
||||
(u_int16_t *) buf, FIFO_F_SZ / 2);
|
||||
#endif /* !NCV_FAST32_ACCESS */
|
||||
buf += FIFO_F_SZ;
|
||||
@ -749,10 +708,10 @@ ncv_pio_read(sc, buf, reqlen)
|
||||
|
||||
while (reqlen > 0 && tout -- > 0)
|
||||
{
|
||||
fstat = bus_space_read_1(iot, ioh, cr1_fstat);
|
||||
fstat = bus_read_1(res, cr1_fstat);
|
||||
if ((fstat & FIFO_E) == 0)
|
||||
{
|
||||
*buf++ = bus_space_read_1(iot, ioh, cr1_fdata);
|
||||
*buf++ = bus_read_1(res, cr1_fdata);
|
||||
reqlen --;
|
||||
}
|
||||
else
|
||||
@ -765,7 +724,7 @@ ncv_pio_read(sc, buf, reqlen)
|
||||
}
|
||||
|
||||
out:
|
||||
ncvhw_select_register_0(iot, ioh, &sc->sc_hw);
|
||||
ncvhw_select_register_0(res, &sc->sc_hw);
|
||||
sc->sc_tdatalen = reqlen;
|
||||
}
|
||||
|
||||
@ -776,8 +735,7 @@ ncv_pio_write(sc, buf, reqlen)
|
||||
u_int reqlen;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
int tout;
|
||||
register u_int8_t fstat;
|
||||
|
||||
@ -788,17 +746,17 @@ ncv_pio_write(sc, buf, reqlen)
|
||||
|
||||
while (reqlen >= FIFO_F_SZ && tout -- > 0)
|
||||
{
|
||||
fstat = bus_space_read_1(iot, ioh, cr1_fstat);
|
||||
fstat = bus_read_1(res, cr1_fstat);
|
||||
if (fstat & FIFO_BRK)
|
||||
goto done;
|
||||
|
||||
if ((fstat & FIFO_E) != 0)
|
||||
{
|
||||
#ifdef NCV_FAST32_ACCESS
|
||||
bus_space_write_multi_4(iot, ioh, cr1_fdata,
|
||||
bus_write_multi_4(res, cr1_fdata,
|
||||
(u_int32_t *) buf, FIFO_F_SZ / 4);
|
||||
#else /* !NCV_FAST32_ACCESS */
|
||||
bus_space_write_multi_2(iot, ioh, cr1_fdata,
|
||||
bus_write_multi_2(res, cr1_fdata,
|
||||
(u_int16_t *) buf, FIFO_F_SZ / 2);
|
||||
#endif /* !NCV_FAST32_ACCESS */
|
||||
buf += FIFO_F_SZ;
|
||||
@ -812,13 +770,13 @@ ncv_pio_write(sc, buf, reqlen)
|
||||
|
||||
while (reqlen > 0 && tout -- > 0)
|
||||
{
|
||||
fstat = bus_space_read_1(iot, ioh, cr1_fstat);
|
||||
fstat = bus_read_1(res, cr1_fstat);
|
||||
if (fstat & FIFO_BRK)
|
||||
break;
|
||||
|
||||
if ((fstat & FIFO_F) == 0) /* fifo not full */
|
||||
{
|
||||
bus_space_write_1(iot, ioh, cr1_fdata, *buf++);
|
||||
bus_write_1(res, cr1_fdata, *buf++);
|
||||
reqlen --;
|
||||
}
|
||||
else
|
||||
@ -828,7 +786,7 @@ ncv_pio_write(sc, buf, reqlen)
|
||||
}
|
||||
|
||||
done:
|
||||
ncvhw_select_register_0(iot, ioh, &sc->sc_hw);
|
||||
ncvhw_select_register_0(res, &sc->sc_hw);
|
||||
}
|
||||
|
||||
/**************************************************************
|
||||
@ -839,19 +797,18 @@ ncv_reselected(sc)
|
||||
struct ncv_softc *sc;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
struct targ_info *ti;
|
||||
u_int sid;
|
||||
|
||||
if ((bus_space_read_1(iot, ioh, cr0_sffl) & CR0_SFFLR_BMASK) != 2)
|
||||
if ((bus_read_1(res, cr0_sffl) & CR0_SFFLR_BMASK) != 2)
|
||||
{
|
||||
device_printf(slp->sl_dev, "illegal fifo bytes\n");
|
||||
scsi_low_restart(slp, SCSI_LOW_RESTART_HARD, "chip confused");
|
||||
return EJUSTRETURN;
|
||||
}
|
||||
|
||||
sid = (u_int) bus_space_read_1(iot, ioh, cr0_sfifo);
|
||||
sid = (u_int) bus_read_1(res, cr0_sfifo);
|
||||
sid &= ~(1 << slp->sl_hostid);
|
||||
sid = ffs(sid) - 1;
|
||||
ti = scsi_low_reselected((struct scsi_low_softc *) sc, sid);
|
||||
@ -861,7 +818,7 @@ ncv_reselected(sc)
|
||||
#ifdef NCV_STATICS
|
||||
ncv_statics.reselect ++;
|
||||
#endif /* NCV_STATICS */
|
||||
bus_space_write_1(iot, ioh, cr0_dstid, sid);
|
||||
bus_write_1(res, cr0_dstid, sid);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -871,11 +828,10 @@ ncv_disconnected(sc, ti)
|
||||
struct targ_info *ti;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_FLUSH);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_ENSEL);
|
||||
bus_write_1(res, cr0_cmd, CMD_FLUSH);
|
||||
bus_write_1(res, cr0_cmd, CMD_ENSEL);
|
||||
|
||||
#ifdef NCV_STATICS
|
||||
ncv_statics.disconnect ++;
|
||||
@ -895,12 +851,11 @@ ncv_target_nexus_establish(sc)
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
struct targ_info *ti = slp->sl_Tnexus;
|
||||
struct ncv_targ_info *nti = (void *) ti;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
|
||||
bus_space_write_1(iot, ioh, cr0_period, nti->nti_reg_period);
|
||||
bus_space_write_1(iot, ioh, cr0_offs, nti->nti_reg_offset);
|
||||
bus_space_write_1(iot, ioh, cr0_cfg3, nti->nti_reg_cfg3);
|
||||
bus_write_1(res, cr0_period, nti->nti_reg_period);
|
||||
bus_write_1(res, cr0_offs, nti->nti_reg_offset);
|
||||
bus_write_1(res, cr0_cfg3, nti->nti_reg_cfg3);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -927,14 +882,13 @@ static int
|
||||
ncv_catch_intr(sc)
|
||||
struct ncv_softc *sc;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
int wc;
|
||||
register u_int8_t status;
|
||||
|
||||
for (wc = 0; wc < NCV_DELAY_MAX / NCV_DELAY_INTERVAL; wc ++)
|
||||
{
|
||||
status = bus_space_read_1(iot, ioh, cr0_stat);
|
||||
status = bus_read_1(res, cr0_stat);
|
||||
if ((status & STAT_INT) != 0)
|
||||
return 0;
|
||||
|
||||
@ -949,8 +903,7 @@ ncvintr(arg)
|
||||
{
|
||||
struct ncv_softc *sc = arg;
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct resource *res = sc->port_res;
|
||||
struct targ_info *ti;
|
||||
struct buf *bp;
|
||||
u_int derror, flags;
|
||||
@ -964,19 +917,19 @@ ncvintr(arg)
|
||||
/********************************************
|
||||
* Status
|
||||
********************************************/
|
||||
ncvhw_select_register_0(iot, ioh, &sc->sc_hw);
|
||||
status = bus_space_read_1(iot, ioh, cr0_stat);
|
||||
ncvhw_select_register_0(res, &sc->sc_hw);
|
||||
status = bus_read_1(res, cr0_stat);
|
||||
if ((status & STAT_INT) == 0 || status == (u_int8_t) -1)
|
||||
return 0;
|
||||
|
||||
ireason = bus_space_read_1(iot, ioh, cr0_istat);
|
||||
ireason = bus_read_1(res, cr0_istat);
|
||||
if ((ireason & INTR_SBR) != 0)
|
||||
{
|
||||
u_int8_t val;
|
||||
|
||||
/* avoid power off hangup */
|
||||
val = bus_space_read_1(iot, ioh, cr0_cfg1);
|
||||
bus_space_write_1(iot, ioh, cr0_cfg1, val | C1_SRR);
|
||||
val = bus_read_1(res, cr0_cfg1);
|
||||
bus_write_1(res, cr0_cfg1, val | C1_SRR);
|
||||
|
||||
/* status init */
|
||||
scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT,
|
||||
@ -1183,16 +1136,16 @@ ncvintr(arg)
|
||||
scsi_low_attention(slp);
|
||||
}
|
||||
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_FLUSH);
|
||||
ncvhw_fpush(iot, ioh,
|
||||
bus_write_1(res, cr0_cmd, CMD_FLUSH);
|
||||
ncvhw_fpush(res,
|
||||
slp->sl_scp.scp_cmd, slp->sl_scp.scp_cmdlen);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_TRANS);
|
||||
bus_write_1(res, cr0_cmd, CMD_TRANS);
|
||||
break;
|
||||
|
||||
case STATUS_PHASE: /* status in */
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_FLUSH);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_ICCS);
|
||||
bus_write_1(res, cr0_cmd, CMD_FLUSH);
|
||||
bus_write_1(res, cr0_cmd, CMD_ICCS);
|
||||
sc->sc_compseq = 1;
|
||||
break;
|
||||
|
||||
@ -1201,7 +1154,7 @@ ncvintr(arg)
|
||||
|
||||
case MESSAGE_OUT_PHASE: /* msg out */
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_FLUSH);
|
||||
bus_write_1(res, cr0_cmd, CMD_FLUSH);
|
||||
|
||||
flags = SCSI_LOW_MSGOUT_UNIFY;
|
||||
if (ti->ti_ophase != ti->ti_phase)
|
||||
@ -1213,21 +1166,21 @@ ncvintr(arg)
|
||||
scsi_low_attention(slp);
|
||||
}
|
||||
|
||||
ncvhw_fpush(iot, ioh, ti->ti_msgoutstr, len);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_TRANS);
|
||||
ncvhw_fpush(res, ti->ti_msgoutstr, len);
|
||||
bus_write_1(res, cr0_cmd, CMD_TRANS);
|
||||
SCSI_LOW_DEASSERT_ATN(slp);
|
||||
break;
|
||||
|
||||
case MESSAGE_IN_PHASE: /* msg in */
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
|
||||
|
||||
len = bus_space_read_1(iot, ioh, cr0_sffl) & CR0_SFFLR_BMASK;
|
||||
len = bus_read_1(res, cr0_sffl) & CR0_SFFLR_BMASK;
|
||||
if (sc->sc_compseq != 0)
|
||||
{
|
||||
sc->sc_compseq = 0;
|
||||
if ((ireason & INTR_FC) && len == 2)
|
||||
{
|
||||
regv = bus_space_read_1(iot, ioh, cr0_sfifo);
|
||||
regv = bus_read_1(res, cr0_sfifo);
|
||||
scsi_low_statusin(slp, ti, regv | derror);
|
||||
len --;
|
||||
}
|
||||
@ -1236,15 +1189,14 @@ ncvintr(arg)
|
||||
slp->sl_error |= FATALIO;
|
||||
scsi_low_assert_msg(slp, ti,
|
||||
SCSI_LOW_MSG_ABORT, 1);
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh,
|
||||
cr0_cmd, CMD_MSGOK);
|
||||
bus_write_1(res, cr0_cmd, CMD_MSGOK);
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (ireason & INTR_BS)
|
||||
{
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_FLUSH);
|
||||
bus_space_write_1(iot, ioh, cr0_cmd, CMD_TRANS);
|
||||
bus_write_1(res, cr0_cmd, CMD_FLUSH);
|
||||
bus_write_1(res, cr0_cmd, CMD_TRANS);
|
||||
if ((ncv_io_control & NCV_FAST_INTERRUPTS) != 0)
|
||||
{
|
||||
if (ncv_catch_intr(sc) == 0)
|
||||
@ -1255,8 +1207,7 @@ ncvintr(arg)
|
||||
|
||||
if ((ireason & INTR_FC) && len == 1)
|
||||
{
|
||||
regv = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
|
||||
cr0_sfifo);
|
||||
regv = bus_read_1(res, cr0_sfifo);
|
||||
if (scsi_low_msgin(slp, ti, regv | derror) == 0)
|
||||
{
|
||||
if (scsi_low_is_msgout_continue(ti, 0) != 0)
|
||||
@ -1264,8 +1215,7 @@ ncvintr(arg)
|
||||
scsi_low_attention(slp);
|
||||
}
|
||||
}
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh, cr0_cmd,
|
||||
CMD_MSGOK);
|
||||
bus_write_1(res, cr0_cmd, CMD_MSGOK);
|
||||
if ((ncv_io_control & NCV_FAST_INTERRUPTS) != 0)
|
||||
{
|
||||
/* XXX:
|
||||
@ -1279,8 +1229,7 @@ ncvintr(arg)
|
||||
{
|
||||
slp->sl_error |= FATALIO;
|
||||
scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1);
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh, cr0_cmd,
|
||||
CMD_MSGOK);
|
||||
bus_write_1(res, cr0_cmd, CMD_MSGOK);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
@ -98,7 +98,12 @@ static const struct ncv_product {
|
||||
static void
|
||||
ncv_pccard_intr(void * arg)
|
||||
{
|
||||
struct ncv_softc *sc;
|
||||
|
||||
sc = arg;
|
||||
SCSI_LOW_LOCK(&sc->sc_sclow);
|
||||
ncvintr(arg);
|
||||
SCSI_LOW_UNLOCK(&sc->sc_sclow);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -129,6 +134,7 @@ ncv_release_resource(device_t dev)
|
||||
bus_release_resource(dev, SYS_RES_MEMORY,
|
||||
sc->mem_rid, sc->mem_res);
|
||||
}
|
||||
mtx_destroy(&sc->sc_sclow.sl_lock);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -148,6 +154,7 @@ ncv_alloc_resource(device_t dev)
|
||||
return(ENOMEM);
|
||||
}
|
||||
|
||||
mtx_init(&sc->sc_sclow.sl_lock, "ncv", NULL, MTX_DEF);
|
||||
sc->port_rid = 0;
|
||||
sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
|
||||
ioaddr+offset, ioaddr+iosize-offset,
|
||||
@ -223,7 +230,7 @@ ncv_pccard_probe(device_t dev)
|
||||
strncmp(prodstr, "SOUND/SCSI2 CARD", 16) == 0) {
|
||||
device_set_desc(dev, "RATOC REX-5572");
|
||||
device_set_flags(dev, FLAGS_REX5572);
|
||||
return (0);
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
}
|
||||
return(EIO);
|
||||
}
|
||||
@ -234,8 +241,6 @@ ncv_pccard_attach(device_t dev)
|
||||
struct ncv_softc *sc = device_get_softc(dev);
|
||||
int error;
|
||||
|
||||
bzero(sc, sizeof(struct ncv_softc));
|
||||
|
||||
error = ncv_alloc_resource(dev);
|
||||
if (error) {
|
||||
return(error);
|
||||
@ -245,8 +250,8 @@ ncv_pccard_attach(device_t dev)
|
||||
ncv_release_resource(dev);
|
||||
return(ENXIO);
|
||||
}
|
||||
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_CAM | INTR_ENTROPY,
|
||||
NULL, ncv_pccard_intr, (void *)sc, &sc->ncv_intrhand);
|
||||
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_CAM | INTR_ENTROPY |
|
||||
INTR_MPSAFE, NULL, ncv_pccard_intr, sc, &sc->ncv_intrhand);
|
||||
if (error) {
|
||||
ncv_release_resource(dev);
|
||||
return(error);
|
||||
@ -293,12 +298,9 @@ static void
|
||||
ncv_card_unload(device_t devi)
|
||||
{
|
||||
struct ncv_softc *sc = device_get_softc(devi);
|
||||
intrmask_t s;
|
||||
|
||||
s = splcam();
|
||||
scsi_low_deactivate((struct scsi_low_softc *)sc);
|
||||
scsi_low_dettach(&sc->sc_sclow);
|
||||
splx(s);
|
||||
scsi_low_deactivate(&sc->sc_sclow);
|
||||
scsi_low_detach(&sc->sc_sclow);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -308,8 +310,7 @@ ncvprobe(device_t devi)
|
||||
struct ncv_softc *sc = device_get_softc(devi);
|
||||
u_int32_t flags = device_get_flags(devi);
|
||||
|
||||
rv = ncvprobesubr(rman_get_bustag(sc->port_res),
|
||||
rman_get_bushandle(sc->port_res),
|
||||
rv = ncvprobesubr(sc->port_res,
|
||||
flags, NCV_HOSTID);
|
||||
|
||||
return rv;
|
||||
@ -321,27 +322,15 @@ ncvattach(device_t devi)
|
||||
struct ncv_softc *sc;
|
||||
struct scsi_low_softc *slp;
|
||||
u_int32_t flags = device_get_flags(devi);
|
||||
intrmask_t s;
|
||||
char dvname[16]; /* SCSI_LOW_DVNAME_LEN */
|
||||
|
||||
strcpy(dvname, "ncv");
|
||||
|
||||
sc = device_get_softc(devi);
|
||||
if (sc == NULL) {
|
||||
return(0);
|
||||
}
|
||||
|
||||
slp = &sc->sc_sclow;
|
||||
slp->sl_dev = devi;
|
||||
sc->sc_iot = rman_get_bustag(sc->port_res);
|
||||
sc->sc_ioh = rman_get_bushandle(sc->port_res);
|
||||
|
||||
slp->sl_hostid = NCV_HOSTID;
|
||||
slp->sl_cfgflags = flags;
|
||||
|
||||
s = splcam();
|
||||
ncvattachsubr(sc);
|
||||
splx(s);
|
||||
|
||||
return(NCVIOSZ);
|
||||
}
|
||||
|
@ -42,10 +42,6 @@
|
||||
struct ncv_softc {
|
||||
struct scsi_low_softc sc_sclow; /* generic data */
|
||||
|
||||
bus_space_tag_t sc_iot;
|
||||
bus_space_tag_t sc_memt;
|
||||
bus_space_handle_t sc_ioh;
|
||||
|
||||
int port_rid;
|
||||
int port_rid_dmy;
|
||||
int irq_rid;
|
||||
@ -80,7 +76,7 @@ struct ncv_targ_info {
|
||||
/*****************************************************************
|
||||
* Proto
|
||||
*****************************************************************/
|
||||
int ncvprobesubr(bus_space_tag_t, bus_space_handle_t ioh, u_int, int);
|
||||
int ncvprobesubr(struct resource *, u_int, int);
|
||||
void ncvattachsubr(struct ncv_softc *);
|
||||
int ncvintr(void *);
|
||||
|
||||
|
@ -50,6 +50,7 @@ __FBSDID("$FreeBSD$");
|
||||
#include <sys/queue.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/errno.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <machine/cpu.h>
|
||||
#include <machine/bus.h>
|
||||
@ -178,45 +179,36 @@ struct scsi_low_funcs nspfuncs = {
|
||||
/****************************************************
|
||||
* hwfuncs
|
||||
****************************************************/
|
||||
static __inline u_int8_t nsp_cr_read_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_addr_t ofs);
|
||||
static __inline void nsp_cr_write_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_addr_t ofs, u_int8_t va);
|
||||
|
||||
static __inline u_int8_t
|
||||
nsp_cr_read_1(bst, bsh, ofs)
|
||||
bus_space_tag_t bst;
|
||||
bus_space_handle_t bsh;
|
||||
bus_addr_t ofs;
|
||||
static __inline uint8_t
|
||||
nsp_cr_read_1(struct resource *res, bus_addr_t ofs)
|
||||
{
|
||||
|
||||
bus_space_write_1(bst, bsh, nsp_idxr, ofs);
|
||||
return bus_space_read_1(bst, bsh, nsp_datar);
|
||||
bus_write_1(res, nsp_idxr, ofs);
|
||||
return bus_read_1(res, nsp_datar);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
nsp_cr_write_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_addr_t ofs,
|
||||
u_int8_t va)
|
||||
nsp_cr_write_1(struct resource *res, bus_addr_t ofs, uint8_t va)
|
||||
{
|
||||
|
||||
bus_space_write_1(bst, bsh, nsp_idxr, ofs);
|
||||
bus_space_write_1(bst, bsh, nsp_datar, va);
|
||||
bus_write_1(res, nsp_idxr, ofs);
|
||||
bus_write_1(res, nsp_datar, va);
|
||||
}
|
||||
|
||||
static int
|
||||
nsp_expect_signal(struct nsp_softc *sc, u_int8_t curphase, u_int8_t mask)
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
int wc;
|
||||
u_int8_t ph, isrc;
|
||||
|
||||
for (wc = 0; wc < NSP_DELAY_MAX / NSP_DELAY_INTERVAL; wc ++)
|
||||
{
|
||||
ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
|
||||
ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
|
||||
if (ph == (u_int8_t) -1)
|
||||
return -1;
|
||||
|
||||
isrc = bus_space_read_1(bst, bsh, nsp_irqsr);
|
||||
isrc = bus_read_1(sc->port_res, nsp_irqsr);
|
||||
if (isrc & IRQSR_SCSI)
|
||||
return 0;
|
||||
|
||||
@ -234,42 +226,40 @@ static void
|
||||
nsphw_init(sc)
|
||||
struct nsp_softc *sc;
|
||||
{
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
|
||||
/* block all interrupts */
|
||||
bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_ALLMASK);
|
||||
bus_write_1(sc->port_res, nsp_irqcr, IRQCR_ALLMASK);
|
||||
|
||||
/* setup SCSI interface */
|
||||
bus_space_write_1(bst, bsh, nsp_ifselr, IFSELR_IFSEL);
|
||||
bus_write_1(sc->port_res, nsp_ifselr, IFSELR_IFSEL);
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCIENR, 0);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCIENR, 0);
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_XFERMR, XFERMR_IO8);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_CLKDIVR, sc->sc_iclkdiv);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_XFERMR, XFERMR_IO8);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_CLKDIVR, sc->sc_iclkdiv);
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCIENR, sc->sc_icr);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_PARITYR, sc->sc_parr);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_PTCLRR,
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCIENR, sc->sc_icr);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_PARITYR, sc->sc_parr);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_PTCLRR,
|
||||
PTCLRR_ACK | PTCLRR_REQ | PTCLRR_HOST | PTCLRR_RSS);
|
||||
|
||||
/* setup fifo asic */
|
||||
bus_space_write_1(bst, bsh, nsp_ifselr, IFSELR_REGSEL);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_TERMPWRC, 0);
|
||||
if ((nsp_cr_read_1(bst, bsh, NSPR_OCR) & OCR_TERMPWRS) == 0)
|
||||
nsp_cr_write_1(bst, bsh, NSPR_TERMPWRC, TERMPWRC_POWON);
|
||||
bus_write_1(sc->port_res, nsp_ifselr, IFSELR_REGSEL);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_TERMPWRC, 0);
|
||||
if ((nsp_cr_read_1(sc->port_res, NSPR_OCR) & OCR_TERMPWRS) == 0)
|
||||
nsp_cr_write_1(sc->port_res, NSPR_TERMPWRC, TERMPWRC_POWON);
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_XFERMR, XFERMR_IO8);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_CLKDIVR, sc->sc_clkdiv);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, 0);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, 0);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_XFERMR, XFERMR_IO8);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_CLKDIVR, sc->sc_clkdiv);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_TIMERCNT, 0);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_TIMERCNT, 0);
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SYNCR, 0);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_ACKWIDTH, 0);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SYNCR, 0);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_ACKWIDTH, 0);
|
||||
|
||||
/* enable interrupts and ack them */
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCIENR, sc->sc_icr);
|
||||
bus_space_write_1(bst, bsh, nsp_irqcr, IRQSR_MASK);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCIENR, sc->sc_icr);
|
||||
bus_write_1(sc->port_res, nsp_irqcr, IRQSR_MASK);
|
||||
|
||||
nsp_setup_fifo(sc, NSP_FIFO_OFF, SCSI_LOW_READ, 0);
|
||||
}
|
||||
@ -281,12 +271,10 @@ static void
|
||||
nsphw_attention(sc)
|
||||
struct nsp_softc *sc;
|
||||
{
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
u_int8_t cr;
|
||||
|
||||
cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR)/* & ~SCBUSCR_ACK */;
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr | SCBUSCR_ATN);
|
||||
cr = nsp_cr_read_1(sc->port_res, NSPR_SCBUSCR)/* & ~SCBUSCR_ACK */;
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr | SCBUSCR_ATN);
|
||||
DELAY(10);
|
||||
}
|
||||
|
||||
@ -294,19 +282,17 @@ static void
|
||||
nsphw_bus_reset(sc)
|
||||
struct nsp_softc *sc;
|
||||
{
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
int i;
|
||||
|
||||
bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_ALLMASK);
|
||||
bus_write_1(sc->port_res, nsp_irqcr, IRQCR_ALLMASK);
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, SCBUSCR_RST);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, SCBUSCR_RST);
|
||||
DELAY(100 * 1000); /* 100ms */
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, 0);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, 0);
|
||||
for (i = 0; i < 5; i ++)
|
||||
(void) nsp_cr_read_1(bst, bsh, NSPR_IRQPHS);
|
||||
(void) nsp_cr_read_1(sc->port_res, NSPR_IRQPHS);
|
||||
|
||||
bus_space_write_1(bst, bsh, nsp_irqcr, IRQSR_MASK);
|
||||
bus_write_1(sc->port_res, nsp_irqcr, IRQSR_MASK);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -314,19 +300,17 @@ nsphw_selection_done_and_expect_msgout(sc)
|
||||
struct nsp_softc *sc;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
|
||||
/* clear ack counter */
|
||||
sc->sc_cnt = 0;
|
||||
nsp_cr_write_1(bst, bsh, NSPR_PTCLRR, PTCLRR_PT | PTCLRR_ACK |
|
||||
nsp_cr_write_1(sc->port_res, NSPR_PTCLRR, PTCLRR_PT | PTCLRR_ACK |
|
||||
PTCLRR_REQ | PTCLRR_HOST);
|
||||
|
||||
/* deassert sel and assert atten */
|
||||
sc->sc_seltout = 0;
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, sc->sc_busc);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, sc->sc_busc);
|
||||
DELAY(1);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR,
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR,
|
||||
sc->sc_busc | SCBUSCR_ADIR | SCBUSCR_ACKEN);
|
||||
SCSI_LOW_ASSERT_ATN(slp);
|
||||
}
|
||||
@ -337,21 +321,17 @@ nsphw_start_selection(sc, cb)
|
||||
struct slccb *cb;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
struct targ_info *ti = cb->ti;
|
||||
register u_int8_t arbs, ph;
|
||||
int s, wc;
|
||||
int wc;
|
||||
|
||||
wc = sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
|
||||
sc->sc_dataout_timeout = 0;
|
||||
|
||||
/* check bus free */
|
||||
s = splhigh();
|
||||
ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
|
||||
ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
|
||||
if (ph != SCBUSMON_FREE)
|
||||
{
|
||||
splx(s);
|
||||
#ifdef NSP_STATICS
|
||||
nsp_statics.arbit_conflict_1 ++;
|
||||
#endif /* NSP_STATICS */
|
||||
@ -359,21 +339,20 @@ nsphw_start_selection(sc, cb)
|
||||
}
|
||||
|
||||
/* start arbitration */
|
||||
nsp_cr_write_1(bst, bsh, NSPR_ARBITS, ARBITS_EXEC);
|
||||
splx(s);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_ARBITS, ARBITS_EXEC);
|
||||
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART);
|
||||
do
|
||||
{
|
||||
/* XXX: what a stupid chip! */
|
||||
arbs = nsp_cr_read_1(bst, bsh, NSPR_ARBITS);
|
||||
arbs = nsp_cr_read_1(sc->port_res, NSPR_ARBITS);
|
||||
DELAY(1);
|
||||
}
|
||||
while ((arbs & (ARBITS_WIN | ARBITS_FAIL)) == 0 && wc -- > 0);
|
||||
|
||||
if ((arbs & ARBITS_WIN) == 0)
|
||||
{
|
||||
nsp_cr_write_1(bst, bsh, NSPR_ARBITS, ARBITS_CLR);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_ARBITS, ARBITS_CLR);
|
||||
#ifdef NSP_STATICS
|
||||
nsp_statics.arbit_conflict_2 ++;
|
||||
#endif /* NSP_STATICS */
|
||||
@ -384,18 +363,17 @@ nsphw_start_selection(sc, cb)
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
|
||||
scsi_low_arbit_win(slp);
|
||||
|
||||
s = splhigh();
|
||||
DELAY(3);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_DATA,
|
||||
nsp_cr_write_1(sc->port_res, NSPR_DATA,
|
||||
sc->sc_idbit | (1 << ti->ti_id));
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR,
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR,
|
||||
SCBUSCR_SEL | SCBUSCR_BSY | sc->sc_busc);
|
||||
DELAY(3);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, SCBUSCR_SEL |
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, SCBUSCR_SEL |
|
||||
SCBUSCR_BSY | SCBUSCR_DOUT | sc->sc_busc);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_ARBITS, ARBITS_CLR);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_ARBITS, ARBITS_CLR);
|
||||
DELAY(3);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR,
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR,
|
||||
SCBUSCR_SEL | SCBUSCR_DOUT | sc->sc_busc);
|
||||
DELAY(1);
|
||||
|
||||
@ -408,7 +386,7 @@ nsphw_start_selection(sc, cb)
|
||||
for (wc = 0; wc < NSP_FIRST_SEL_WAIT / NSP_SEL_CHECK_INTERVAL;
|
||||
wc ++)
|
||||
{
|
||||
ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
|
||||
ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
|
||||
if ((ph & SCBUSMON_BSY) == 0)
|
||||
{
|
||||
DELAY(NSP_SEL_CHECK_INTERVAL);
|
||||
@ -416,18 +394,16 @@ nsphw_start_selection(sc, cb)
|
||||
}
|
||||
|
||||
DELAY(1);
|
||||
ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
|
||||
ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
|
||||
if ((ph & SCBUSMON_BSY) != 0)
|
||||
{
|
||||
nsphw_selection_done_and_expect_msgout(sc);
|
||||
splx(s);
|
||||
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
|
||||
return SCSI_LOW_START_OK;
|
||||
}
|
||||
}
|
||||
}
|
||||
splx(s);
|
||||
|
||||
/* check a selection timeout */
|
||||
nsp_start_timer(sc, NSP_TIMER_1MS);
|
||||
@ -491,8 +467,6 @@ nsp_msg(sc, ti, msg)
|
||||
struct targ_info *ti;
|
||||
u_int msg;
|
||||
{
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
struct ncp_synch_data *sdp;
|
||||
struct nsp_targ_info *nti = (void *) ti;
|
||||
u_int period, offset;
|
||||
@ -544,8 +518,8 @@ nsp_msg(sc, ti, msg)
|
||||
error = 0;
|
||||
}
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SYNCR, nti->nti_reg_syncr);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_ACKWIDTH, nti->nti_reg_ackwidth);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SYNCR, nti->nti_reg_syncr);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_ACKWIDTH, nti->nti_reg_ackwidth);
|
||||
return error;
|
||||
}
|
||||
|
||||
@ -573,25 +547,20 @@ nsp_start_timer(sc, time)
|
||||
struct nsp_softc *sc;
|
||||
int time;
|
||||
{
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
|
||||
sc->sc_timer = time;
|
||||
nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, time);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_TIMERCNT, time);
|
||||
}
|
||||
|
||||
/**************************************************************
|
||||
* General probe attach
|
||||
**************************************************************/
|
||||
int
|
||||
nspprobesubr(iot, ioh, dvcfg)
|
||||
bus_space_tag_t iot;
|
||||
bus_space_handle_t ioh;
|
||||
u_int dvcfg;
|
||||
nspprobesubr(struct resource *res, u_int dvcfg)
|
||||
{
|
||||
u_int8_t regv;
|
||||
|
||||
regv = bus_space_read_1(iot, ioh, nsp_fifosr);
|
||||
regv = bus_read_1(res, nsp_fifosr);
|
||||
if (regv < 0x11 || regv >= 0x20)
|
||||
return 0;
|
||||
return 1;
|
||||
@ -603,8 +572,6 @@ nspattachsubr(sc)
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
|
||||
printf("\n");
|
||||
|
||||
sc->sc_idbit = (1 << slp->sl_hostid);
|
||||
slp->sl_flags |= HW_READ_PADDING;
|
||||
slp->sl_funcs = &nspfuncs;
|
||||
@ -621,14 +588,12 @@ static u_int
|
||||
nsp_fifo_count(sc)
|
||||
struct nsp_softc *sc;
|
||||
{
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
u_int count;
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_PTCLRR, PTCLRR_RSS_ACK | PTCLRR_PT);
|
||||
count = bus_space_read_1(bst, bsh, nsp_datar);
|
||||
count += (((u_int) bus_space_read_1(bst, bsh, nsp_datar)) << 8);
|
||||
count += (((u_int) bus_space_read_1(bst, bsh, nsp_datar)) << 16);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_PTCLRR, PTCLRR_RSS_ACK | PTCLRR_PT);
|
||||
count = bus_read_1(sc->port_res, nsp_datar);
|
||||
count += (((u_int) bus_read_1(sc->port_res, nsp_datar)) << 8);
|
||||
count += (((u_int) bus_read_1(sc->port_res, nsp_datar)) << 16);
|
||||
return count;
|
||||
}
|
||||
|
||||
@ -636,14 +601,12 @@ static u_int
|
||||
nsp_request_count(sc)
|
||||
struct nsp_softc *sc;
|
||||
{
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
u_int count;
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_PTCLRR, PTCLRR_RSS_REQ | PTCLRR_PT);
|
||||
count = bus_space_read_1(bst, bsh, nsp_datar);
|
||||
count += (((u_int) bus_space_read_1(bst, bsh, nsp_datar)) << 8);
|
||||
count += (((u_int) bus_space_read_1(bst, bsh, nsp_datar)) << 16);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_PTCLRR, PTCLRR_RSS_REQ | PTCLRR_PT);
|
||||
count = bus_read_1(sc->port_res, nsp_datar);
|
||||
count += (((u_int) bus_read_1(sc->port_res, nsp_datar)) << 8);
|
||||
count += (((u_int) bus_read_1(sc->port_res, nsp_datar)) << 16);
|
||||
return count;
|
||||
}
|
||||
|
||||
@ -683,7 +646,7 @@ nsp_setup_fifo(sc, on, direction, datalen)
|
||||
/* determine a transfer type */
|
||||
if (datalen < DEV_BSIZE || (datalen & 3) != 0)
|
||||
{
|
||||
if (sc->sc_memh != 0 &&
|
||||
if (sc->mem_res != NULL &&
|
||||
(nsp_io_control & NSP_USE_MEMIO) != 0)
|
||||
xfermode = XFERMR_XEN | XFERMR_MEM8;
|
||||
else
|
||||
@ -691,7 +654,7 @@ nsp_setup_fifo(sc, on, direction, datalen)
|
||||
}
|
||||
else
|
||||
{
|
||||
if (sc->sc_memh != 0 &&
|
||||
if (sc->mem_res != NULL &&
|
||||
(nsp_io_control & NSP_USE_MEMIO) != 0)
|
||||
xfermode = XFERMR_XEN | XFERMR_MEM32;
|
||||
else
|
||||
@ -703,7 +666,7 @@ nsp_setup_fifo(sc, on, direction, datalen)
|
||||
|
||||
out:
|
||||
sc->sc_xfermr = xfermode;
|
||||
nsp_cr_write_1(sc->sc_iot, sc->sc_ioh, NSPR_XFERMR, sc->sc_xfermr);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_XFERMR, sc->sc_xfermr);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -721,7 +684,7 @@ nsp_pdma_end(sc, ti)
|
||||
if ((sc->sc_icr & SCIENR_FIFO) != 0)
|
||||
{
|
||||
sc->sc_icr &= ~SCIENR_FIFO;
|
||||
nsp_cr_write_1(sc->sc_iot, sc->sc_ioh, NSPR_SCIENR, sc->sc_icr);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCIENR, sc->sc_icr);
|
||||
}
|
||||
|
||||
if (cb == NULL)
|
||||
@ -783,24 +746,22 @@ nsp_data_padding(sc, direction, count)
|
||||
int direction;
|
||||
u_int count;
|
||||
{
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
|
||||
if (count > NSP_MAX_DATA_SIZE)
|
||||
count = NSP_MAX_DATA_SIZE;
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_XFERMR, XFERMR_XEN | XFERMR_IO8);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_XFERMR, XFERMR_XEN | XFERMR_IO8);
|
||||
if (direction == SCSI_LOW_READ)
|
||||
{
|
||||
while (count -- > 0)
|
||||
(void) bus_space_read_1(bst, bsh, nsp_fifodr);
|
||||
(void) bus_read_1(sc->port_res, nsp_fifodr);
|
||||
}
|
||||
else
|
||||
{
|
||||
while (count -- > 0)
|
||||
(void) bus_space_write_1(bst, bsh, nsp_fifodr, 0);
|
||||
(void) bus_write_1(sc->port_res, nsp_fifodr, 0);
|
||||
}
|
||||
nsp_cr_write_1(bst, bsh, NSPR_XFERMR, sc->sc_xfermr);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_XFERMR, sc->sc_xfermr);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -809,8 +770,6 @@ nsp_read_fifo(sc, suspendio)
|
||||
int suspendio;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
u_int res;
|
||||
|
||||
res = nsp_fifo_count(sc);
|
||||
@ -857,12 +816,12 @@ nsp_read_fifo(sc, suspendio)
|
||||
if ((sc->sc_xfermr & XFERMR_MEM32) != 0)
|
||||
{
|
||||
res &= ~3;
|
||||
bus_space_read_region_4(sc->sc_memt, sc->sc_memh, 0,
|
||||
bus_read_region_4(sc->mem_res, 0,
|
||||
(u_int32_t *) slp->sl_scp.scp_data, res >> 2);
|
||||
}
|
||||
else
|
||||
{
|
||||
bus_space_read_region_1(sc->sc_memt, sc->sc_memh, 0,
|
||||
bus_read_region_1(sc->mem_res, 0,
|
||||
(u_int8_t *) slp->sl_scp.scp_data, res);
|
||||
}
|
||||
}
|
||||
@ -871,19 +830,19 @@ nsp_read_fifo(sc, suspendio)
|
||||
if ((sc->sc_xfermr & XFERMR_IO32) != 0)
|
||||
{
|
||||
res &= ~3;
|
||||
bus_space_read_multi_4(bst, bsh, nsp_fifodr,
|
||||
bus_read_multi_4(sc->port_res, nsp_fifodr,
|
||||
(u_int32_t *) slp->sl_scp.scp_data, res >> 2);
|
||||
}
|
||||
else
|
||||
{
|
||||
bus_space_read_multi_1(bst, bsh, nsp_fifodr,
|
||||
bus_read_multi_1(sc->port_res, nsp_fifodr,
|
||||
(u_int8_t *) slp->sl_scp.scp_data, res);
|
||||
}
|
||||
}
|
||||
|
||||
if (nsp_cr_read_1(bst, bsh, NSPR_PARITYR) & PARITYR_PE)
|
||||
if (nsp_cr_read_1(sc->port_res, NSPR_PARITYR) & PARITYR_PE)
|
||||
{
|
||||
nsp_cr_write_1(bst, bsh, NSPR_PARITYR,
|
||||
nsp_cr_write_1(sc->port_res, NSPR_PARITYR,
|
||||
PARITYR_ENABLE | PARITYR_CLEAR);
|
||||
scsi_low_assert_msg(slp, slp->sl_Tnexus, SCSI_LOW_MSG_ERROR, 1);
|
||||
}
|
||||
@ -900,8 +859,6 @@ nsp_write_fifo(sc, suspendio)
|
||||
int suspendio;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
u_int res;
|
||||
register u_int8_t stat;
|
||||
|
||||
@ -930,7 +887,7 @@ nsp_write_fifo(sc, suspendio)
|
||||
res = slp->sl_scp.scp_datalen;
|
||||
|
||||
/* XXX: reconfirm! */
|
||||
stat = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON) & SCBUSMON_PHMASK;
|
||||
stat = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON) & SCBUSMON_PHMASK;
|
||||
if (stat != PHASE_DATAOUT)
|
||||
return 0;
|
||||
|
||||
@ -938,12 +895,12 @@ nsp_write_fifo(sc, suspendio)
|
||||
{
|
||||
if ((sc->sc_xfermr & XFERMR_MEM32) != 0)
|
||||
{
|
||||
bus_space_write_region_4(sc->sc_memt, sc->sc_memh, 0,
|
||||
bus_write_region_4(sc->mem_res, 0,
|
||||
(u_int32_t *) slp->sl_scp.scp_data, res >> 2);
|
||||
}
|
||||
else
|
||||
{
|
||||
bus_space_write_region_1(sc->sc_memt, sc->sc_memh, 0,
|
||||
bus_write_region_1(sc->mem_res, 0,
|
||||
(u_int8_t *) slp->sl_scp.scp_data, res);
|
||||
}
|
||||
}
|
||||
@ -951,12 +908,12 @@ nsp_write_fifo(sc, suspendio)
|
||||
{
|
||||
if ((sc->sc_xfermr & XFERMR_IO32) != 0)
|
||||
{
|
||||
bus_space_write_multi_4(bst, bsh, nsp_fifodr,
|
||||
bus_write_multi_4(sc->port_res, nsp_fifodr,
|
||||
(u_int32_t *) slp->sl_scp.scp_data, res >> 2);
|
||||
}
|
||||
else
|
||||
{
|
||||
bus_space_write_multi_1(bst, bsh, nsp_fifodr,
|
||||
bus_write_multi_1(sc->port_res, nsp_fifodr,
|
||||
(u_int8_t *) slp->sl_scp.scp_data, res);
|
||||
}
|
||||
}
|
||||
@ -971,19 +928,17 @@ static int
|
||||
nsp_wait_interrupt(sc)
|
||||
struct nsp_softc *sc;
|
||||
{
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
int tout;
|
||||
register u_int8_t isrc;
|
||||
|
||||
for (tout = 0; tout < DEV_BSIZE / 10; tout ++)
|
||||
{
|
||||
isrc = bus_space_read_1(bst, bsh, nsp_irqsr);
|
||||
isrc = bus_read_1(sc->port_res, nsp_irqsr);
|
||||
if ((isrc & (IRQSR_SCSI | IRQSR_FIFO)) != 0)
|
||||
{
|
||||
if ((isrc & IRQSR_FIFO) != 0)
|
||||
{
|
||||
bus_space_write_1(bst, bsh,
|
||||
bus_write_1(sc->port_res,
|
||||
nsp_irqcr, IRQCR_FIFOCL);
|
||||
}
|
||||
return 1;
|
||||
@ -999,8 +954,6 @@ nsp_pio_read(sc, suspendio)
|
||||
int suspendio;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
int tout, padding, datalen;
|
||||
register u_int8_t stat, fstat;
|
||||
|
||||
@ -1012,7 +965,7 @@ nsp_pio_read(sc, suspendio)
|
||||
ReadLoop:
|
||||
while (1)
|
||||
{
|
||||
stat = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
|
||||
stat = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
|
||||
if (stat == (u_int8_t) -1)
|
||||
return;
|
||||
|
||||
@ -1024,12 +977,12 @@ nsp_pio_read(sc, suspendio)
|
||||
}
|
||||
|
||||
/* data phase */
|
||||
fstat = bus_space_read_1(bst, bsh, nsp_fifosr);
|
||||
fstat = bus_read_1(sc->port_res, nsp_fifosr);
|
||||
if ((fstat & FIFOSR_FULLEMP) != 0)
|
||||
{
|
||||
if ((sc->sc_icr & SCIENR_FIFO) != 0)
|
||||
{
|
||||
bus_space_write_1(bst, bsh, nsp_irqcr,
|
||||
bus_write_1(sc->port_res, nsp_irqcr,
|
||||
IRQCR_FIFOCL);
|
||||
}
|
||||
|
||||
@ -1078,8 +1031,6 @@ nsp_pio_write(sc, suspendio)
|
||||
int suspendio;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
u_int rcount, acount;
|
||||
int tout, datalen;
|
||||
register u_int8_t stat, fstat;
|
||||
@ -1091,7 +1042,7 @@ nsp_pio_write(sc, suspendio)
|
||||
WriteLoop:
|
||||
while (1)
|
||||
{
|
||||
stat = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON) & SCBUSMON_PHMASK;
|
||||
stat = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON) & SCBUSMON_PHMASK;
|
||||
if (stat != PHASE_DATAOUT)
|
||||
return;
|
||||
|
||||
@ -1102,12 +1053,12 @@ nsp_pio_write(sc, suspendio)
|
||||
return;
|
||||
}
|
||||
|
||||
fstat = bus_space_read_1(bst, bsh, nsp_fifosr);
|
||||
fstat = bus_read_1(sc->port_res, nsp_fifosr);
|
||||
if ((fstat & FIFOSR_FULLEMP) != 0)
|
||||
{
|
||||
if ((sc->sc_icr & SCIENR_FIFO) != 0)
|
||||
{
|
||||
bus_space_write_1(bst, bsh, nsp_irqcr,
|
||||
bus_write_1(sc->port_res, nsp_irqcr,
|
||||
IRQCR_FIFOCL);
|
||||
}
|
||||
|
||||
@ -1187,14 +1138,12 @@ static int
|
||||
nsp_negate_signal(struct nsp_softc *sc, u_int8_t mask, u_char *s)
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
int wc;
|
||||
u_int8_t regv;
|
||||
|
||||
for (wc = 0; wc < NSP_DELAY_MAX / NSP_DELAY_INTERVAL; wc ++)
|
||||
{
|
||||
regv = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
|
||||
regv = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
|
||||
if (regv == (u_int8_t) -1)
|
||||
return -1;
|
||||
if ((regv & mask) == 0)
|
||||
@ -1214,8 +1163,6 @@ nsp_xfer(sc, buf, len, phase, clear_atn)
|
||||
int phase;
|
||||
int clear_atn;
|
||||
{
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
int ptr, rv;
|
||||
|
||||
for (ptr = 0; len > 0; len --, ptr ++)
|
||||
@ -1226,18 +1173,18 @@ nsp_xfer(sc, buf, len, phase, clear_atn)
|
||||
|
||||
if (len == 1 && clear_atn != 0)
|
||||
{
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR,
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR,
|
||||
SCBUSCR_ADIR | SCBUSCR_ACKEN);
|
||||
SCSI_LOW_DEASSERT_ATN(&sc->sc_sclow);
|
||||
}
|
||||
|
||||
if (phase & SCBUSMON_IO)
|
||||
{
|
||||
buf[ptr] = nsp_cr_read_1(bst, bsh, NSPR_DATAACK);
|
||||
buf[ptr] = nsp_cr_read_1(sc->port_res, NSPR_DATAACK);
|
||||
}
|
||||
else
|
||||
{
|
||||
nsp_cr_write_1(bst, bsh, NSPR_DATAACK, buf[ptr]);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_DATAACK, buf[ptr]);
|
||||
}
|
||||
nsp_negate_signal(sc, SCBUSMON_ACK, "xfer<ACK>");
|
||||
}
|
||||
@ -1254,13 +1201,11 @@ nsp_reselected(sc)
|
||||
struct nsp_softc *sc;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
struct targ_info *ti;
|
||||
u_int sid;
|
||||
u_int8_t cr;
|
||||
|
||||
sid = (u_int) nsp_cr_read_1(bst, bsh, NSPR_RESELR);
|
||||
sid = (u_int) nsp_cr_read_1(sc->port_res, NSPR_RESELR);
|
||||
sid &= ~sc->sc_idbit;
|
||||
sid = ffs(sid) - 1;
|
||||
if ((ti = scsi_low_reselected(slp, sid)) == NULL)
|
||||
@ -1268,11 +1213,11 @@ nsp_reselected(sc)
|
||||
|
||||
nsp_negate_signal(sc, SCBUSMON_SEL, "reselect<SEL>");
|
||||
|
||||
cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR);
|
||||
cr = nsp_cr_read_1(sc->port_res, NSPR_SCBUSCR);
|
||||
cr &= ~(SCBUSCR_BSY | SCBUSCR_ATN);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr);
|
||||
cr |= SCBUSCR_ADIR | SCBUSCR_ACKEN;
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr);
|
||||
|
||||
#ifdef NSP_STATICS
|
||||
nsp_statics.reselect ++;
|
||||
@ -1286,15 +1231,13 @@ nsp_disconnected(sc, ti)
|
||||
struct targ_info *ti;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_PTCLRR, PTCLRR_PT | PTCLRR_ACK |
|
||||
nsp_cr_write_1(sc->port_res, NSPR_PTCLRR, PTCLRR_PT | PTCLRR_ACK |
|
||||
PTCLRR_REQ | PTCLRR_HOST);
|
||||
if ((sc->sc_icr & SCIENR_FIFO) != 0)
|
||||
{
|
||||
sc->sc_icr &= ~SCIENR_FIFO;
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCIENR, sc->sc_icr);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCIENR, sc->sc_icr);
|
||||
}
|
||||
sc->sc_cnt = 0;
|
||||
sc->sc_dataout_timeout = 0;
|
||||
@ -1326,14 +1269,12 @@ nsp_target_nexus_establish(sc)
|
||||
struct nsp_softc *sc;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
struct targ_info *ti = slp->sl_Tnexus;
|
||||
struct nsp_targ_info *nti = (void *) ti;
|
||||
|
||||
/* setup synch transfer registers */
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SYNCR, nti->nti_reg_syncr);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_ACKWIDTH, nti->nti_reg_ackwidth);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SYNCR, nti->nti_reg_syncr);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_ACKWIDTH, nti->nti_reg_ackwidth);
|
||||
|
||||
/* setup pdma fifo (minimum) */
|
||||
nsp_setup_fifo(sc, NSP_FIFO_ON, SCSI_LOW_READ, 0);
|
||||
@ -1367,7 +1308,7 @@ nsp_ccb_nexus_establish(sc)
|
||||
(nsp_io_control & NSP_READ_FIFO_INTERRUPTS) != 0)
|
||||
{
|
||||
sc->sc_icr |= SCIENR_FIFO;
|
||||
nsp_cr_write_1(sc->sc_iot, sc->sc_ioh,
|
||||
nsp_cr_write_1(sc->port_res,
|
||||
NSPR_SCIENR, sc->sc_icr);
|
||||
}
|
||||
}
|
||||
@ -1377,7 +1318,7 @@ nsp_ccb_nexus_establish(sc)
|
||||
(nsp_io_control & NSP_WRITE_FIFO_INTERRUPTS) != 0)
|
||||
{
|
||||
sc->sc_icr |= SCIENR_FIFO;
|
||||
nsp_cr_write_1(sc->sc_iot, sc->sc_ioh,
|
||||
nsp_cr_write_1(sc->port_res,
|
||||
NSPR_SCIENR, sc->sc_icr);
|
||||
}
|
||||
}
|
||||
@ -1408,8 +1349,6 @@ nspintr(arg)
|
||||
{
|
||||
struct nsp_softc *sc = arg;
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
struct targ_info *ti;
|
||||
struct buf *bp;
|
||||
u_int derror, flags;
|
||||
@ -1422,11 +1361,11 @@ nspintr(arg)
|
||||
if (slp->sl_flags & HW_INACTIVE)
|
||||
return 0;
|
||||
|
||||
bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_IRQDIS);
|
||||
isrc = bus_space_read_1(bst, bsh, nsp_irqsr);
|
||||
bus_write_1(sc->port_res, nsp_irqcr, IRQCR_IRQDIS);
|
||||
isrc = bus_read_1(sc->port_res, nsp_irqsr);
|
||||
if (isrc == (u_int8_t) -1 || (isrc & IRQSR_MASK) == 0)
|
||||
{
|
||||
bus_space_write_1(bst, bsh, nsp_irqcr, 0);
|
||||
bus_write_1(sc->port_res, nsp_irqcr, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1434,10 +1373,10 @@ nspintr(arg)
|
||||
* Do not read an irqphs register if no scsi phase interrupt.
|
||||
* Unless, you should lose a scsi phase interrupt.
|
||||
*/
|
||||
ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
|
||||
ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
|
||||
if ((isrc & IRQSR_SCSI) != 0)
|
||||
{
|
||||
irqphs = nsp_cr_read_1(bst, bsh, NSPR_IRQPHS);
|
||||
irqphs = nsp_cr_read_1(sc->port_res, NSPR_IRQPHS);
|
||||
}
|
||||
else
|
||||
irqphs = 0;
|
||||
@ -1447,8 +1386,8 @@ nspintr(arg)
|
||||
*/
|
||||
if (sc->sc_timer != 0)
|
||||
{
|
||||
nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, 0);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, 0);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_TIMERCNT, 0);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_TIMERCNT, 0);
|
||||
sc->sc_timer = 0;
|
||||
}
|
||||
|
||||
@ -1458,7 +1397,7 @@ nspintr(arg)
|
||||
{
|
||||
if ((isrc & IRQSR_MASK) == IRQSR_TIMER && sc->sc_seltout == 0)
|
||||
{
|
||||
bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_TIMERCL);
|
||||
bus_write_1(sc->port_res, nsp_irqcr, IRQCR_TIMERCL);
|
||||
return 1;
|
||||
}
|
||||
regv |= IRQCR_TIMERCL;
|
||||
@ -1471,7 +1410,7 @@ nspintr(arg)
|
||||
}
|
||||
|
||||
/* OK. enable all interrupts */
|
||||
bus_space_write_1(bst, bsh, nsp_irqcr, regv);
|
||||
bus_write_1(sc->port_res, nsp_irqcr, regv);
|
||||
|
||||
/*******************************************
|
||||
* debug section
|
||||
@ -1502,7 +1441,7 @@ nspintr(arg)
|
||||
|
||||
if ((irqphs & IRQPHS_RSEL) != 0)
|
||||
{
|
||||
bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_RESCL);
|
||||
bus_write_1(sc->port_res, nsp_irqcr, IRQCR_RESCL);
|
||||
if (nsp_reselected(sc) == EJUSTRETURN)
|
||||
return 1;
|
||||
}
|
||||
@ -1532,7 +1471,7 @@ nspintr(arg)
|
||||
if (sc->sc_seltout >= NSP_SELTIMEOUT)
|
||||
{
|
||||
sc->sc_seltout = 0;
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, 0);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, 0);
|
||||
return nsp_disconnected(sc, ti);
|
||||
}
|
||||
sc->sc_seltout ++;
|
||||
@ -1624,12 +1563,12 @@ nspintr(arg)
|
||||
scsi_low_attention(slp);
|
||||
}
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_CMDCR, CMDCR_PTCLR);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_CMDCR, CMDCR_PTCLR);
|
||||
for (len = 0; len < slp->sl_scp.scp_cmdlen; len ++)
|
||||
nsp_cr_write_1(bst, bsh, NSPR_CMDDR,
|
||||
nsp_cr_write_1(sc->port_res, NSPR_CMDDR,
|
||||
slp->sl_scp.scp_cmd[len]);
|
||||
|
||||
nsp_cr_write_1(bst, bsh, NSPR_CMDCR, CMDCR_PTCLR | CMDCR_EXEC);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_CMDCR, CMDCR_PTCLR | CMDCR_EXEC);
|
||||
break;
|
||||
|
||||
case IRQPHS_DATAOUT:
|
||||
@ -1657,10 +1596,10 @@ nspintr(arg)
|
||||
return 1;
|
||||
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
|
||||
regv = nsp_cr_read_1(bst, bsh, NSPR_DATA);
|
||||
if (nsp_cr_read_1(bst, bsh, NSPR_PARITYR) & PARITYR_PE)
|
||||
regv = nsp_cr_read_1(sc->port_res, NSPR_DATA);
|
||||
if (nsp_cr_read_1(sc->port_res, NSPR_PARITYR) & PARITYR_PE)
|
||||
{
|
||||
nsp_cr_write_1(bst, bsh, NSPR_PARITYR,
|
||||
nsp_cr_write_1(sc->port_res, NSPR_PARITYR,
|
||||
PARITYR_ENABLE | PARITYR_CLEAR);
|
||||
derror = SCSI_LOW_DATA_PE;
|
||||
}
|
||||
@ -1668,8 +1607,8 @@ nspintr(arg)
|
||||
derror = 0;
|
||||
|
||||
/* assert ACK */
|
||||
cr = SCBUSCR_ACK | nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
|
||||
cr = SCBUSCR_ACK | nsp_cr_read_1(sc->port_res, NSPR_SCBUSCR);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr);
|
||||
|
||||
if (scsi_low_statusin(slp, ti, derror | regv) != 0)
|
||||
{
|
||||
@ -1680,8 +1619,8 @@ nspintr(arg)
|
||||
nsp_negate_signal(sc, SCBUSMON_REQ, "statin<REQ>");
|
||||
|
||||
/* deassert ACK */
|
||||
cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR) & (~SCBUSCR_ACK);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
|
||||
cr = nsp_cr_read_1(sc->port_res, NSPR_SCBUSCR) & (~SCBUSCR_ACK);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr);
|
||||
break;
|
||||
|
||||
case IRQPHS_MSGOUT:
|
||||
@ -1756,10 +1695,10 @@ nspintr(arg)
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
|
||||
|
||||
/* read a data */
|
||||
regv = nsp_cr_read_1(bst, bsh, NSPR_DATA);
|
||||
if (nsp_cr_read_1(bst, bsh, NSPR_PARITYR) & PARITYR_PE)
|
||||
regv = nsp_cr_read_1(sc->port_res, NSPR_DATA);
|
||||
if (nsp_cr_read_1(sc->port_res, NSPR_PARITYR) & PARITYR_PE)
|
||||
{
|
||||
nsp_cr_write_1(bst, bsh,
|
||||
nsp_cr_write_1(sc->port_res,
|
||||
NSPR_PARITYR,
|
||||
PARITYR_ENABLE | PARITYR_CLEAR);
|
||||
derror = SCSI_LOW_DATA_PE;
|
||||
@ -1770,8 +1709,8 @@ nspintr(arg)
|
||||
}
|
||||
|
||||
/* assert ack */
|
||||
cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR) | SCBUSCR_ACK;
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
|
||||
cr = nsp_cr_read_1(sc->port_res, NSPR_SCBUSCR) | SCBUSCR_ACK;
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr);
|
||||
|
||||
if (scsi_low_msgin(slp, ti, regv | derror) == 0)
|
||||
{
|
||||
@ -1785,8 +1724,8 @@ nspintr(arg)
|
||||
nsp_negate_signal(sc, SCBUSMON_REQ, "msgin<REQ>");
|
||||
|
||||
/* deassert ack */
|
||||
cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR) & (~SCBUSCR_ACK);
|
||||
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
|
||||
cr = nsp_cr_read_1(sc->port_res, NSPR_SCBUSCR) & (~SCBUSCR_ACK);
|
||||
nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr);
|
||||
|
||||
/* catch a next signal */
|
||||
rv = nsp_expect_signal(sc, PHASE_MSGIN, SCBUSMON_REQ);
|
||||
@ -1814,15 +1753,13 @@ nsp_timeout(sc)
|
||||
struct nsp_softc *sc;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
int tout;
|
||||
u_int8_t ph, regv;
|
||||
|
||||
if (slp->sl_Tnexus == NULL)
|
||||
return 0;
|
||||
|
||||
ph = nsp_cr_read_1(iot, ioh, NSPR_SCBUSMON);
|
||||
ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
|
||||
switch (ph & SCBUSMON_PHMASK)
|
||||
{
|
||||
case PHASE_DATAOUT:
|
||||
@ -1830,13 +1767,13 @@ nsp_timeout(sc)
|
||||
break;
|
||||
|
||||
/* check a fifo empty */
|
||||
regv = bus_space_read_1(iot, ioh, nsp_fifosr);
|
||||
regv = bus_read_1(sc->port_res, nsp_fifosr);
|
||||
if ((regv & FIFOSR_FULLEMP) == 0)
|
||||
break;
|
||||
bus_space_write_1(iot, ioh, nsp_irqcr, IRQCR_FIFOCL);
|
||||
bus_write_1(sc->port_res, nsp_irqcr, IRQCR_FIFOCL);
|
||||
|
||||
/* check still requested */
|
||||
ph = nsp_cr_read_1(iot, ioh, NSPR_SCBUSMON);
|
||||
ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
|
||||
if ((ph & SCBUSMON_REQ) == 0)
|
||||
break;
|
||||
/* check timeout */
|
||||
@ -1853,20 +1790,20 @@ nsp_timeout(sc)
|
||||
tout = NSP_DELAY_MAX;
|
||||
while (tout -- > 0)
|
||||
{
|
||||
ph = nsp_cr_read_1(iot, ioh, NSPR_SCBUSMON);
|
||||
ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
|
||||
if ((ph & SCBUSMON_PHMASK) != PHASE_DATAOUT)
|
||||
break;
|
||||
regv = bus_space_read_1(iot, ioh, nsp_fifosr);
|
||||
regv = bus_read_1(sc->port_res, nsp_fifosr);
|
||||
if ((regv & FIFOSR_FULLEMP) == 0)
|
||||
{
|
||||
DELAY(1);
|
||||
continue;
|
||||
}
|
||||
|
||||
bus_space_write_1(iot, ioh, nsp_irqcr, IRQCR_FIFOCL);
|
||||
bus_write_1(sc->port_res, nsp_irqcr, IRQCR_FIFOCL);
|
||||
nsp_data_padding(sc, SCSI_LOW_WRITE, 32);
|
||||
}
|
||||
ph = nsp_cr_read_1(iot, ioh, NSPR_SCBUSMON);
|
||||
ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
|
||||
if ((ph & SCBUSMON_PHMASK) == PHASE_DATAOUT)
|
||||
sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
|
||||
break;
|
||||
|
@ -84,7 +84,12 @@ const struct pccard_product nsp_products[] = {
|
||||
static void
|
||||
nsp_pccard_intr(void * arg)
|
||||
{
|
||||
nspintr(arg);
|
||||
struct nsp_softc *sc;
|
||||
|
||||
sc = arg;
|
||||
SCSI_LOW_LOCK(&sc->sc_sclow);
|
||||
nspintr(sc);
|
||||
SCSI_LOW_UNLOCK(&sc->sc_sclow);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -103,6 +108,7 @@ nsp_release_resource(device_t dev)
|
||||
if (sc->mem_res)
|
||||
bus_release_resource(dev, SYS_RES_MEMORY,
|
||||
sc->mem_rid, sc->mem_res);
|
||||
mtx_destroy(&sc->sc_sclow.sl_lock);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -116,6 +122,7 @@ nsp_alloc_resource(device_t dev)
|
||||
if (error || iosize < NSP_IOSIZE)
|
||||
return(ENOMEM);
|
||||
|
||||
mtx_init(&sc->sc_sclow.sl_lock, "nsp", NULL, MTX_DEF);
|
||||
sc->port_rid = 0;
|
||||
sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
|
||||
0, ~0, NSP_IOSIZE, RF_ACTIVE);
|
||||
@ -167,7 +174,7 @@ nsp_pccard_probe(device_t dev)
|
||||
sizeof(nsp_products[0]), NULL)) != NULL) {
|
||||
if (pp->pp_name)
|
||||
device_set_desc(dev, pp->pp_name);
|
||||
return(0);
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
}
|
||||
return(EIO);
|
||||
}
|
||||
@ -185,8 +192,8 @@ nsp_pccard_attach(device_t dev)
|
||||
nsp_release_resource(dev);
|
||||
return(ENXIO);
|
||||
}
|
||||
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_CAM | INTR_ENTROPY,
|
||||
NULL, nsp_pccard_intr, (void *)sc, &sc->nsp_intrhand);
|
||||
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_CAM | INTR_ENTROPY |
|
||||
INTR_MPSAFE, NULL, nsp_pccard_intr, sc, &sc->nsp_intrhand);
|
||||
if (error) {
|
||||
nsp_release_resource(dev);
|
||||
return(error);
|
||||
@ -231,12 +238,9 @@ static void
|
||||
nsp_card_unload(device_t devi)
|
||||
{
|
||||
struct nsp_softc *sc = device_get_softc(devi);
|
||||
intrmask_t s;
|
||||
|
||||
s = splcam();
|
||||
scsi_low_deactivate((struct scsi_low_softc *)sc);
|
||||
scsi_low_dettach(&sc->sc_sclow);
|
||||
splx(s);
|
||||
scsi_low_deactivate(&sc->sc_sclow);
|
||||
scsi_low_detach(&sc->sc_sclow);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -245,8 +249,7 @@ nspprobe(device_t devi)
|
||||
int rv;
|
||||
struct nsp_softc *sc = device_get_softc(devi);
|
||||
|
||||
rv = nspprobesubr(rman_get_bustag(sc->port_res),
|
||||
rman_get_bushandle(sc->port_res),
|
||||
rv = nspprobesubr(sc->port_res,
|
||||
device_get_flags(devi));
|
||||
|
||||
return rv;
|
||||
@ -259,36 +262,22 @@ nspattach(device_t devi)
|
||||
struct scsi_low_softc *slp;
|
||||
u_int32_t flags = device_get_flags(devi);
|
||||
u_int iobase = bus_get_resource_start(devi, SYS_RES_IOPORT, 0);
|
||||
intrmask_t s;
|
||||
char dvname[16];
|
||||
|
||||
strcpy(dvname,"nsp");
|
||||
|
||||
if (iobase == 0) {
|
||||
printf("%s: no ioaddr is given\n", dvname);
|
||||
return (0);
|
||||
device_printf(devi, "no ioaddr is given\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
sc = device_get_softc(devi);
|
||||
if (sc == NULL)
|
||||
return (0);
|
||||
|
||||
slp = &sc->sc_sclow;
|
||||
slp->sl_dev = devi;
|
||||
sc->sc_iot = rman_get_bustag(sc->port_res);
|
||||
sc->sc_ioh = rman_get_bushandle(sc->port_res);
|
||||
|
||||
if (sc->mem_res == NULL) {
|
||||
printf("WARNING: CANNOT GET Memory RESOURCE going PIO mode");
|
||||
device_printf(devi,
|
||||
"WARNING: CANNOT GET Memory RESOURCE going PIO mode\n");
|
||||
flags |= PIO_MODE;
|
||||
}
|
||||
|
||||
if ((flags & PIO_MODE) == 0) {
|
||||
sc->sc_memt = rman_get_bustag(sc->mem_res);
|
||||
sc->sc_memh = rman_get_bushandle(sc->mem_res);
|
||||
} else {
|
||||
sc->sc_memh = 0;
|
||||
}
|
||||
/* slp->sl_irq = devi->pd_irq; */
|
||||
sc->sc_iclkdiv = CLKDIVR_20M;
|
||||
sc->sc_clkdiv = CLKDIVR_40M;
|
||||
@ -296,9 +285,7 @@ nspattach(device_t devi)
|
||||
slp->sl_hostid = NSP_HOSTID;
|
||||
slp->sl_cfgflags = flags;
|
||||
|
||||
s = splcam();
|
||||
nspattachsubr(sc);
|
||||
splx(s);
|
||||
|
||||
return(NSP_IOSIZE);
|
||||
}
|
||||
|
@ -43,11 +43,6 @@
|
||||
struct nsp_softc {
|
||||
struct scsi_low_softc sc_sclow; /* generic data */
|
||||
|
||||
bus_space_tag_t sc_iot;
|
||||
bus_space_handle_t sc_ioh;
|
||||
bus_space_tag_t sc_memt;
|
||||
bus_space_handle_t sc_memh;
|
||||
|
||||
int port_rid;
|
||||
int irq_rid;
|
||||
int mem_rid;
|
||||
@ -89,7 +84,7 @@ struct nsp_targ_info {
|
||||
/*****************************************************************
|
||||
* Proto
|
||||
*****************************************************************/
|
||||
int nspprobesubr(bus_space_tag_t, bus_space_handle_t, u_int);
|
||||
int nspprobesubr(struct resource *, u_int);
|
||||
void nspattachsubr(struct nsp_softc *);
|
||||
int nspintr(void *);
|
||||
|
||||
|
@ -49,6 +49,7 @@ __FBSDID("$FreeBSD$");
|
||||
#include <sys/queue.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/errno.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <machine/cpu.h>
|
||||
#include <machine/bus.h>
|
||||
@ -169,7 +170,7 @@ static __inline void
|
||||
stghw_bcr_write_1(struct stg_softc *sc, u_int8_t bcv)
|
||||
{
|
||||
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, bcv);
|
||||
bus_write_1(sc->port_res, tmc_bctl, bcv);
|
||||
sc->sc_busimg = bcv;
|
||||
}
|
||||
|
||||
@ -178,13 +179,11 @@ stghw_check(sc)
|
||||
struct stg_softc *sc;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
u_int fcbsize, fcb;
|
||||
u_int16_t lsb, msb;
|
||||
|
||||
lsb = bus_space_read_1(iot, ioh, tmc_idlsb);
|
||||
msb = bus_space_read_1(iot, ioh, tmc_idmsb);
|
||||
lsb = bus_read_1(sc->port_res, tmc_idlsb);
|
||||
msb = bus_read_1(sc->port_res, tmc_idmsb);
|
||||
switch (msb << 8 | lsb)
|
||||
{
|
||||
case 0x6127:
|
||||
@ -193,7 +192,7 @@ stghw_check(sc)
|
||||
return EINVAL;
|
||||
|
||||
case 0x60e9:
|
||||
if (bus_space_read_1(iot, ioh, tmc_cfg2) & 0x02)
|
||||
if (bus_read_1(sc->port_res, tmc_cfg2) & 0x02)
|
||||
{
|
||||
sc->sc_chip = TMCCHIP_18C30;
|
||||
sc->sc_fsz = TMC18C30_FIFOSZ;
|
||||
@ -234,17 +233,15 @@ static void
|
||||
stghw_init(sc)
|
||||
struct stg_softc *sc;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
|
||||
bus_space_write_1(iot, ioh, tmc_ictl, 0);
|
||||
bus_write_1(sc->port_res, tmc_ictl, 0);
|
||||
stghw_bcr_write_1(sc, BCTL_BUSFREE);
|
||||
bus_space_write_1(iot, ioh, tmc_fctl,
|
||||
bus_write_1(sc->port_res, tmc_fctl,
|
||||
sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT);
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_write_1(sc->port_res, tmc_ictl, sc->sc_icinit);
|
||||
|
||||
bus_space_write_1(iot, ioh, tmc_ssctl, 0);
|
||||
bus_write_1(sc->port_res, tmc_ssctl, 0);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -275,7 +272,7 @@ stghw_attention(sc)
|
||||
|
||||
sc->sc_busc |= BCTL_ATN;
|
||||
sc->sc_busimg |= BCTL_ATN;
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, sc->sc_busimg);
|
||||
bus_write_1(sc->port_res, tmc_bctl, sc->sc_busimg);
|
||||
DELAY(10);
|
||||
}
|
||||
|
||||
@ -283,11 +280,9 @@ static void
|
||||
stghw_bus_reset(sc)
|
||||
struct stg_softc *sc;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
|
||||
bus_space_write_1(iot, ioh, tmc_ictl, 0);
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, 0);
|
||||
bus_write_1(sc->port_res, tmc_ictl, 0);
|
||||
bus_write_1(sc->port_res, tmc_fctl, 0);
|
||||
stghw_bcr_write_1(sc, BCTL_RST);
|
||||
DELAY(100000);
|
||||
stghw_bcr_write_1(sc, BCTL_BUSFREE);
|
||||
@ -298,29 +293,23 @@ stghw_start_selection(sc, cb)
|
||||
struct stg_softc *sc;
|
||||
struct slccb *cb;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct targ_info *ti = cb->ti;
|
||||
register u_int8_t stat;
|
||||
int s;
|
||||
|
||||
sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
|
||||
sc->sc_dataout_timeout = 0;
|
||||
sc->sc_ubf_timeout = 0;
|
||||
stghw_bcr_write_1(sc, BCTL_BUSFREE);
|
||||
bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
|
||||
bus_write_1(sc->port_res, tmc_ictl, sc->sc_icinit);
|
||||
|
||||
s = splhigh();
|
||||
stat = bus_space_read_1(iot, ioh, tmc_astat);
|
||||
stat = bus_read_1(sc->port_res, tmc_astat);
|
||||
if ((stat & ASTAT_INT) != 0)
|
||||
{
|
||||
splx(s);
|
||||
return SCSI_LOW_START_FAIL;
|
||||
}
|
||||
|
||||
bus_space_write_1(iot, ioh, tmc_scsiid, sc->sc_idbit);
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_ARBIT);
|
||||
splx(s);
|
||||
bus_write_1(sc->port_res, tmc_scsiid, sc->sc_idbit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit | FCTL_ARBIT);
|
||||
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART);
|
||||
return SCSI_LOW_START_OK;
|
||||
@ -355,8 +344,6 @@ stg_msg(sc, ti, msg)
|
||||
struct targ_info *ti;
|
||||
u_int msg;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct stg_targ_info *sti = (void *) ti;
|
||||
u_int period, offset;
|
||||
|
||||
@ -390,7 +377,7 @@ stg_msg(sc, ti, msg)
|
||||
sti->sti_reg_synch ++;
|
||||
sti->sti_reg_synch |= SSCTL_SYNCHEN | SSCTL_FSYNCHEN;
|
||||
}
|
||||
bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch);
|
||||
bus_write_1(sc->port_res, tmc_ssctl, sti->sti_reg_synch);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -398,15 +385,12 @@ stg_msg(sc, ti, msg)
|
||||
* General probe attach
|
||||
**************************************************************/
|
||||
int
|
||||
stgprobesubr(iot, ioh, dvcfg)
|
||||
bus_space_tag_t iot;
|
||||
bus_space_handle_t ioh;
|
||||
u_int dvcfg;
|
||||
stgprobesubr(struct resource *res, u_int dvcfg)
|
||||
{
|
||||
u_int16_t lsb, msb;
|
||||
|
||||
lsb = bus_space_read_1(iot, ioh, tmc_idlsb);
|
||||
msb = bus_space_read_1(iot, ioh, tmc_idmsb);
|
||||
lsb = bus_read_1(res, tmc_idlsb);
|
||||
msb = bus_read_1(res, tmc_idmsb);
|
||||
switch (msb << 8 | lsb)
|
||||
{
|
||||
default:
|
||||
@ -448,8 +432,6 @@ stg_pdma_end(sc, ti)
|
||||
struct targ_info *ti;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct slccb *cb = slp->sl_Qnexus;
|
||||
u_int len, tres;
|
||||
|
||||
@ -465,7 +447,7 @@ stg_pdma_end(sc, ti)
|
||||
|
||||
if (ti->ti_phase == PH_DATA)
|
||||
{
|
||||
len = bus_space_read_2(iot, ioh, tmc_fdcnt);
|
||||
len = bus_read_2(sc->port_res, tmc_fdcnt);
|
||||
if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE)
|
||||
{
|
||||
if (len != 0)
|
||||
@ -504,7 +486,7 @@ stg_pdma_end(sc, ti)
|
||||
}
|
||||
|
||||
out:
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -514,16 +496,14 @@ stg_pio_read(sc, ti, thold)
|
||||
u_int thold;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct sc_p *sp = &slp->sl_scp;
|
||||
int s, tout;
|
||||
int tout;
|
||||
u_int res;
|
||||
u_int8_t stat;
|
||||
|
||||
if ((slp->sl_flags & HW_PDMASTART) == 0)
|
||||
{
|
||||
bus_space_write_1(iot, ioh, tmc_fctl,
|
||||
bus_write_1(sc->port_res, tmc_fctl,
|
||||
sc->sc_fcRinit | FCTL_FIFOEN);
|
||||
slp->sl_flags |= HW_PDMASTART;
|
||||
}
|
||||
@ -533,21 +513,18 @@ stg_pio_read(sc, ti, thold)
|
||||
{
|
||||
if (thold > 0)
|
||||
{
|
||||
s = splhigh();
|
||||
res = bus_space_read_2(iot, ioh, tmc_fdcnt);
|
||||
res = bus_read_2(sc->port_res, tmc_fdcnt);
|
||||
if (res < thold)
|
||||
{
|
||||
bus_space_write_1(iot, ioh, tmc_ictl,
|
||||
bus_write_1(sc->port_res, tmc_ictl,
|
||||
sc->sc_icinit);
|
||||
splx(s);
|
||||
break;
|
||||
}
|
||||
splx(s);
|
||||
}
|
||||
else
|
||||
{
|
||||
stat = bus_space_read_1(iot, ioh, tmc_bstat);
|
||||
res = bus_space_read_2(iot, ioh, tmc_fdcnt);
|
||||
stat = bus_read_1(sc->port_res, tmc_bstat);
|
||||
res = bus_read_2(sc->port_res, tmc_fdcnt);
|
||||
if (res == 0)
|
||||
{
|
||||
if ((stat & PHASE_MASK) != DATA_IN_PHASE)
|
||||
@ -578,7 +555,7 @@ stg_pio_read(sc, ti, thold)
|
||||
res = STG_MAX_DATA_SIZE;
|
||||
while (res -- > 0)
|
||||
{
|
||||
(void) bus_space_read_1(iot, ioh, tmc_rfifo);
|
||||
(void) bus_read_1(sc->port_res, tmc_rfifo);
|
||||
}
|
||||
continue;
|
||||
}
|
||||
@ -586,12 +563,12 @@ stg_pio_read(sc, ti, thold)
|
||||
sp->scp_datalen -= res;
|
||||
if (res & 1)
|
||||
{
|
||||
*sp->scp_data = bus_space_read_1(iot, ioh, tmc_rfifo);
|
||||
*sp->scp_data = bus_read_1(sc->port_res, tmc_rfifo);
|
||||
sp->scp_data ++;
|
||||
res --;
|
||||
}
|
||||
|
||||
bus_space_read_multi_2(iot, ioh, tmc_rfifo,
|
||||
bus_read_multi_2(sc->port_res, tmc_rfifo,
|
||||
(u_int16_t *) sp->scp_data, res >> 1);
|
||||
sp->scp_data += res;
|
||||
}
|
||||
@ -607,25 +584,23 @@ stg_pio_write(sc, ti, thold)
|
||||
u_int thold;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct sc_p *sp = &slp->sl_scp;
|
||||
u_int res;
|
||||
int s, tout;
|
||||
int tout;
|
||||
register u_int8_t stat;
|
||||
|
||||
if ((slp->sl_flags & HW_PDMASTART) == 0)
|
||||
{
|
||||
stat = sc->sc_fcWinit | FCTL_FIFOEN | FCTL_FIFOW;
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, stat | FCTL_CLRFIFO);
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, stat);
|
||||
bus_write_1(sc->port_res, tmc_fctl, stat | FCTL_CLRFIFO);
|
||||
bus_write_1(sc->port_res, tmc_fctl, stat);
|
||||
slp->sl_flags |= HW_PDMASTART;
|
||||
}
|
||||
|
||||
tout = sc->sc_tmaxcnt;
|
||||
while (tout -- > 0)
|
||||
{
|
||||
stat = bus_space_read_1(iot, ioh, tmc_bstat);
|
||||
stat = bus_read_1(sc->port_res, tmc_bstat);
|
||||
if ((stat & PHASE_MASK) != DATA_OUT_PHASE)
|
||||
break;
|
||||
|
||||
@ -638,20 +613,17 @@ stg_pio_write(sc, ti, thold)
|
||||
|
||||
if (thold > 0)
|
||||
{
|
||||
s = splhigh();
|
||||
res = bus_space_read_2(iot, ioh, tmc_fdcnt);
|
||||
res = bus_read_2(sc->port_res, tmc_fdcnt);
|
||||
if (res > thold)
|
||||
{
|
||||
bus_space_write_1(iot, ioh, tmc_ictl,
|
||||
bus_write_1(sc->port_res, tmc_ictl,
|
||||
sc->sc_icinit);
|
||||
splx(s);
|
||||
break;
|
||||
}
|
||||
splx(s);
|
||||
}
|
||||
else
|
||||
{
|
||||
res = bus_space_read_2(iot, ioh, tmc_fdcnt);
|
||||
res = bus_read_2(sc->port_res, tmc_fdcnt);
|
||||
if (res > sc->sc_maxwsize / 2)
|
||||
{
|
||||
DELAY(1);
|
||||
@ -668,12 +640,12 @@ stg_pio_write(sc, ti, thold)
|
||||
sp->scp_datalen -= res;
|
||||
if ((res & 0x1) != 0)
|
||||
{
|
||||
bus_space_write_1(iot, ioh, tmc_wfifo, *sp->scp_data);
|
||||
bus_write_1(sc->port_res, tmc_wfifo, *sp->scp_data);
|
||||
sp->scp_data ++;
|
||||
res --;
|
||||
}
|
||||
|
||||
bus_space_write_multi_2(iot, ioh, tmc_wfifo,
|
||||
bus_write_multi_2(sc->port_res, tmc_wfifo,
|
||||
(u_int16_t *) sp->scp_data, res >> 1);
|
||||
sp->scp_data += res;
|
||||
}
|
||||
@ -686,14 +658,12 @@ static int
|
||||
stg_negate_signal(struct stg_softc *sc, u_int8_t mask, u_char *s)
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
int wc;
|
||||
u_int8_t regv;
|
||||
|
||||
for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++)
|
||||
{
|
||||
regv = bus_space_read_1(bst, bsh, tmc_bstat);
|
||||
regv = bus_read_1(sc->port_res, tmc_bstat);
|
||||
if (regv == (u_int8_t) -1)
|
||||
return -1;
|
||||
if ((regv & mask) == 0)
|
||||
@ -710,15 +680,13 @@ static int
|
||||
stg_expect_signal(struct stg_softc *sc, u_int8_t phase, u_int8_t mask)
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t bst = sc->sc_iot;
|
||||
bus_space_handle_t bsh = sc->sc_ioh;
|
||||
int wc;
|
||||
u_int8_t ph;
|
||||
|
||||
phase &= PHASE_MASK;
|
||||
for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++)
|
||||
{
|
||||
ph = bus_space_read_1(bst, bsh, tmc_bstat);
|
||||
ph = bus_read_1(sc->port_res, tmc_bstat);
|
||||
if (ph == (u_int8_t) -1)
|
||||
return -1;
|
||||
if ((ph & PHASE_MASK) != phase)
|
||||
@ -741,14 +709,12 @@ stg_xfer(sc, buf, len, phase, clear_atn)
|
||||
int phase;
|
||||
int clear_atn;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
int rv, ptr;
|
||||
|
||||
if (phase & BSTAT_IO)
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
|
||||
else
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcWinit);
|
||||
|
||||
for (ptr = 0; len > 0; len --)
|
||||
{
|
||||
@ -765,18 +731,18 @@ stg_xfer(sc, buf, len, phase, clear_atn)
|
||||
|
||||
if (phase & BSTAT_IO)
|
||||
{
|
||||
buf[ptr ++] = bus_space_read_1(iot, ioh, tmc_rdata);
|
||||
buf[ptr ++] = bus_read_1(sc->port_res, tmc_rdata);
|
||||
}
|
||||
else
|
||||
{
|
||||
bus_space_write_1(iot, ioh, tmc_wdata, buf[ptr ++]);
|
||||
bus_write_1(sc->port_res, tmc_wdata, buf[ptr ++]);
|
||||
}
|
||||
|
||||
stg_negate_signal(sc, BSTAT_ACK, "xfer<ACK>");
|
||||
}
|
||||
|
||||
bad:
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
|
||||
return len;
|
||||
}
|
||||
|
||||
@ -788,8 +754,6 @@ stg_reselected(sc)
|
||||
struct stg_softc *sc;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
int tout;
|
||||
u_int sid;
|
||||
u_int8_t regv;
|
||||
@ -799,7 +763,7 @@ stg_reselected(sc)
|
||||
/* XXX:
|
||||
* Selection vs Reselection conflicts.
|
||||
*/
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
|
||||
stghw_bcr_write_1(sc, BCTL_BUSFREE);
|
||||
}
|
||||
else if (slp->sl_Tnexus != NULL)
|
||||
@ -816,12 +780,12 @@ stg_reselected(sc)
|
||||
tout = STG_DELAY_SELECT_POLLING_MAX;
|
||||
while (tout -- > 0)
|
||||
{
|
||||
regv = bus_space_read_1(iot, ioh, tmc_bstat);
|
||||
regv = bus_read_1(sc->port_res, tmc_bstat);
|
||||
if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) ==
|
||||
(BSTAT_IO | BSTAT_SEL))
|
||||
{
|
||||
DELAY(1);
|
||||
regv = bus_space_read_1(iot, ioh, tmc_bstat);
|
||||
regv = bus_read_1(sc->port_res, tmc_bstat);
|
||||
if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) ==
|
||||
(BSTAT_IO | BSTAT_SEL))
|
||||
goto reselect_start;
|
||||
@ -832,21 +796,21 @@ stg_reselected(sc)
|
||||
return EJUSTRETURN;
|
||||
|
||||
reselect_start:
|
||||
sid = (u_int) bus_space_read_1(iot, ioh, tmc_scsiid);
|
||||
sid = (u_int) bus_read_1(sc->port_res, tmc_scsiid);
|
||||
if ((sid & sc->sc_idbit) == 0)
|
||||
{
|
||||
/* not us */
|
||||
return EJUSTRETURN;
|
||||
}
|
||||
|
||||
bus_space_write_1(iot, ioh, tmc_fctl,
|
||||
bus_write_1(sc->port_res, tmc_fctl,
|
||||
sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT);
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
|
||||
stghw_bcr_write_1(sc, sc->sc_busc | BCTL_BSY);
|
||||
|
||||
while (tout -- > 0)
|
||||
{
|
||||
regv = bus_space_read_1(iot, ioh, tmc_bstat);
|
||||
regv = bus_read_1(sc->port_res, tmc_bstat);
|
||||
if ((regv & (BSTAT_SEL | BSTAT_BSY)) == BSTAT_BSY)
|
||||
goto reselected;
|
||||
DELAY(1);
|
||||
@ -872,12 +836,10 @@ stg_disconnected(sc, ti)
|
||||
struct targ_info *ti;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
|
||||
/* clear bus status & fifo */
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
|
||||
stghw_bcr_write_1(sc, BCTL_BUSFREE);
|
||||
sc->sc_icinit &= ~ICTL_FIFO;
|
||||
sc->sc_busc &= ~BCTL_ATN;
|
||||
@ -899,12 +861,10 @@ stg_target_nexus_establish(sc)
|
||||
struct stg_softc *sc;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct targ_info *ti = slp->sl_Tnexus;
|
||||
struct stg_targ_info *sti = (void *) ti;
|
||||
|
||||
bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch);
|
||||
bus_write_1(sc->port_res, tmc_ssctl, sti->sti_reg_synch);
|
||||
if ((stg_io_control & STG_FIFO_INTERRUPTS) != 0)
|
||||
{
|
||||
sc->sc_icinit |= ICTL_FIFO;
|
||||
@ -938,19 +898,17 @@ stghw_select_targ_wait(sc, mu)
|
||||
struct stg_softc *sc;
|
||||
int mu;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
|
||||
mu = mu / STGHW_SELECT_INTERVAL;
|
||||
while (mu -- > 0)
|
||||
{
|
||||
if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) == 0)
|
||||
if ((bus_read_1(sc->port_res, tmc_bstat) & BSTAT_BSY) == 0)
|
||||
{
|
||||
DELAY(STGHW_SELECT_INTERVAL);
|
||||
continue;
|
||||
}
|
||||
DELAY(1);
|
||||
if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) != 0)
|
||||
if ((bus_read_1(sc->port_res, tmc_bstat) & BSTAT_BSY) != 0)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
@ -963,11 +921,9 @@ stg_selection_done_and_expect_msgout(sc)
|
||||
struct stg_softc *sc;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
|
||||
stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc);
|
||||
SCSI_LOW_ASSERT_ATN(slp);
|
||||
}
|
||||
@ -978,12 +934,10 @@ stgintr(arg)
|
||||
{
|
||||
struct stg_softc *sc = arg;
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
struct targ_info *ti;
|
||||
struct buf *bp;
|
||||
u_int derror, flags;
|
||||
int len, s;
|
||||
int len;
|
||||
u_int8_t status, astatus, regv;
|
||||
|
||||
/*******************************************
|
||||
@ -992,19 +946,19 @@ stgintr(arg)
|
||||
if (slp->sl_flags & HW_INACTIVE)
|
||||
return 0;
|
||||
|
||||
astatus = bus_space_read_1(iot, ioh, tmc_astat);
|
||||
status = bus_space_read_1(iot, ioh, tmc_bstat);
|
||||
astatus = bus_read_1(sc->port_res, tmc_astat);
|
||||
status = bus_read_1(sc->port_res, tmc_bstat);
|
||||
|
||||
if ((astatus & ASTAT_STATMASK) == 0 || astatus == (u_int8_t) -1)
|
||||
return 0;
|
||||
|
||||
bus_space_write_1(iot, ioh, tmc_ictl, 0);
|
||||
bus_write_1(sc->port_res, tmc_ictl, 0);
|
||||
if (astatus & ASTAT_SCSIRST)
|
||||
{
|
||||
bus_space_write_1(iot, ioh, tmc_fctl,
|
||||
bus_write_1(sc->port_res, tmc_fctl,
|
||||
sc->sc_fcRinit | FCTL_CLRFIFO);
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_space_write_1(iot, ioh, tmc_ictl, 0);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_write_1(sc->port_res, tmc_ictl, 0);
|
||||
|
||||
scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT,
|
||||
"bus reset (power off?)");
|
||||
@ -1065,7 +1019,7 @@ stgintr(arg)
|
||||
goto arb_fail;
|
||||
}
|
||||
|
||||
status = bus_space_read_1(iot, ioh, tmc_bstat);
|
||||
status = bus_read_1(sc->port_res, tmc_bstat);
|
||||
if ((status & BSTAT_IO) != 0)
|
||||
{
|
||||
/* XXX:
|
||||
@ -1075,7 +1029,7 @@ stgintr(arg)
|
||||
stg_statics.arbit_fail_1 ++;
|
||||
#endif /* STG_STATICS */
|
||||
arb_fail:
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
|
||||
stghw_bcr_write_1(sc, BCTL_BUSFREE);
|
||||
scsi_low_arbit_fail(slp, slp->sl_Qnexus);
|
||||
goto out;
|
||||
@ -1087,11 +1041,10 @@ stgintr(arg)
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
|
||||
scsi_low_arbit_win(slp);
|
||||
|
||||
s = splhigh();
|
||||
bus_space_write_1(iot, ioh, tmc_scsiid,
|
||||
bus_write_1(sc->port_res, tmc_scsiid,
|
||||
sc->sc_idbit | (1 << ti->ti_id));
|
||||
stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL);
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcWinit);
|
||||
if ((stg_io_control & STG_WAIT_FOR_SELECT) != 0)
|
||||
{
|
||||
/* selection abort delay 200 + 100 micro sec */
|
||||
@ -1101,7 +1054,6 @@ stgintr(arg)
|
||||
stg_selection_done_and_expect_msgout(sc);
|
||||
}
|
||||
}
|
||||
splx(s);
|
||||
goto out;
|
||||
|
||||
case PH_SELSTART:
|
||||
@ -1130,7 +1082,7 @@ stgintr(arg)
|
||||
goto out;
|
||||
|
||||
/* clear a busy line */
|
||||
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
||||
bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
|
||||
stghw_bcr_write_1(sc, sc->sc_busc);
|
||||
stg_target_nexus_establish(sc);
|
||||
if ((status & PHASE_MASK) != MESSAGE_IN_PHASE)
|
||||
@ -1209,12 +1161,12 @@ stgintr(arg)
|
||||
break;
|
||||
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
|
||||
regv = bus_space_read_1(iot, ioh, tmc_sdna);
|
||||
regv = bus_read_1(sc->port_res, tmc_sdna);
|
||||
if (scsi_low_statusin(slp, ti, regv | derror) != 0)
|
||||
{
|
||||
scsi_low_attention(slp);
|
||||
}
|
||||
if (regv != bus_space_read_1(iot, ioh, tmc_rdata))
|
||||
if (regv != bus_read_1(sc->port_res, tmc_rdata))
|
||||
{
|
||||
device_printf(slp->sl_dev, "STATIN: data mismatch\n");
|
||||
}
|
||||
@ -1257,7 +1209,7 @@ stgintr(arg)
|
||||
SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
|
||||
|
||||
/* read data with NOACK */
|
||||
regv = bus_space_read_1(iot, ioh, tmc_sdna);
|
||||
regv = bus_read_1(sc->port_res, tmc_sdna);
|
||||
|
||||
if (scsi_low_msgin(slp, ti, derror | regv) == 0)
|
||||
{
|
||||
@ -1268,7 +1220,7 @@ stgintr(arg)
|
||||
}
|
||||
|
||||
/* read data with ACK */
|
||||
if (regv != bus_space_read_1(iot, ioh, tmc_rdata))
|
||||
if (regv != bus_read_1(sc->port_res, tmc_rdata))
|
||||
{
|
||||
device_printf(slp->sl_dev, "MSGIN: data mismatch\n");
|
||||
}
|
||||
@ -1295,7 +1247,7 @@ stgintr(arg)
|
||||
}
|
||||
|
||||
out:
|
||||
bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
|
||||
bus_write_1(sc->port_res, tmc_ictl, sc->sc_icinit);
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -1304,15 +1256,13 @@ stg_timeout(sc)
|
||||
struct stg_softc *sc;
|
||||
{
|
||||
struct scsi_low_softc *slp = &sc->sc_sclow;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
int tout, count;
|
||||
u_int8_t status;
|
||||
|
||||
if (slp->sl_Tnexus == NULL)
|
||||
return 0;
|
||||
|
||||
status = bus_space_read_1(iot, ioh, tmc_bstat);
|
||||
status = bus_read_1(sc->port_res, tmc_bstat);
|
||||
if ((status & PHASE_MASK) == 0)
|
||||
{
|
||||
if (sc->sc_ubf_timeout ++ == 0)
|
||||
@ -1332,7 +1282,7 @@ stg_timeout(sc)
|
||||
break;
|
||||
if ((status & BSTAT_REQ) == 0)
|
||||
break;
|
||||
if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0)
|
||||
if (bus_read_2(sc->port_res, tmc_fdcnt) != 0)
|
||||
break;
|
||||
if ((-- sc->sc_dataout_timeout) > 0)
|
||||
break;
|
||||
@ -1344,30 +1294,30 @@ stg_timeout(sc)
|
||||
break;
|
||||
}
|
||||
|
||||
bus_space_write_1(iot, ioh, tmc_ictl, 0);
|
||||
bus_write_1(sc->port_res, tmc_ictl, 0);
|
||||
|
||||
tout = STG_DELAY_MAX;
|
||||
while (tout --)
|
||||
{
|
||||
status = bus_space_read_1(iot, ioh, tmc_bstat);
|
||||
status = bus_read_1(sc->port_res, tmc_bstat);
|
||||
if ((status & PHASE_MASK) != DATA_OUT_PHASE)
|
||||
break;
|
||||
|
||||
if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0)
|
||||
if (bus_read_2(sc->port_res, tmc_fdcnt) != 0)
|
||||
{
|
||||
DELAY(1);
|
||||
continue;
|
||||
}
|
||||
|
||||
for (count = sc->sc_maxwsize; count > 0; count --)
|
||||
bus_space_write_1(iot, ioh, tmc_wfifo, 0);
|
||||
bus_write_1(sc->port_res, tmc_wfifo, 0);
|
||||
}
|
||||
|
||||
status = bus_space_read_1(iot, ioh, tmc_bstat);
|
||||
status = bus_read_1(sc->port_res, tmc_bstat);
|
||||
if ((status & PHASE_MASK) == DATA_OUT_PHASE)
|
||||
sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
|
||||
|
||||
bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
|
||||
bus_write_1(sc->port_res, tmc_ictl, sc->sc_icinit);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -79,7 +79,7 @@ stg_isa_probe(device_t dev)
|
||||
|
||||
stg_release_resource(dev);
|
||||
|
||||
return(0);
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -95,8 +95,8 @@ stg_isa_attach(device_t dev)
|
||||
return(error);
|
||||
}
|
||||
|
||||
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_CAM | INTR_ENTROPY,
|
||||
NULL, stg_intr, (void *)sc, &sc->stg_intrhand);
|
||||
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_CAM | INTR_ENTROPY |
|
||||
INTR_MPSAFE, NULL, stg_intr, sc, &sc->stg_intrhand);
|
||||
if (error) {
|
||||
stg_release_resource(dev);
|
||||
return(error);
|
||||
|
@ -83,7 +83,7 @@ stg_pccard_probe(device_t dev)
|
||||
sizeof(stg_products[0]), NULL)) != NULL) {
|
||||
if (pp->pp_name != NULL)
|
||||
device_set_desc(dev, pp->pp_name);
|
||||
return(0);
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
}
|
||||
return(EIO);
|
||||
}
|
||||
@ -105,8 +105,8 @@ stg_pccard_attach(device_t dev)
|
||||
stg_release_resource(dev);
|
||||
return(ENXIO);
|
||||
}
|
||||
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_CAM | INTR_ENTROPY,
|
||||
NULL, stg_intr, (void *)sc, &sc->stg_intrhand);
|
||||
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_CAM | INTR_ENTROPY |
|
||||
INTR_MPSAFE, NULL, stg_intr, sc, &sc->stg_intrhand);
|
||||
if (error) {
|
||||
stg_release_resource(dev);
|
||||
return(error);
|
||||
|
@ -99,8 +99,8 @@ stg_pci_attach(device_t dev)
|
||||
}
|
||||
|
||||
/* XXXX remove INTR_ENTROPY below for MFC */
|
||||
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_CAM | INTR_ENTROPY,
|
||||
NULL, stg_intr, (void *)sc, &sc->stg_intrhand);
|
||||
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_CAM | INTR_ENTROPY |
|
||||
INTR_MPSAFE, NULL, stg_intr, sc, &sc->stg_intrhand);
|
||||
if (error) {
|
||||
stg_release_resource(dev);
|
||||
return(error);
|
||||
|
@ -68,6 +68,7 @@ stg_alloc_resource(device_t dev)
|
||||
u_long maddr, msize;
|
||||
int error;
|
||||
|
||||
mtx_init(&sc->sc_sclow.sl_lock, "stg", NULL, MTX_DEF);
|
||||
sc->port_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
|
||||
&sc->port_rid, RF_ACTIVE);
|
||||
if (sc->port_res == NULL) {
|
||||
@ -117,7 +118,7 @@ stg_release_resource(device_t dev)
|
||||
if (sc->mem_res)
|
||||
bus_release_resource(dev, SYS_RES_MEMORY,
|
||||
sc->mem_rid, sc->mem_res);
|
||||
return;
|
||||
mtx_destroy(&sc->sc_sclow.sl_lock);
|
||||
}
|
||||
|
||||
int
|
||||
@ -126,8 +127,7 @@ stg_probe(device_t dev)
|
||||
int rv;
|
||||
struct stg_softc *sc = device_get_softc(dev);
|
||||
|
||||
rv = stgprobesubr(rman_get_bustag(sc->port_res),
|
||||
rman_get_bushandle(sc->port_res),
|
||||
rv = stgprobesubr(sc->port_res,
|
||||
device_get_flags(dev));
|
||||
|
||||
return rv;
|
||||
@ -139,45 +139,38 @@ stg_attach(device_t dev)
|
||||
struct stg_softc *sc;
|
||||
struct scsi_low_softc *slp;
|
||||
u_int32_t flags = device_get_flags(dev);
|
||||
intrmask_t s;
|
||||
char dvname[16];
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
strcpy(dvname,"stg");
|
||||
|
||||
slp = &sc->sc_sclow;
|
||||
slp->sl_dev = dev;
|
||||
sc->sc_iot = rman_get_bustag(sc->port_res);
|
||||
sc->sc_ioh = rman_get_bushandle(sc->port_res);
|
||||
|
||||
slp->sl_hostid = STG_HOSTID;
|
||||
slp->sl_cfgflags = flags;
|
||||
|
||||
s = splcam();
|
||||
stgattachsubr(sc);
|
||||
splx(s);
|
||||
|
||||
return(STGIOSZ);
|
||||
}
|
||||
|
||||
int
|
||||
stg_detach (device_t dev)
|
||||
stg_detach(device_t dev)
|
||||
{
|
||||
struct stg_softc *sc = device_get_softc(dev);
|
||||
intrmask_t s;
|
||||
|
||||
s = splcam();
|
||||
scsi_low_deactivate((struct scsi_low_softc *)sc);
|
||||
scsi_low_dettach(&sc->sc_sclow);
|
||||
splx(s);
|
||||
scsi_low_deactivate(&sc->sc_sclow);
|
||||
scsi_low_detach(&sc->sc_sclow);
|
||||
stg_release_resource(dev);
|
||||
return (0);
|
||||
}
|
||||
|
||||
void
|
||||
stg_intr (void *arg)
|
||||
stg_intr(void *arg)
|
||||
{
|
||||
stgintr(arg);
|
||||
return;
|
||||
struct stg_softc *sc;
|
||||
|
||||
sc = arg;
|
||||
SCSI_LOW_LOCK(&sc->sc_sclow);
|
||||
stgintr(sc);
|
||||
SCSI_LOW_UNLOCK(&sc->sc_sclow);
|
||||
}
|
||||
|
@ -44,10 +44,6 @@
|
||||
struct stg_softc {
|
||||
struct scsi_low_softc sc_sclow; /* generic data */
|
||||
|
||||
bus_space_tag_t sc_iot;
|
||||
bus_space_tag_t sc_memt;
|
||||
bus_space_handle_t sc_ioh;
|
||||
|
||||
int port_rid;
|
||||
int irq_rid;
|
||||
int mem_rid;
|
||||
@ -88,7 +84,7 @@ struct stg_targ_info {
|
||||
/*****************************************************************
|
||||
* Proto
|
||||
*****************************************************************/
|
||||
int stgprobesubr(bus_space_tag_t, bus_space_handle_t, u_int);
|
||||
int stgprobesubr(struct resource *, u_int);
|
||||
void stgattachsubr(struct stg_softc *);
|
||||
int stgintr(void *);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user