Tweak the handling of PCI capabilities in emulated devices to remove
the non-standard zero capability list terminator. Instead, track the start and end of the most recently added capability and use that to adjust the previous capability's next pointer when a capability is added and to determine the range of config registers belonging to PCI capability registers. Reviewed by: neel
This commit is contained in:
parent
458a36d594
commit
a96b8b801a
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=262143
@ -630,48 +630,39 @@ pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx, uint64_t hostbase,
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static int
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pci_emul_add_capability(struct pci_devinst *pi, u_char *capdata, int caplen)
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{
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int i, capoff, capid, reallen;
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int i, capoff, reallen;
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uint16_t sts;
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static u_char endofcap[4] = {
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PCIY_RESERVED, 0, 0, 0
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};
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assert(caplen > 0 && capdata[0] != PCIY_RESERVED);
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assert(caplen > 0);
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reallen = roundup2(caplen, 4); /* dword aligned */
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sts = pci_get_cfgdata16(pi, PCIR_STATUS);
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if ((sts & PCIM_STATUS_CAPPRESENT) == 0) {
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if ((sts & PCIM_STATUS_CAPPRESENT) == 0)
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capoff = CAP_START_OFFSET;
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pci_set_cfgdata8(pi, PCIR_CAP_PTR, capoff);
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pci_set_cfgdata16(pi, PCIR_STATUS, sts|PCIM_STATUS_CAPPRESENT);
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} else {
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capoff = pci_get_cfgdata8(pi, PCIR_CAP_PTR);
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while (1) {
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assert((capoff & 0x3) == 0);
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capid = pci_get_cfgdata8(pi, capoff);
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if (capid == PCIY_RESERVED)
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break;
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capoff = pci_get_cfgdata8(pi, capoff + 1);
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}
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}
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else
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capoff = pi->pi_capend + 1;
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/* Check if we have enough space */
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if (capoff + reallen + sizeof(endofcap) > PCI_REGMAX + 1)
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if (capoff + reallen > PCI_REGMAX + 1)
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return (-1);
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/* Set the previous capability pointer */
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if ((sts & PCIM_STATUS_CAPPRESENT) == 0) {
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pci_set_cfgdata8(pi, PCIR_CAP_PTR, capoff);
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pci_set_cfgdata16(pi, PCIR_STATUS, sts|PCIM_STATUS_CAPPRESENT);
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} else
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pci_set_cfgdata8(pi, pi->pi_prevcap + 1, capoff);
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/* Copy the capability */
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for (i = 0; i < caplen; i++)
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pci_set_cfgdata8(pi, capoff + i, capdata[i]);
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/* Set the next capability pointer */
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pci_set_cfgdata8(pi, capoff + 1, capoff + reallen);
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/* Copy of the reserved capability which serves as the end marker */
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for (i = 0; i < sizeof(endofcap); i++)
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pci_set_cfgdata8(pi, capoff + reallen + i, endofcap[i]);
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pci_set_cfgdata8(pi, capoff + 1, 0);
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pi->pi_prevcap = capoff;
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pi->pi_capend = capoff + reallen - 1;
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return (0);
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}
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@ -756,7 +747,7 @@ pci_emul_add_msicap(struct pci_devinst *pi, int msgnum)
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static void
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pci_populate_msixcap(struct msixcap *msixcap, int msgnum, int barnum,
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uint32_t msix_tab_size, int nextptr)
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uint32_t msix_tab_size)
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{
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CTASSERT(sizeof(struct msixcap) == 12);
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@ -764,7 +755,6 @@ pci_populate_msixcap(struct msixcap *msixcap, int msgnum, int barnum,
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bzero(msixcap, sizeof(struct msixcap));
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msixcap->capid = PCIY_MSIX;
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msixcap->nextptr = nextptr;
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/*
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* Message Control Register, all fields set to
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@ -826,7 +816,7 @@ pci_emul_add_msixcap(struct pci_devinst *pi, int msgnum, int barnum)
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pci_msix_table_init(pi, msgnum);
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pci_populate_msixcap(&msixcap, msgnum, barnum, tab_size, 0);
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pci_populate_msixcap(&msixcap, msgnum, barnum, tab_size);
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/* allocate memory for MSI-X Table and PBA */
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pci_emul_alloc_bar(pi, barnum, PCIBAR_MEM32,
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@ -949,11 +939,9 @@ pci_emul_capwrite(struct pci_devinst *pi, int offset, int bytes, uint32_t val)
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/* Find the capability that we want to update */
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capoff = CAP_START_OFFSET;
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while (1) {
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capid = pci_get_cfgdata8(pi, capoff);
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if (capid == PCIY_RESERVED)
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break;
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nextoff = pci_get_cfgdata8(pi, capoff + 1);
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if (nextoff == 0)
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break;
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if (offset >= capoff && offset < nextoff)
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break;
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@ -976,6 +964,7 @@ pci_emul_capwrite(struct pci_devinst *pi, int offset, int bytes, uint32_t val)
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return;
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}
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capid = pci_get_cfgdata8(pi, capoff);
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switch (capid) {
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case PCIY_MSI:
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msicap_cfgwrite(pi, capoff, offset, bytes, val);
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@ -994,25 +983,14 @@ pci_emul_capwrite(struct pci_devinst *pi, int offset, int bytes, uint32_t val)
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static int
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pci_emul_iscap(struct pci_devinst *pi, int offset)
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{
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int found;
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uint16_t sts;
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uint8_t capid, lastoff;
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found = 0;
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sts = pci_get_cfgdata16(pi, PCIR_STATUS);
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if ((sts & PCIM_STATUS_CAPPRESENT) != 0) {
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lastoff = pci_get_cfgdata8(pi, PCIR_CAP_PTR);
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while (1) {
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assert((lastoff & 0x3) == 0);
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capid = pci_get_cfgdata8(pi, lastoff);
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if (capid == PCIY_RESERVED)
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break;
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lastoff = pci_get_cfgdata8(pi, lastoff + 1);
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}
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if (offset >= CAP_START_OFFSET && offset <= lastoff)
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found = 1;
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if (offset >= CAP_START_OFFSET && offset <= pi->pi_capend)
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return (1);
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}
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return (found);
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return (0);
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}
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static int
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@ -39,7 +39,6 @@
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#include <assert.h>
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#define PCI_BARMAX PCIR_MAX_BAR_0 /* BAR registers in a Type 0 header */
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#define PCIY_RESERVED 0x00
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struct vmctx;
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struct pci_devinst;
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@ -115,6 +114,8 @@ struct pci_devinst {
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uint8_t pi_bus, pi_slot, pi_func;
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char pi_name[PI_NAMESZ];
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int pi_bar_getsize;
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int pi_prevcap;
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int pi_capend;
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struct {
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int8_t pin;
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